riescue.dtest_framework.runtime
- class riescue.dtest_framework.runtime.Runtime(rng: RandNum, pool: Pool, run_dir: Path, featmgr: FeatMgr)
Class used to generate runtime code for a test based on environment and features. Runtime code consists of Loader, TestScheduler, OpSys, Macros, and Equates. Generates and optionally writes code to .inc files.
- Parameters:
rng – Random number generator
pool – Test pool
run_dir – Path to the directory where the generated code will be written
featmgr – Feature manager
- generate(testname: str)
Generate code for each of the System modules and write to .inc files using format {testname}_{module_name}.inc
- Parameters:
testname – Name of the test file without the .s extension
- module_generator() Generator[tuple[str, str], Any, None]
Generator function that yields tuple of (module_name, code) for each module name
- generate_equates() str
- riescue.dtest_framework.runtime.formatted_line_generator(lines: list[str]) Generator[str, Any, None]
Generator function that yields formatted lines from a list of lines, stripping whitespace and formatting to single indent
- Parameters:
lines – List of lines to format
- class riescue.dtest_framework.runtime.loader.Loader(**kwargs)
Bases:
AssemblyGenerator
Assembly code generator for RISC-V system initialization and test environment setup.
The Loader class is responsible for generating assembly code that establishes a known system state after reset and prepares the runtime environment for test execution.
This class handles the complete system initialization sequence including:
CPU State Initialization
Integer and floating-point register initialization
Vector register initialization
Stack pointer allocation
Endianness configuration
Hart ID caching in scratch CSRs
CSR Configuration
ISA and extension configuration
Status register configuration
Exception and interrupt delegation
Trap vector base address setup
Counter configuration
Memory Management
Page table setup and configuration
SATP register configuration (page table root, ASID, paging mode)
PMP (Physical Memory Protection) region setup
PMA (Physical Memory Attributes) configuration
Privilege Mode Management
Machine to supervisor mode transitions
Hypervisor mode setup for virtualized environments
User mode preparation
Interrupt and Exception Handling
Interrupt delegation configuration
Exception handler setup
Trap vector initialization
- param kwargs:
Keyword arguments passed to parent AssemblyGenerator
- type kwargs:
dict
Note
The generated assembly code varies based on the feature manager configuration, including WYSIWYG mode, Linux mode, paging mode, and privilege level settings.
Warning
This class generates low-level assembly code that directly manipulates system state and CSRs. Incorrect configuration may result in system instability.
Implements exception handling for the dtest framework.
- Notes:
Wherever hartid is used, it is freshly retrieved so that fewer assumptions about GPR use are made.
- class riescue.dtest_framework.runtime.trap_handler.TrapHandler(**kwargs)
Bases:
AssemblyGenerator
Exception and interrupt handler for the dtest framework.
Provides default exception and interrupt handling. Tests generally should not encounter exceptions or interrupts unless specifically configured. When they occur unexpectedly, the test fails.
Supports exception validation by allowing tests to configure expected trap codes and return addresses. Handles both machine and supervisor mode exception delegation.
Note
Example usage in dtest_framework/tests/test_excp.s
- class riescue.dtest_framework.runtime.syscalls.SysCalls(**kwargs)
Bases:
AssemblyGenerator
System call handlers for test execution environment.
Provides handlers for test control, privilege transitions, and system information requests via ECALL interface.
Hypervisor implementation for RISC-V virtualized environments.
Creates and manages virtual machines in virtualized mode. Handles VM execution, exception delegation, and trap handling for guest VMs running in VS mode.
- class riescue.dtest_framework.runtime.hypervisor.Hypervisor(generate_trap_handler: bool, **kwargs)
Bases:
AssemblyGenerator
Hypervisor implementation for virtualized environments.
Creates and manages virtual machines in virtualized mode. The machine starts in Machine mode, switches to HS mode, and runs hypervisor code. Each VM starts in VS mode and executes OS code similar to non-virtualized mode.
Provides VM creation with discrete test setup including code, data, and paging maps. Intercepts VM events per RISC-V ISA specification. Supports nested page tables and interrupt virtualization.
- Environment Configuration:
virtualized: Runs test in VS or VU mode depending on test.priv_mode setting
- Paging Configuration:
paging_mode_s2: Selects stage-2 (G-stage) page table translation mode Supported modes: bare, sv39, sv48, sv57
- Parameters:
generate_trap_handler – Generate trap handler code when True
Macros provided for the dtest framework.
- class riescue.dtest_framework.runtime.macros.Macros(mp_enablement=RiscvMPEnablement.MP_OFF, **kwargs)
Bases:
AssemblyGenerator
Generates assembly macros for test framework.
Provides macros for multiprocessing synchronization, exception handling, and system operations.