tt-awesome — New Entries Newly added projects, tools, and resources in the Tenstorrent ecosystem https://tenstorrent.github.io/tt-awesome/feeds/new-entries.xml Tenstorrent Communityhttps://tenstorrent.github.io/tt-awesome/ 2026-07-17T23:59:59Z https://github.com/tenstorrent/sfpi SFPI 2026-07-17T23:59:59Z Tenstorrent SFPU programming interface — TT-enhanced RISC-V GCC and binutils plus header files for programming the Tensix SFPU (vector engine) from kernel code. The compiler toolchain underneath TT-Metalium's SFPU ops.

Links: Repo

official · added 2026-07-17

sfpu, compiler-toolchain, gcc, riscv, kernels, dev-tools

]]> https://github.com/tenstorrent/tt-tools-common tt-tools-common 2026-07-17T23:59:58Z Shared helper library of common utilities used across Tenstorrent system tools such as tt-smi, tt-flash, and tt-topology. A dependency rather than a standalone tool.

Links: Repo

official · added 2026-07-17

library, tooling, shared-utilities, hw-system

]]> https://github.com/tenstorrent/tt-system-tools tt-system-tools 2026-07-17T23:59:57Z System setup and support utilities for Tenstorrent hardware — hugepages-setup configures the 1GB hugepages TT ASICs need, and tt-oops collects diagnostic data for troubleshooting. Ships as the tenstorrent-tools deb/rpm.

Links: Repo

official · added 2026-07-17

hugepages, system-setup, diagnostics, hw-system

]]> https://github.com/tenstorrent/tt-burnin tt-burnin 2026-07-17T23:59:56Z Command-line utility that runs a high power-consumption workload on Tenstorrent devices — used for chip testing, burn-in, and validating a system's power delivery and cooling under sustained load.

Links: Repo

official · added 2026-07-17

burn-in, stress-test, power, hardware-validation, hw-system

]]> https://github.com/tenstorrent/riscv_arch_tests riscv_arch_tests 2026-07-10T23:59:55Z RISC-V architectural self-checking directed tests — randomly-generated register operands and data with low-level OS code for test scheduling and self-checking, runnable on a RISC-V design or an ISS such as Whisper or Spike. Generated by an internal Tenstorrent tool from the official RISC-V ISA spec.

Links: Repo

official · added 2026-07-10

riscv, testing, verification, isa, architecture, riscv-arch

]]> https://github.com/tenstorrent/tt-isa-documentation tt-isa-documentation 2026-07-10T23:59:54Z Low-level ISA and microarchitecture documentation for Tenstorrent AI architectures (Grayskull, Wormhole, Blackhole) — the authoritative hardware reference beneath the tt-forge / tt-metal software stack.

Links: Repo

official · added 2026-07-10

isa, architecture, documentation, tensix, low-level, research, guides

]]> https://github.com/tenstorrent/polaris polaris 2026-07-10T23:59:53Z A high-level AI simulator from Tenstorrent for modeling and exploring AI accelerator and workload performance.

Links: Repo

official · added 2026-07-10

simulator, performance, modeling, architecture, research, dev-tools

]]> https://github.com/tenstorrent/tt-forge-models tt-forge-models 2026-07-10T23:59:52Z A shared repository of model implementations used across TT-Forge frontends — a single source of truth for the models used in testing and benchmarking, rather than duplicating them across frontend repos.

Links: Repo

official · added 2026-07-10

tt-forge, models, benchmarking, testing, inference, ai-models

]]> https://github.com/tenstorrent/tt-perf-report tt-perf-report 2026-07-10T23:59:51Z Performance report analysis tool for Tenstorrent Metal operations — analyzes perf traces to surface throughput, bottlenecks, and optimization opportunities.

Links: Repo

official · added 2026-07-10

performance, profiling, tt-metal, analysis, optimization, dev-tools

]]> https://github.com/tenstorrent/tt-emule tt-emule 2026-07-10T23:59:50Z A C++ software emulator of the Tenstorrent device-level kernel and host APIs. Run tt-metal kernel and host code on a standard x86-64 Linux machine — no Tenstorrent hardware required.

Links: Repo

official · added 2026-07-10

emulator, tt-metal, no-hardware, testing, kernels, dev-tools

]]> https://github.com/moritztng/tt-atom tt-atom 2026-07-10T23:59:49Z Meta's UMA interatomic potential running on Tenstorrent Blackhole — energy, forces, and stress for molecules and periodic materials behind an ASE calculator. Its per-edge Wigner rotation runs as a custom tt-metal kernel for a highest-performance uma-s build.

Links: Repo

By @moritztng · affiliated · added 2026-07-10

molecular-dynamics, interatomic-potential, mlip, uma, ase, inference, custom-kernel, ai-models

]]> https://github.com/pcmoritz/libtt libtt 2026-07-10T23:59:48Z A Bazel-built PJRT plugin (libtt.so) providing an XLA backend for Tenstorrent devices. Bundles the tt-xla PJRT implementation with tt-mlir and tt-metal into a single shared object so JAX code runs on Tenstorrent hardware, with patches so sglang-jax works out of the box.

Links: Repo

By @Philipp Moritz · community · added 2026-07-10

xla, pjrt, jax, bazel, sglang, compilers

]]> https://github.com/marty1885/ttPseudoRowMajor ttPseudoRowMajor 2026-07-10T23:59:47Z A small TTNN-facing C++ library (ttprm) for running view-shaped tensor work without first materializing the view in DRAM. Targets Tenstorrent TILE tensors and uses cached device operations to gather/scatter through layout views.

Links: Repo

By @Martin Chang · community · added 2026-07-10

ttnn, tensor, tile, layout, cpp, kernels

]]> https://github.com/zk4x/zyx zyx 2026-07-03T23:59:46Z A complete ML library and compiler in Rust — "from assembly to neural networks" — with a native Tenstorrent backend (src/backend/tenstorrent), autograd, custom kernels, multi-backend support, and Python bindings.

Links: Repo · Website

By @zk4x · community · added 2026-07-03

rust, ml-compiler, tensor-library, autograd, backend, compilers, dev-tools

]]> https://github.com/RQM-Technologies-dev/tt-rqm-kernels tt-rqm-kernels 2026-07-03T23:59:45Z [N, 4] float tensors — plus StructuredBench, a benchmark suite for these workloads. Provides CPU/PyTorch reference implementations and an optional TT-Lang simulator prototype for the quaternion multiply (qmul) kernel as a first step toward Tenstorrent hardware support.]]> Structured quaternion, rotor, and phase-aware tensor kernels — operations on 3D rotation and orientation data packed into ordinary [N, 4] float tensors — plus StructuredBench, a benchmark suite for these workloads. Provides CPU/PyTorch reference implementations and an optional TT-Lang simulator prototype for the quaternion multiply (qmul) kernel as a first step toward Tenstorrent hardware support.

Links: Repo · Tenstorrent landing page · StructuredBench specification · tt-emule qmul candidate report · TT-Lang qmul plan · TT-Lang simulator report · Tenstorrent RFC

By @RQM-Technologies-dev · community · added 2026-07-03

structured-tensors, quaternion, rotor, tt-lang, simulator, benchmarks, pytorch, custom-kernels, kernels, research

]]> https://tenstorrent.github.io/tt-awesome/#cloud-native-support Cloud-Native Support 2026-07-01T23:59:44Z Official documentation hub for running Tenstorrent accelerators on Kubernetes. Centers on tt-operator (the umbrella Helm chart) and covers Node Feature Discovery, kernel-mode driver (tt-kmd) management, firmware flashing, Prometheus telemetry, Fabric Manager topology resolution, Dynamic Resource Allocation, and multi-node scheduling via JobSet and PMIx.

Links: docs.tenstorrent.com

official · added 2026-07-01

kubernetes, cloud-native, helm, tt-operator, orchestration, documentation, cloud-infra, guides

]]> https://github.com/tenstorrent/tt-operator tt-operator 2026-07-01T23:59:43Z Kubernetes operator that automates installation and lifecycle management of the full software stack needed to run Tenstorrent workloads on a cluster. Distributed as an umbrella Helm chart coordinating driver (tt-kmd) management, Node Feature Discovery, firmware flashing, Prometheus telemetry, fabric/topology resolution, and device allocation with multi-node scheduling (JobSet/PMIx).

Links: Repo · Cloud-Native Support docs

official · added 2026-07-01

kubernetes, helm, operator, orchestration, cloud-native, tt-kmd, device-plugin, cloud-infra, hw-system

]]> https://github.com/tenstorrent/tt-quietbox2-guide TT-QuietBox 2 Guide 2026-06-30T23:59:42Z Official setup and onboarding guide for the TT-QuietBox 2 — a compact, liquid-cooled AI workstation with four Blackhole accelerators, an AMD Ryzen CPU, 256GB RAM, and 4TB NVMe. Covers hardware specs, first-boot setup, and hands-on learning paths for running pre-loaded models like Qwen3-32B and serving text, image, video, and speech models via tt-inference-server.

Links: Repo · TT-QuietBox 2 Guide

official · added 2026-06-30

quietbox, blackhole, workstation, setup, getting-started, documentation, hw-system, guides, getting-started

]]> https://github.com/tetsuh/tt-metal-community-distro-matrix tetsuh/tt-metal-community-distro-matrix 2026-06-29T23:59:41Z tt-metal and the official tt-installer build successfully on community Linux distributions that are not part of Tenstorrent's official CI.]]> A compatibility guardrail that continuously monitors whether tt-metal and the official tt-installer build successfully on community Linux distributions that are not part of Tenstorrent's official CI.

Links: Repo

By @tetsuh · community · added 2026-06-29

hw-system

]]> https://github.com/kinginu/tt-splat tt-splat — matrix-native 3D Gaussian Splatting on Blackhole 2026-06-29T23:59:40Z 3D Gaussian Splatting rewritten to run on the matrix engine: a polynomial splat and order-independent weighted-sum blending replace exp and depth-sorted alpha, so the pipeline becomes GEMM → activation → GEMM. Renderer + trainer, trained device-resident on a Blackhole p150a.

Links: Repo

By @kinginu · community · added 2026-06-29

3d-gaussian-splatting, 3dgs, rendering, matrix-engine, weighted-sum-rendering, kernels, research

]]> https://github.com/tenstorrent/ttsim-qemu ttsim-qemu 2026-06-16T23:59:39Z Tenstorrent's fork of QEMU that provides the full-system emulation layer behind ttsim. Models the RISC-V cores and system devices of Wormhole and Blackhole so TT-Metalium workloads can boot and run without physical silicon.

Links: Repo

official · added 2026-06-16

simulator, qemu, full-system, emulation, no-hardware, wormhole, blackhole, riscv-arch, dev-tools

]]> https://github.com/tenstorrent/tt-forge-onnx tt-forge-onnx 2026-06-15T23:59:38Z ONNX graph compiler for Tenstorrent hardware. Optimizes and transforms ONNX model graphs for efficient execution on Tensix accelerators. Used as a backend by tt-forge for ONNX model ingestion.

Links: Repo

official · added 2026-06-15

onnx, compiler, graph-optimization, mlir, compilers

]]> https://github.com/tenstorrent/tt-animatediff tt-animatediff 2026-06-03T23:59:37Z Generates short, temporally coherent animated GIFs using the AnimateDiff model on Tenstorrent hardware. Phase 1 runs the correct SD 1.4 + MotionAdapter architecture on CPU; Phase 2 accelerates spatial denoising on Blackhole using the TTNN UNet. Produces vibrant 8-frame animations in ~15 s/frame on a P300C.

Links: Repo · Native Video Animation with AnimateDiff (VSCode Toolkit)

official · added 2026-06-03

animatediff, video-generation, stable-diffusion, diffusion, gif, blackhole, ai-models, games-demos

]]> https://github.com/Zaneham/ttas ttas 2026-05-27T23:59:36Z ttas is a hacker-friendly assembler/disassembler for Tensix on Wormhole. It turns assembly into the exact 32-bit words the hardware runs, and turns binaries back into readable instructions using the same shared instruction table.

Links: Repo

By @Zaneham · community · added 2026-05-27

assembler, dev-tools, hw-system

]]> https://github.com/Knight-Ops/libtt-metal-cxx libtt-metal-cxx 2026-05-20T23:59:35Z Rust crate that exposes the TT-Metal host API through a C++ bridge via cxx.rs — covering device management, program/kernel creation (from source file or inline string), circular buffers, semaphores, runtime arguments, sharded buffers, and MeshDevice workflows, with hardware-backed integration tests.

Links: Repo

By @Knight-Ops · community · added 2026-05-20

rust, bindings, cxx, tt-metal, ffi, host-api, dev-tools

]]> https://github.com/tenstorrent/tt-llk tt-llk 2026-05-13T23:59:34Z Tenstorrent Low-Level Kernels: the C++ library that directly programs the RISC-V cores inside each Tensix compute engine. TRISC0 (unpack), TRISC1 (math/FPU/SFPU), and TRISC2 (pack) are all programmed through this layer — it is the interface between TT-Metal kernel code and bare silicon.

Links: Repo · Top-level architecture overview

official · added 2026-05-13

tensix, risc-v, llk, trisc, brisc, ncrisc, low-level, compute-engine, kernels, riscv-arch

]]> https://tenstorrent.github.io/tt-awesome/#lecture-wm-csci654-tenstorrent Tenstorrent Architecture — W&M CSCI654 Advanced Computer Architecture 2026-05-13T23:59:33Z Lecture 20 from William & Mary's graduate Computer Architecture course. Frames Tenstorrent in the landscape between GPUs and TPUs, draws comparisons to Cerebras and SambaNova, then dives deep into the Wormhole chip and Tensix core: the 5 RISC-V core design, SFPU, NoC, and dataflow execution model.

Links: Lecture 20 — Tenstorrent Architecture (YouTube)

By Yifan & GPU / William & Mary · community · added 2026-05-13

lecture, architecture, wormhole, tensix, risc-v, sfpu, noc, academia, guides, riscv-arch

]]> https://tenstorrent.github.io/tt-awesome/#paper-attention-grayskull Attention in SRAM on Tenstorrent Grayskull 2026-05-13T23:59:32Z A fused kernel for the Grayskull architecture implementing Transformer self-attention entirely within SRAM. Combines matrix multiply, attention score scaling, and Softmax without DRAM accesses, achieving significant speedups over non-fused implementations.

Links: arXiv:2407.13885

By Moritz Thüning · community · added 2026-05-13

attention, transformer, sram, grayskull, kernel, risc-v, research, kernels

]]> https://tenstorrent.github.io/tt-awesome/#paper-matmul-grayskull Assessing Tenstorrent Grayskull RISC-V MatMul Acceleration for LLMs 2026-05-13T23:59:31Z Evaluates the Tenstorrent Grayskull e75 RISC-V accelerator for matrix multiplication at reduced numerical precision (BFP8 and LoFi), a fundamental kernel in LLM inference computation.

Links: arXiv:2505.06085

By Hiari Pizzini Cavagna, Daniele Cesarini, Andrea Bartolini · community · added 2026-05-13

matmul, grayskull, risc-v, bfp8, lofi, llm, precision, research

]]> https://tenstorrent.github.io/tt-awesome/#paper-nbody-strategies-wormhole Porting Strategies for Gravitational N-Body Simulations on Tenstorrent Wormhole 2026-05-13T23:59:30Z Evaluates three strategies for scaling an N-body code across multiple Tenstorrent Wormhole accelerators. Builds on the established performance of single-card N-body work to explore parallelism via the on-chip NoC and multi-accelerator configurations.

Links: arXiv:2605.02744

By Jenny Lynn Almerol, Elisabetta Boella, Mario Spera, Daniele Gregori · community · added 2026-05-13

n-body, astrophysics, hpc, wormhole, risc-v, multi-accelerator, simulation, research

]]> https://tenstorrent.github.io/tt-awesome/#paper-tileloom TileLoom: Automatic Dataflow Planning for Spatial Dataflow Accelerators 2026-05-13T23:59:29Z Compiler system that automatically generates efficient dataflow plans for tile-based languages on spatial accelerators including Tenstorrent Wormhole. Exploits on-chip network forwarding between processing elements to reduce DRAM pressure.

Links: arXiv:2512.22168

By Wei Li, Zhenyu Bai, Heru Wang, Pranav Dangi · community · added 2026-05-13

compiler, dataflow, spatial-accelerator, tile-based, on-chip-network, wormhole, research, compilers

]]> https://tenstorrent.github.io/tt-awesome/#paper-tts-lightning Rewriting TTS Inference Economics: Lightning V2 on Tenstorrent vs. NVIDIA L40S 2026-05-13T23:59:28Z Shows that Text-to-Speech inference on Tenstorrent Lightning V2 achieves 4× lower cost than NVIDIA L40S. Applies BlockFloat8 (BFP8) and low-fidelity (LoFi) precision strategies to TTS despite their greater numerical fragility compared to LLMs.

Links: arXiv:2604.03279

By Ranjith M. S., Akshat Mandloi, Sudarshan Kamath · community · added 2026-05-13

tts, text-to-speech, inference, bfp8, lofi, cost-efficiency, precision, research, ai-models

]]> https://tenstorrent.github.io/tt-awesome/#blog-anuraagw-blackhole-arch Tenstorrent Blackhole Architecture Guide 2026-05-13T23:59:27Z A 6,500-word community deep dive into the Blackhole p100a architecture: the tile model (Tensix, DRAM, SiFive x280 L2CPU, Ethernet, PCIe, NoC arc), firmware startup sequence, MOP micro-op processor, replay buffer, FPU/SFPU sync, and the anatomy of a kernel. From the author of blackhole-py.

Links: anuraagw.me — February 2026

By boopdotpng · community · added 2026-05-13

blackhole, architecture, tensix, noc, sifive-x280, firmware, mop, sfpu, deep-dive, blog, riscv-arch, guides

]]> https://tenstorrent.github.io/tt-awesome/#paper-stencils-wormhole Stencil Computations on Tenstorrent Wormhole 2026-05-12T23:59:26Z Maps 2D 5-point stencil computations onto the Tenstorrent Wormhole RISC-V AI dataflow accelerator via two implementations: element-wise decomposition (Axpy) and matrix-multiplication reformulation (MatMul). Profiling shows the isolated Wormhole kernel is competitive with CPU execution, with PCIe transfers and initialization driving end-to-end overhead; Axpy achieves lower energy than the CPU baseline at large scales. Identifies architectural and software directions for making AI accelerators viable for HPC stencil workloads. 2025.

Links: arXiv:2605.07599

community · added 2026-05-12

stencil, hpc, wormhole, risc-v, energy-efficiency, benchmarks, dataflow, research

]]> https://tenstorrent.github.io/tt-awesome/#tt-console TT Console 2026-05-11T23:59:25Z Browser-based cloud console for exploring AI on Tenstorrent hardware. Run LLM inference, image and video generation, and browse the supported model catalog in-browser — backed by Tenstorrent accelerators. Cloud hardware access and advanced workflows (deployments, agents) available in staged rollout.

Links: console.tenstorrent.com

official · added 2026-05-11

cloud, console, inference, playground, llm, image-generation, video-generation, demo, cloud-infra, ai-models

]]> https://github.com/tenstorrent/tt-metal tt-metal 2026-05-08T23:59:24Z TT-NN operator library and TT-Metalium low-level kernel programming model. The primary SDK for developing on Tenstorrent hardware — from high-level tensor ops to bare-metal RISC-V kernels.

Links: Repo · Website

official · added 2026-05-08

metalium, ttnn, sdk, kernels, core, kernels, compilers, getting-started

]]> https://github.com/tenstorrent/tt-forge tt-forge 2026-05-08T23:59:23Z Tenstorrent's MLIR-based compiler frontend. Enables running AI workloads from PyTorch, ONNX, and other frameworks on all Tenstorrent hardware configurations through an open-source, general, and performant compiler.

Links: Repo · Website

official · added 2026-05-08

mlir, compiler, pytorch, onnx, frontend, compilers, getting-started

]]> https://github.com/tenstorrent/tt-buda tt-buda 2026-05-08T23:59:22Z TT-BUDA: Tenstorrent's original Python compiler and runtime for AI workloads. Legacy stack — tt-forge is the recommended successor, but tt-buda has the largest model demo library.

Links: Repo

official · added 2026-05-08

legacy, compiler, pytorch, buda, compilers

]]> https://github.com/tenstorrent/tt-mlir tt-mlir 2026-05-08T23:59:21Z Tenstorrent MLIR compiler — the core compiler infrastructure shared by tt-forge and other frontends. Handles graph optimization, lowering, and code generation for Tensix hardware.

Links: Repo · Website

official · added 2026-05-08

mlir, compiler, backend, optimization, compilers

]]> https://github.com/tenstorrent/riscv-ocelot riscv-ocelot 2026-05-08T23:59:20Z The Berkeley Out-of-Order Machine with V-EXT (RISC-V Vector Extension) support. Tenstorrent's research-grade out-of-order RISC-V core with vector extension.

Links: Repo

official · added 2026-05-08

risc-v, out-of-order, vector-extension, processor-design, riscv-arch

]]> https://github.com/tenstorrent/ttsim ttsim 2026-05-08T23:59:19Z Fast full-system simulator of Tenstorrent Wormhole and Blackhole hardware. Runs TT-Metalium workloads on any Linux/x86_64 system without physical silicon. Bit-exact results relative to hardware.

Links: Repo · Lesson

official · added 2026-05-08

simulator, no-hardware, bit-exact, wormhole, blackhole, riscv-arch, dev-tools

]]> https://github.com/tenstorrent/whisper whisper 2026-05-08T23:59:18Z RISC-V Instruction Set Simulator (ISS) used by Tenstorrent for processor verification. Powers the co-simulation architecture checker.

Links: Repo

official · added 2026-05-08

risc-v, iss, simulator, verification, riscv-arch

]]> https://github.com/tenstorrent/tt-xla tt-xla 2026-05-08T23:59:17Z PJRT device plugin for Tenstorrent hardware. Enables JAX, PyTorch/XLA, and other XLA-based frameworks to target TT accelerators.

Links: Repo · JAX and PyTorch/XLA on Tenstorrent · Website

official · added 2026-05-08

xla, pjrt, jax, pytorch, compilers

]]> https://github.com/tenstorrent/tt-kmd tt-kmd 2026-05-08T23:59:16Z Tenstorrent kernel module driver. The Linux kernel module required to interface with Tenstorrent PCIe accelerator cards.

Links: Repo

official · added 2026-05-08

kernel-module, driver, linux, pcie, hw-system

]]> https://github.com/tenstorrent/riescue RiESCUE 2026-05-08T23:59:15Z RISC-V Directed Test Framework and Compliance Suite. Comprehensive test infrastructure for verifying RISC-V processor implementations against the specification.

Links: Repo · Website

official · added 2026-05-08

risc-v, testing, compliance, verification, riscv-arch

]]> https://github.com/tenstorrent/tt-inference-server tt-inference-server 2026-05-08T23:59:14Z Production-ready model serving for Tenstorrent hardware with OpenAI-compatible REST API. Supports continuous batching, multiple models, and all TT hardware configurations.

Links: Repo · Production Inference lesson (VSCode Toolkit)

official · added 2026-05-08

serving, openai-compatible, production, rest-api, ai-models, cloud-infra, getting-started

]]> https://github.com/tenstorrent/tt-buda-demos tt-buda-demos 2026-05-08T23:59:13Z Repository of model demos using TT-Buda. The largest collection of pre-compiled model examples for Tenstorrent hardware — BERT, ResNet, YOLO, GPT-2, Whisper, and many more.

Links: Repo

official · added 2026-05-08

demos, models, bert, resnet, yolo, gpt2, ai-models

]]> https://github.com/tenstorrent/tt-smi tt-smi 2026-05-08T23:59:12Z Tenstorrent System Management Interface — monitor device telemetry, issue board-level resets, and inspect hardware health. The nvidia-smi equivalent for Tenstorrent hardware.

Links: Repo

official · added 2026-05-08

monitoring, telemetry, smi, hardware-management, hw-system, dev-tools

]]> https://github.com/tenstorrent/tt-bh-linux tt-bh-linux 2026-05-08T23:59:11Z Linux demo for the Tenstorrent Blackhole P100/P150 card RISC-V cores. Boot a real Linux kernel on the 16 high-performance RISC-V cores built into the Blackhole chip.

Links: Repo · Website

official · added 2026-05-08

linux, risc-v, blackhole, bare-metal, boot, riscv-arch

]]> https://github.com/tenstorrent/tt-lang tt-lang 2026-05-08T23:59:10Z Python-based DSL that sits between TT-NN and TT-Metalium — expresses custom fused kernels with progressive disclosure, compiling directly to Tensix. Ships an integrated functional simulator (no hardware needed), line-by-line performance metrics, and AI-agent-friendly tooling. Two packages: tt-lang (compiler + hardware, requires ttnn) and tt-lang-sim (simulator only, works on Linux/macOS without Tenstorrent hardware).

Links: Repo · Website · Introduction to tt-lang

official · added 2026-05-08

dsl, python, kernels, tt-lang, simulator, kernel-fusion, kernels, getting-started

]]>