noc_inline_dw_write

template<InlineWriteDst dst_type = InlineWriteDst::DEFAULT, bool posted = false, bool flush = true>
void noc_inline_dw_write(uint64_t addr, uint32_t val, uint8_t be = 0xF, uint8_t noc = noc_index, uint8_t vc = NOC_UNICAST_WRITE_VC, uint32_t customized_src_addr = 0)

Initiates an asynchronous write of a 32-bit value to a NOC destination. Typically used for writing registers, but can be used for memory locations as well. The destination is specified as a 64-bit NOC address (see noc_async_write). The advantage over using noc_async_write is that we don’t use a Tensix L1 memory source location; the write value is written directly into a register. Unlike using noc_async_write, there are also no address alignment concerns. Also, see noc_async_write_barrier.

The destination node can be either a Tensix core+L1 memory address or a PCIe controller; This API does not support DRAM addresses.

Return value: None

Argument Description

addr Encoding of the destination location (x,y)+address

val The value to be written

be Byte-enable

noc NOC to use for the transaction

vc Virtual channel to use for the transaction

customized_src_addr Custom source address for storing the value to be written

(required when flush is false)

dst_type (template parameter) Whether the write is targeting L1 or a Stream Register

posted (template parameter) Whether the call is posted (i.e. ack requirement)

flush (template parameter) Whether to flush the NOC transaction before issuing the

write (false callers must prevent races on the caller

side)

When flush is disabled the caller is responsible for providing a valid customized_src_addr scratch location and ensuring no outstanding inline write uses that address before issuing another write.