ttnn.clamped_silu_glu

ttnn.clamped_silu_glu(gate: ttnn.Tensor, up: ttnn.Tensor, limit: float, *, memory_config: ttnn.MemoryConfig = None, sub_core_grids: ttnn.CoreRangeSet = None, sub_device_id: ttnn.SubDeviceId | None) → ttnn.Tensor

Computes DeepSeek-V4’s clamped SiLU-GLU activation over the pre-split gate and up tensors.

\[\mathrm{output\_tensor}_i = \mathrm{silu}\left(\min(\mathrm{gate}_i, \verb|limit|)\right) \cdot \mathrm{clamp}(\mathrm{up}_i, -\verb|limit|, \verb|limit|)\]
Parameters:

  • gate (ttnn.Tensor)the gate input tensor.

  • up (ttnn.Tensor)the up input tensor.

  • limit (float)the clamp limit. Bounds the gate half from above only and the up half at both ends. Must be positive.

Keyword Arguments:

  • memory_config (ttnn.MemoryConfig, optional)memory configuration for the operation. Defaults to None.

  • sub_core_grids (ttnn.CoreRangeSet, optional)the cores to run on. Defaults to None.

  • sub_device_id (ttnn.SubDeviceId, optional)sub-device whose worker cores to run on, as an alternative to spelling them out in sub_core_grids. Mutually exclusive with it. Defaults to None.

Returns:

ttnn.Tensorthe output tensor.

Note

Supported dtypes and layouts:

Dtypes

Layouts

BFLOAT16, BFLOAT8_B

TILE

Runs as a single multiply with no intermediates, so any output memory config is accepted alongside a core restriction. An interleaved-L1 output still spans every bank: sub_core_grids scopes the compute, not that allocation.