ttnn.sum

ttnn.sum(input_tensor: ttnn.Tensor, dim: number or tuple, keepdim: bool = False, *, memory_config: ttnn.MemoryConfig = None, compute_kernel_config: ttnn.ComputeKernelConfig = None, scalar: float = 1.0, correction: bool | None, sub_core_grids: ttnn.CoreRangeSet = None, fast_and_approximate_mode: bool | None, output_layout: ttnn.Layout = None) → ttnn.Tensor

Computes the sum of the input tensor input_tensor along the specified dimension(s) dim. If no dimension is provided, sum is computed over all dimensions yielding a single value.

Parameters:

  • input_tensor (ttnn.Tensor)the input tensor. Must be on the device.

  • dim (number or tuple)dimension value(s) to reduce over.

  • keepdim (bool, optional)keep the original dimension size(s). Defaults to False.

Keyword Arguments:

  • memory_config (ttnn.MemoryConfig, optional)Memory configuration for the operation. Defaults to None.

  • compute_kernel_config (ttnn.ComputeKernelConfig, optional)Compute kernel configuration for the operation. Defaults to None.

  • scalar (float, optional)A scaling factor to be applied to the input tensor. Defaults to 1.0.

  • correction (bool, optional)Deprecated. This parameter is deprecated and will be removed in a future release. It has no impact on the result.

  • sub_core_grids (ttnn.CoreRangeSet, optional)Subcore grids to use for the operation. Defaults to None, which will use all cores.

  • fast_and_approximate_mode (bool, optional)FLOAT32 only. False (default) uses the accurate SFPU path (full float32 accumulation); True uses the faster FPU path (inputs truncated to TF32, higher ULP error). The accurate path requires a compute_kernel_config with fp32_dest_acc_en=True and is unavailable on Quasar; in those cases it falls back to the FPU. No effect for non-FLOAT32 inputs.

  • output_layout (ttnn.Layout, optional)layout of the output tensor. Defaults to None, which keeps the layout the chosen path produces naturally (see the Note below). ttnn.TILE_LAYOUT or ttnn.ROW_MAJOR_LAYOUT is always honored: it is produced directly by the kernel for a -2 reduce of a ROW_MAJOR input, and converted after reducing otherwise. ttnn.ROW_MAJOR_LAYOUT is rejected for block-float results (BFLOAT8_B, BFLOAT4_B), which only exist in TILE layout; typecast explicitly if a row-major result is needed.

Returns:

ttnn.Tensorthe output tensor.

Note

The input tensor supports the following data types and layouts:

Input Tensor

dtype

layout

FLOAT32

ROW_MAJOR, TILE

BFLOAT16

ROW_MAJOR, TILE

BFLOAT8_B

TILE

INT32

TILE

The output tensor will be in TILE layout and have the same dtype as the input_tensor. Exception: for sum and mean, 4D ROW_MAJOR BFLOAT16/FLOAT32 inputs with INTERLEAVED memory config reduced along the last (-1) or second-to-last (-2) dimension preserve ROW_MAJOR layout.

Memory Support:

  • Interleaved: DRAM and L1

  • Sharded (L1): Width, Height, Block, and ND sharding

  • Sharded (DRAM): Width, Height, and ND sharding

  • Output sharding will mirror the input

  • Not supported: DRAM block sharding; sharded ROW_MAJOR inputs; and sharded reduction along a dimension other than -1 / -2

Example

# Create tensor
tensor_input = ttnn.rand((2, 3, 4), device=device)

# Apply ttnn.sum() on dim=2
tensor_output = ttnn.sum(tensor_input, dim=2)
logger.info(f"Sum result: {tensor_output}")