A | B | C | D | E | F | G | I | J | L | M | N | O | P | R | S | T | U | V | W

A: aiclk_set_speed_rqst; aiclk_targ_freq_info; AiclkArb; AiclkPPM; aisweep_rqst; APB2AVSBUS_AVS_CFG_1_reg_t; APB2AVSBUS_AVS_CFG_1_reg_u; arc_dma_channel; arc_dma_config; arc_dma_data; asic_state_rqst

B: bh_arc; bh_chip; bh_chip_config; bh_chip_data; bh_fwtable_config; bh_fwtable_data; BH_PCIE_DWC_PCIE_USP_PF0_HDMA_CAP_HDMA_INT_SETUP_OFF_RDCH_0_reg_t; BH_PCIE_DWC_PCIE_USP_PF0_HDMA_CAP_HDMA_INT_SETUP_OFF_RDCH_0_reg_u; BH_PCIE_DWC_PCIE_USP_PF0_HDMA_CAP_HDMA_INT_SETUP_OFF_WRCH_0_reg_t; BH_PCIE_DWC_PCIE_USP_PF0_HDMA_CAP_HDMA_INT_SETUP_OFF_WRCH_0_reg_u; BH_PCIE_DWC_PCIE_USP_PF0_MSI_CAP_HDL_PATH_E982B20F_PCI_MSI_CAP_ID_NEXT_CTRL_REG_reg_t; BH_PCIE_DWC_PCIE_USP_PF0_MSI_CAP_HDL_PATH_E982B20F_PCI_MSI_CAP_ID_NEXT_CTRL_REG_reg_u; bh_straps; board_regulators_config

D: debug_noc_translation_rqst; dma_grendel_channel_data; dma_grendel_config; dma_grendel_data; dmc_ping_rqst; dmStaticInfo; DW_APB_I2C_IC_CON_reg_t; DW_APB_I2C_IC_CON_reg_u; DW_APB_I2C_IC_RAW_INTR_STAT_reg_t; DW_APB_I2C_IC_RAW_INTR_STAT_reg_u

E: eeprom_rqst; EFUSE_CNTL_EFUSE_RD_CNTL_reg_t; EFUSE_CNTL_EFUSE_RD_CNTL_reg_u

F: fd_flags; fd_flags_u; flash_lock_rqst; flash_stm32_wrapper_config; flash_unlock_rqst; force_aiclk_rqst; force_fan_speed_rqst; force_vdd_rqst

G: gddr_bist_info; gddr_params_table_t; gddr_reset_rqst; gddr_telemetry_table_t; get_aiclk_rqst; get_freq_curve_from_voltage_rqst; get_voltage_curve_from_freq_rqst; get_voltage_rqst; gpio_grendel_config; gpio_grendel_data; gpio_tt_bh_config; gpio_tt_bh_data

J: jtag_api; jtag_config; jtag_data; jtag_emul_data; jtag_instr_t; jtag_instr_u

M: max6639_config; max6639_pwm_config; max6639_sensor_config; max6639_sensor_data; message_queue; message_queue_header; msgqueue_handler; MSI_CATCHER_STATUS_reg_t; MSI_CATCHER_STATUS_reg_u

N: NOC2AXITlb0RegT; NOC2AXITlb0RegU; NOC2AXITlb1RegT; NOC2AXITlb1RegU; NOC2AXITlb2RegT; NOC2AXITlb2RegU; NOC2AXITlb3RegT; NOC2AXITlb3RegU; NocTranslation

O: occp_backend; occp_backend_i3c; occp_cmd_header; occp_execute_image_request; occp_execute_image_response; occp_get_version_response; occp_header; occp_read_data_request; occp_write_data_request; OperationBits

P: pcie_dma_transfer_rqst; PCIE_SII_APP_PCIE_CTL_reg_t; PCIE_SII_APP_PCIE_CTL_reg_u; PCIE_SII_LTSSM_STATE_reg_t; PCIE_SII_LTSSM_STATE_reg_u; PCIE_SII_NOC_TLB_DATA_reg_t; PCIE_SII_NOC_TLB_DATA_reg_u; pd_ip_cfg0_t; pd_ip_cfg0_u; PLL_CNTL_PLL_CNTL_0_reg_t; PLL_CNTL_PLL_CNTL_0_reg_u; PLL_CNTL_PLL_CNTL_1_reg_t; PLL_CNTL_PLL_CNTL_1_reg_u; PLL_CNTL_PLL_CNTL_2_reg_t; PLL_CNTL_PLL_CNTL_2_reg_u; PLL_CNTL_PLL_CNTL_3_reg_t; PLL_CNTL_PLL_CNTL_3_reg_u; PLL_CNTL_PLL_CNTL_4_reg_t; PLL_CNTL_PLL_CNTL_4_reg_u; PLL_CNTL_PLL_CNTL_5_reg_t; PLL_CNTL_PLL_CNTL_5_reg_u; PLL_CNTL_USE_POSTDIV_reg_t; PLL_CNTL_USE_POSTDIV_reg_u; PLL_CNTL_WRAPPER_CLOCK_WAVE_CNTL_reg_t; PLL_CNTL_WRAPPER_CLOCK_WAVE_CNTL_reg_u; PLL_CNTL_WRAPPER_PLL_LOCK_reg_t; PLL_CNTL_WRAPPER_PLL_LOCK_reg_u; PLLSettings; PMM_BLOCK_PMM_CTRL_reg_t; PMM_BLOCK_PMM_CTRL_reg_u; PMM_BLOCK_PMM_MESSAGE_reg_t; PMM_BLOCK_PMM_MESSAGE_reg_u; power_setting_rqst; pvt_cntl_clk_synth_reg_t; pvt_cntl_clk_synth_reg_u; pvt_cntl_irq_en_reg_t; pvt_cntl_irq_en_reg_u; pvt_cntl_sdif_reg_t; pvt_cntl_sdif_reg_u; pvt_cntl_sdif_status_reg_t; pvt_cntl_sdif_status_reg_u; pvt_cntl_ts_pd_irq_enable_reg_t; pvt_cntl_ts_pd_irq_enable_reg_u; pvt_cntl_ts_pd_sdif_data_reg_t; pvt_cntl_ts_pd_sdif_data_reg_u; pvt_cntl_vm_alarma_cfg_reg_t; pvt_cntl_vm_alarma_cfg_reg_u; pvt_cntl_vm_alarmb_cfg_reg_t; pvt_cntl_vm_alarmb_cfg_reg_u; pvt_cntl_vm_irq_enable_reg_t; pvt_cntl_vm_irq_enable_reg_u; pvt_tt_bh_config; pvt_tt_bh_data; pvt_tt_bh_rtio_data

S: security_fd_flags; security_fd_flags_u; send_pcie_msi_rqst; SerdesRegData; set_asic_host_fmax_rqst; set_last_serial_rqst; set_tdp_limit_rqst; set_voltage_rqst; set_wdt_timeout_rqst; smbus_target_config; smbus_target_data; SmbusCmdDef; STATUS_BOOT_STATUS0_reg_t; STATUS_BOOT_STATUS0_reg_u; STATUS_ERROR_STATUS0_reg_t; STATUS_ERROR_STATUS0_reg_u; switch_clk_scheme_rqst; switch_vout_control_rqst

T: telemetry_entry; telemetry_table; TelemetryInternalData; tensix_state_msg; test_rqst; Throttler; ThrottlerLimitRange; ThrottlerParams; TileEnable; toggle_single_tensix_reset_rqst; toggle_tensix_reset_rqst; trigger_reset_rqst; ts_ip_cfg0_t; ts_ip_cfg0_u; tt_bh_dma_channel_data; tt_bh_dma_channel_resettable_data; tt_bh_dma_noc_config; tt_bh_dma_noc_coords; tt_bh_dma_noc_data; tt_bh_pll_cntl_0_fields; tt_bh_pll_cntl_0_reg; tt_bh_pll_cntl_1_fields; tt_bh_pll_cntl_1_reg; tt_bh_pll_cntl_2_fields; tt_bh_pll_cntl_2_reg; tt_bh_pll_cntl_3_fields; tt_bh_pll_cntl_3_reg; tt_bh_pll_cntl_5_fields; tt_bh_pll_cntl_5_reg; tt_bh_pll_cntl_wrapper_lock_fields; tt_bh_pll_cntl_wrapper_lock_reg; tt_bh_pll_settings; tt_bh_pll_use_postdiv_fields; tt_bh_pll_use_postdiv_reg; tt_bh_reset_config; tt_bh_reset_data; tt_boot_fs; tt_boot_fs_fd; tt_grendel_mbox_config; tt_grendel_mbox_data; tt_smc_remoteproc_config; tt_smc_remoteproc_data; tt_virt_console_msg; tt_virt_console_reg; tt_vuart

U: UART_ADDRESS_BLOCK_IIR_reg_t; UART_ADDRESS_BLOCK_IIR_reg_u; UART_ADDRESS_BLOCK_LCR_reg_t; UART_ADDRESS_BLOCK_LCR_reg_u; UART_ADDRESS_BLOCK_LSR_reg_t; UART_ADDRESS_BLOCK_LSR_reg_u; uart_tt_virt_config; uart_tt_virt_data