gddr_params.h

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/*
 * Copyright (c) 2024 Tenstorrent AI ULC
 * SPDX-License-Identifier: Apache-2.0
 */
 
#ifndef GDDR_PARAMS_H
#define GDDR_PARAMS_H
 
/* ***************************************
 *      THIS FILE IS AUTO GENERATED
 * ***************************************
 * *** DO NOT EDIT THIS FILE MANUALLY ****
 * To edit, modify
 * gddr_params.yaml and run make.
 * ***************************************
 */
#include <stdint.h>
 
#define GDDR_PARAMS_TABLE_T_VERSION (0x00000008)
 
typedef struct {
        uint32_t params_table_version;
        /* To be incremented if the fields change functionality, size or order. */
        uint32_t dram_speed;
        /* 12000, 14000, or 16000 */
        uint32_t clamshell_mode;
        /* 1 = Clamshell mode, 0 = Non-clamshell mode */
        uint32_t feature_bits;
        /* See feature_bit_u for possible values. */
        uint32_t board_type;
        /* See board_type_e for possible values. */
        uint32_t mrisc_fw_version_major;
        /* To be incremented if FW major version changes */
        uint32_t mrisc_fw_version_minor;
        /* To be incremented if FW minor version changes */
        uint32_t controller_id;
        /* ID to uniquely identify each controller (0-7) */
        uint32_t ca_vrefc_offset;
        /*
         * Per-controller CA VREFC offset as 4-bit two's-complement MR10 OP[3:0] code.
         * Used only when feature_bits.ca_settings_valid is 1. Patched at load time by the SMC.
         */
        uint32_t ca_termination_offset;
        /*
         * Per-controller CA termination offset (MR3, 0-3).
         * Used only when feature_bits.ca_settings_valid is 1. Patched at load time by the SMC.
         */
        uint32_t ca_margin_check_vref_steps;
        /*
         * Number of VREFC offset steps (N) to probe at +/-N around nominal during the
         * post-training CA margin check. Valid range 1-7.
         */
        uint32_t ca_ocd_pulldown_offset;
        /*
         * Per-controller CA driver strength as 3-bit OCD pulldown offset code
         * (0-3 = 0..+3, 4-7 = -4..-1). Used only when feature_bits.ca_settings_valid is 1
         * and the value is <= 7; 0xFF (default) = not seeded, keep the FW board-type default.
         * Patched at load time by the SMC.
         */
} gddr_params_table_t;
 
#endif