init.h File Reference

#include "status_reg.h"
#include <stdint.h>

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Data Structures
struct	RESET_UNIT_GLOBAL_RESET_reg_t
union	RESET_UNIT_GLOBAL_RESET_reg_u
struct	RESET_UNIT_ETH_RESET_reg_t
union	RESET_UNIT_ETH_RESET_reg_u
struct	RESET_UNIT_TENSIX_RESET_reg_t
union	RESET_UNIT_TENSIX_RESET_reg_u
struct	RESET_UNIT_DDR_RESET_reg_t
union	RESET_UNIT_DDR_RESET_reg_u
struct	RESET_UNIT_L2CPU_RESET_reg_t
union	RESET_UNIT_L2CPU_RESET_reg_u

Macros
#define	RESET_UNIT_GLOBAL_RESET_REG_ADDR   0x80030000
#define	RESET_UNIT_ETH_RESET_REG_ADDR   0x80030008
#define	RESET_UNIT_DDR_RESET_REG_ADDR   0x80030010
#define	RESET_UNIT_L2CPU_RESET_REG_ADDR   0x80030014
#define	RESET_UNIT_TENSIX_RESET_0_REG_ADDR   0x80030020
#define	RESET_UNIT_TENSIX_RESET_1_REG_ADDR   0x80030024
#define	RESET_UNIT_TENSIX_RESET_2_REG_ADDR   0x80030028
#define	RESET_UNIT_TENSIX_RESET_3_REG_ADDR   0x8003002C
#define	RESET_UNIT_TENSIX_RESET_4_REG_ADDR   0x80030030
#define	RESET_UNIT_TENSIX_RESET_5_REG_ADDR   0x80030034
#define	RESET_UNIT_TENSIX_RESET_6_REG_ADDR   0x80030038
#define	RESET_UNIT_TENSIX_RESET_7_REG_ADDR   0x8003003C
#define	RESET_UNIT_TENSIX_RISC_RESET_0_REG_ADDR   0x80030040
#define	SCRATCHPAD_SIZE   CONFIG_TT_BH_ARC_SCRATCHPAD_SIZE
#define	RESET_UNIT_GLOBAL_RESET_REG_DEFAULT   (0x00000080)
#define	RESET_UNIT_ETH_RESET_REG_DEFAULT   (0x00000000)
#define	RESET_UNIT_TENSIX_RESET_REG_DEFAULT   (0x00000000)
#define	RESET_UNIT_DDR_RESET_REG_DEFAULT   (0x00000000)
#define	RESET_UNIT_L2CPU_RESET_REG_DEFAULT   (0x00000000)

Enumerations
enum	HWInitStatus {   kHwInitNotStarted = 0 ,   kHwInitStarted = 1 ,   kHwInitDone = 2 ,   kHwInitError = 3 }
enum	FWID {   FW_ID_SMC_NORMAL = 0 ,   FW_ID_SMC_RECOVERY = 1 }
enum	init_stage_id {   INIT_STAGE_REGULATOR = 0 ,   INIT_STAGE_CABLE_FAULT = 1 ,   INIT_STAGE_TENSIX = 2 ,   INIT_STAGE_MRISC_LOAD = 3 ,   INIT_STAGE_GDDR_TRAIN = 4 ,   INIT_STAGE_COUNT }

Functions
void	record_init_failure (enum init_stage_id stage)
	Record a failure from an init function.

Variables
uint32_t	error_status0

Macro Definition Documentation

RESET_UNIT_DDR_RESET_REG_ADDR

#define RESET_UNIT_DDR_RESET_REG_ADDR   0x80030010

RESET_UNIT_DDR_RESET_REG_DEFAULT

#define RESET_UNIT_DDR_RESET_REG_DEFAULT   (0x00000000)

RESET_UNIT_ETH_RESET_REG_ADDR

#define RESET_UNIT_ETH_RESET_REG_ADDR   0x80030008

RESET_UNIT_ETH_RESET_REG_DEFAULT

#define RESET_UNIT_ETH_RESET_REG_DEFAULT   (0x00000000)

RESET_UNIT_GLOBAL_RESET_REG_ADDR

#define RESET_UNIT_GLOBAL_RESET_REG_ADDR   0x80030000

RESET_UNIT_GLOBAL_RESET_REG_DEFAULT

#define RESET_UNIT_GLOBAL_RESET_REG_DEFAULT   (0x00000080)

RESET_UNIT_L2CPU_RESET_REG_ADDR

#define RESET_UNIT_L2CPU_RESET_REG_ADDR   0x80030014

RESET_UNIT_L2CPU_RESET_REG_DEFAULT

#define RESET_UNIT_L2CPU_RESET_REG_DEFAULT   (0x00000000)

RESET_UNIT_TENSIX_RESET_0_REG_ADDR

#define RESET_UNIT_TENSIX_RESET_0_REG_ADDR   0x80030020

RESET_UNIT_TENSIX_RESET_1_REG_ADDR

#define RESET_UNIT_TENSIX_RESET_1_REG_ADDR   0x80030024

RESET_UNIT_TENSIX_RESET_2_REG_ADDR

#define RESET_UNIT_TENSIX_RESET_2_REG_ADDR   0x80030028

RESET_UNIT_TENSIX_RESET_3_REG_ADDR

#define RESET_UNIT_TENSIX_RESET_3_REG_ADDR   0x8003002C

RESET_UNIT_TENSIX_RESET_4_REG_ADDR

#define RESET_UNIT_TENSIX_RESET_4_REG_ADDR   0x80030030

RESET_UNIT_TENSIX_RESET_5_REG_ADDR

#define RESET_UNIT_TENSIX_RESET_5_REG_ADDR   0x80030034

RESET_UNIT_TENSIX_RESET_6_REG_ADDR

#define RESET_UNIT_TENSIX_RESET_6_REG_ADDR   0x80030038

RESET_UNIT_TENSIX_RESET_7_REG_ADDR

#define RESET_UNIT_TENSIX_RESET_7_REG_ADDR   0x8003003C

RESET_UNIT_TENSIX_RESET_REG_DEFAULT

#define RESET_UNIT_TENSIX_RESET_REG_DEFAULT   (0x00000000)

RESET_UNIT_TENSIX_RISC_RESET_0_REG_ADDR

#define RESET_UNIT_TENSIX_RISC_RESET_0_REG_ADDR   0x80030040

SCRATCHPAD_SIZE

#define SCRATCHPAD_SIZE   CONFIG_TT_BH_ARC_SCRATCHPAD_SIZE

Enumeration Type Documentation

FWID

enum FWID

Enumerator
FW_ID_SMC_NORMAL	0
FW_ID_SMC_RECOVERY	1

HWInitStatus

enum HWInitStatus

Enumerator
kHwInitNotStarted	0
kHwInitStarted	1
kHwInitDone	2
kHwInitError	3

init_stage_id

enum init_stage_id

Enumerator
INIT_STAGE_REGULATOR	0
INIT_STAGE_CABLE_FAULT	1
INIT_STAGE_TENSIX	2
INIT_STAGE_MRISC_LOAD	3
INIT_STAGE_GDDR_TRAIN	4
INIT_STAGE_COUNT

Function Documentation

record_init_failure()

void record_init_failure

(

enum init_stage_id

stage

)

Record a failure from an init function.

Sets bit stage in STATUS_ERROR_STATUS0 and writes the shadow value through to scratch RAM immediately so the host can read it even if init hangs after this call. Safe to call multiple times; the bitmap accumulates.

Variable Documentation

error_status0

uint32_t error_status0

extern