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TT-System-Firmware APIs 19.15.99
Tenstorrent Firmware
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#include <stdint.h>#include <zephyr/device.h>#include <zephyr/devicetree.h>#include <zephyr/sys/util.h>

Go to the source code of this file.
Macros | |
| #define | TT_BH_RESET_BANK_STRIDE 4U |
| #define | TT_BH_RESET_NUM_BANKS(node_id) |
| Number of 32-bit banks for a BH reset DT node. | |
Functions | |
| int | reset_tt_bh_write (const struct device *dev, uint32_t value) |
| Absolute write to a BH reset-unit bank register. | |
| int | reset_tt_bh_lines_assert (const struct device *dev, uint32_t offset, uint32_t mask) |
Assert lines in mask at offset with a single RMW. | |
| int | reset_tt_bh_lines_deassert (const struct device *dev, uint32_t offset, uint32_t mask) |
Deassert lines in mask at offset with a single RMW. | |
| #define TT_BH_RESET_BANK_STRIDE 4U |
Byte stride between consecutive banks in a multi-bank BH reset region.
| #define TT_BH_RESET_NUM_BANKS | ( | node_id | ) |
Number of 32-bit banks for a BH reset DT node.
Prefers n-banks (emul / non-MMIO). Otherwise derives from reg size / TT_BH_RESET_BANK_STRIDE (HW).
Assert lines in mask at offset with a single RMW.
offset is a byte offset from the controller base (typically a multiple of TT_BH_RESET_BANK_STRIDE). Active-low: clears bits in mask. Invalid if offset is out of range or mask shares no bits with the controller's reset-mask.
Deassert lines in mask at offset with a single RMW.
Active-low: sets bits in mask. Used for dual-field banks (eth/ddr) where tile and RISC halves share one MMIO word, multi-bank tensix regions, and full-bank releases.
Absolute write to a BH reset-unit bank register.
Sets the entire bank word at offset 0 (no read-modify-write). Use when init must force a known full-register state (e.g. dual-field tile half deasserted with RISC half still asserted). Prefer reset_tt_bh_lines_assert/deassert when only selected lines should change.