tt-bh-reset.h File Reference

Bit-position reset line IDs for Tenstorrent Blackhole reset banks. More...

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Macros
#define	TT_BH_ETH_TILE_ID(n)
#define	TT_BH_ETH_RISC_ID(n)
#define	TT_BH_DDR_TILE_ID(n)
#define	TT_BH_DDR_RISC_ID(n)
#define	TT_BH_L2CPU_TILE_ID(n)
#define	TT_BH_L2CPU_RISC_ID(n)
#define	TT_BH_GLOBAL_SYSTEM_RESET_ID   0
#define	TT_BH_GLOBAL_NOC_RESET_ID   1
#define	TT_BH_GLOBAL_REFCLK_CNT_EN_ID   7
#define	TT_BH_GLOBAL_PCIE0_RESET_ID   8
#define	TT_BH_GLOBAL_PCIE1_RESET_ID   9
#define	TT_BH_GLOBAL_PTP_RESET_ID   13

Detailed Description

Bit-position reset line IDs for Tenstorrent Blackhole reset banks.

Dual-field registers share one controller instance; tile and RISC halves use distinct bit ranges. IDs are physical bit indices into the MMIO word.

Macro Definition Documentation

TT_BH_DDR_RISC_ID

#define TT_BH_DDR_RISC_ID

(

n

)

Value:

((n) + 8)

TT_BH_DDR_TILE_ID

#define TT_BH_DDR_TILE_ID

(

n

)

Value:

((n) + 0)

TT_BH_ETH_RISC_ID

#define TT_BH_ETH_RISC_ID

(

n

)

Value:

((n) + 16)

TT_BH_ETH_TILE_ID

#define TT_BH_ETH_TILE_ID

(

n

)

Value:

((n) + 0)

TT_BH_GLOBAL_NOC_RESET_ID

#define TT_BH_GLOBAL_NOC_RESET_ID   1

TT_BH_GLOBAL_PCIE0_RESET_ID

#define TT_BH_GLOBAL_PCIE0_RESET_ID   8

TT_BH_GLOBAL_PCIE1_RESET_ID

#define TT_BH_GLOBAL_PCIE1_RESET_ID   9

TT_BH_GLOBAL_PTP_RESET_ID

#define TT_BH_GLOBAL_PTP_RESET_ID   13

TT_BH_GLOBAL_REFCLK_CNT_EN_ID

#define TT_BH_GLOBAL_REFCLK_CNT_EN_ID   7

TT_BH_GLOBAL_SYSTEM_RESET_ID

#define TT_BH_GLOBAL_SYSTEM_RESET_ID   0

TT_BH_L2CPU_RISC_ID

#define TT_BH_L2CPU_RISC_ID

(

n

)

Value:

((n) + 4)

TT_BH_L2CPU_TILE_ID

#define TT_BH_L2CPU_TILE_ID

(

n

)

Value:

((n) + 0)