ttnn.MatmulMultiCoreReuseMultiCastDRAMShardedProgramConfig

class ttnn.MatmulMultiCoreReuseMultiCastDRAMShardedProgramConfig

Bases: object

This program config multiplies width-sharded L1 activations by width-sharded DRAM weights.

from_json

property fused_activation

Optional fused activation function to apply during computation.

If specified, the activation function is applied directly during the DRAM-sharded matmul operation. This can provide significant performance benefits by avoiding additional memory round-trips in DRAM-based operations.

property in0_block_w

Block width for both input tensors along the K dimension (shared inner dimension).

Determines the data granularity by specifying how many tiles wide each block is along the inner dimension for both input_tensor_a and input_tensor_b in DRAM-sharded operations. This parameter must be chosen to align with the DRAM sharding strategy and optimize memory bandwidth utilization for both tensors.

property num_workers_per_dram_bank

Number of compute cores per DRAM bank.

1 (the default) runs the single-reader program. 2 or 3 run the single-reader program with that many readers per bank (Blackhole only; the per-bank shard width in tiles must equal N times the reader width), unless use_multicore_pipeline is set and the call qualifies for the multi-core pipeline.

property per_core_M

Number of output tiles each core processes along the M dimension.

Must equal the padded activation height, including fused batch dimensions, divided by its tile height. The weight must contain one shared matrix. Every activation shard contains all M rows. Both pipelines support multiple tile rows, subject to L1 capacity for the input/output shards and the program’s working buffers.

property per_core_N

Number of output tiles each core processes along the N dimension.

Determines how the N dimension is distributed across cores in DRAM-sharded scenarios. This parameter affects the multicast efficiency and must be compatible with the DRAM sharding configuration.

to_json

property use_multicore_pipeline

Explicit opt-in to the multi-core DRAM-sharded pipeline (default False).

False keeps the single-reader program for every num_workers_per_dram_bank. True with num_workers_per_dram_bank N >= 2, on a call with no bias, no fused activation, no untilize_out, 32x32 tiles, K a whole number of tiles, A in L1 and an L1 width-sharded ROW_MAJOR output, runs the multi-core pipeline on Blackhole and Wormhole: N cores next to each bank split the bank’s weight columns (unevenly when N does not divide the shard width; when N exceeds the shard width it is rounded down to a multiple of it and the extra cores split K and reduce their partial sums), every core reads its activation rows straight from the L1 shards, and in0_block_w is the number of K tiles per streamed weight block (any value). Accumulation follows compute_kernel_config: fp32_dest_acc_en uses fp32 Dest and Float32 partials, otherwise 16-bit Dest and Float16_b partials. For one tile row the fp32 path keeps each column pass’s whole K in Dest. For multiple tile rows, each weight block is reused across M before it is released, with bounded activation buffering and packer L1 accumulation between K blocks. Wormhole may partition tall M across two worker groups when narrow column slices would otherwise duplicate activation traffic; each group then reads the weights. A call that does not qualify runs as if the flag were False.