Open Chiplet Atlas (OCA) Harness
The Open Chiplet Atlas (OCA) Harness is an OCA architecture compliant, open-source chiplet framework: a reusable implementation vehicle for the Open Chiplet Atlas (OCA) standard. It packages the common, non-differentiating infrastructure every chiplet needs — security, boot, system management, debug, test, and die-to-die integration — so adopters can focus their effort on their own value-differentiating application logic.
| OCA Harness is the Harness pillar of the wider Open Chiplet Atlas (OCA) ecosystem, alongside the OCA Architecture specification and the OCA Compliance program. |
Ecosystem repositories
The OCA Harness ecosystem itself spans a small family of Tenstorrent-owned repositories, each covering a distinct part of building and using OCA Harness:
| Package | Upstream | Repository | Role in the ecosystem |
|---|---|---|---|
tt-oca-harness |
Tenstorrent |
This repository: OCA Harness’s RTL, documentation, and register/IP-XACT tooling |
|
tt-oca-harness-aou |
Tenstorrent |
AXI-over-UCIe Bridge (AoU) RTL, a component of OCA Harness’s RTL collateral |
|
tt-oca-harness-model |
Tenstorrent |
Virtual platform of the harness for rapid prototyping |
|
tt-oca-manifest |
Tenstorrent |
OCA boot manifest format specification and producer/consumer tooling for the secure boot images OCA Harness’s SEP subsystem loads |
OCA Harness also reuses third-party open-source IP rather than reimplementing it.
Tenstorrent generally maintains a fork of each such dependency to support
coordinated development, keeps it synchronized with the upstream project, and
contributes suitable changes back upstream where possible. The exact
revisions and subsets imported into this repository are defined in
Bender.yml; the
Getting Started Guide
explains how Bender materializes and updates them.
| Package | Upstream | Repository | Role in OCA Harness |
|---|---|---|---|
OpenTitan |
lowRISC |
Common primitives, cryptography, entropy, and timers |
|
Common Verification |
PULP Platform |
Vendored so PULP-derived dependencies resolve a consistent local copy; not directly used by OCA Harness |
|
Common Cells |
PULP Platform |
Reusable RTL cells used by interconnect and DMA components |
|
APB |
PULP Platform |
Advanced Peripheral Bus components |
|
AXI |
PULP Platform |
Advanced eXtensible Interface components |
|
iDMA |
PULP Platform |
Intelligent direct memory access engine |
|
UNBENT |
PULP Platform |
AXI bus-error-unit wrapper for chiplet integrators; not instantiated in OCA Harness’s own RTL |
|
AXI Stream |
PULP Platform |
Compiled into iDMA’s generated backend bundle; OCA Harness’s AXI-only DMA configuration does not instantiate it |
|
OBI |
PULP Platform |
Supplies the types iDMA’s OBI backend headers reference; OCA Harness does not instantiate an OBI bus |
|
Register Interface |
PULP Platform |
AXI-to-register bridge ( |
|
Adams Bridge |
CHIPS Alliance |
Post-quantum cryptography engine |
|
Caliptra RTL |
CHIPS Alliance |
Key-vault client helpers for Adams Bridge |
|
VeeR EL2 |
CHIPS Alliance |
SEP processor core |
|
PicoRV32 |
YosysHQ |
Key Manager processor core |
|
I3C Core |
CHIPS Alliance / Antmicro |
I3C controller and target |
|
Caliptra RTL for I3C |
CHIPS Alliance |
AXI and common RTL used by I3C |
|
cocotbext-i3c |
Antmicro |
I3C target verification model vendored for the I3C DV testbench; not yet exercised by an active test |
The SMC’s Rocket CPU cluster is a further exception: it is generated
SystemVerilog output of the
Chipyard
Rocket-chip Chisel generator rather than a checked-out upstream source
tree, so there is no upstream repository to fork or pin. It lives flat in
the repository under
hw/sys/smc/rtl/smc_cpu/chipyard_generated_files/.
Learn more
-
Feature Overview — what OCA Harness provides today
-
Motivation — why OCA Harness exists
-
Use Cases — how adopters use OCA Harness in practice
-
License — OCA Harness’s open-source license