ttnn.conv2d
| Name | Input Shapes | Input Layouts | Attributes | Output Shapes | Output Layouts | PCC | ATOL |
|---|---|---|---|---|---|---|---|
| ttnn.conv2d | tensor<[1,1,100,1024,bf16]> tensor<[1024,1024,1,1,bf16]> tensor<[1,1,100,1024,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 100 + d2, d3), memory_config: (4, 32, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 + d2, d3), memory_config: (1048576, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (100, 1024, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1024 : i32 input_height: 10 : i32 input_width: 10 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 1024 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,100,1024,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (100, 1024, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,100,1024,bf16]> tensor<[1024,1,3,3,bf16]> tensor<[1,1,100,1024,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 100 + d2, d3), memory_config: (4, 32, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (3072, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (100, 1024, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1024 : i32 in_channels: 1024 : i32 input_height: 10 : i32 input_width: 10 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 1024 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,100,1024,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (100, 1024, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,100,1024,bf16]> tensor<[1536,1024,1,1,bf16]> tensor<[1,1,100,1536,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 100 + d2, d3), memory_config: (4, 32, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 + d2, d3), memory_config: (1572864, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (100, 1536, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1024 : i32 input_height: 10 : i32 input_width: 10 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 1536 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,100,1536,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (100, 1536, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,16384,1024,bf16]> tensor<[256,1024,1,1,bf16]> tensor<[1,1,16384,256,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 16384 + d2, d3), memory_config: (512, 32, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 + d2, d3), memory_config: (262144, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 128 + d2, d3), memory_config: (16384, 256, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1024 : i32 input_height: 128 : i32 input_width: 128 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 256 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,16384,256,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 128 + d2, d3), memory_config: (16384, 256, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,1024,bf16]> tensor<[1024,1024,1,1,bf16]> tensor<[1,1,196,1024,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 32, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 + d2, d3), memory_config: (1048576, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 1024, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1024 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 1024 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,1024,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 1024, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,1024,bf16]> tensor<[1024,1024,3,3,bf16]> tensor<[1,1,196,1024,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 32, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 * 3 + d2, d3), memory_config: (3145728, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 1024, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1024 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 1024 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,1024,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 1024, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,1024,bf16]> tensor<[1024,1024,3,3,bf16]> tensor<[1,1,49,1024,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 32, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 * 3 + d2, d3), memory_config: (3145728, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 1024, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1024 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 1024 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,49,1024,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 1024, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,1024,bf16]> tensor<[1024,16,3,3,bf16]> tensor<[1,1,196,1024,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 32, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 48 + d1 * 3 + d2, d3), memory_config: (49152, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 1024, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 64 : i32 in_channels: 1024 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 1024 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,1024,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 1024, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,1024,bf16]> tensor<[128,1024,1,1,bf16]> tensor<[1,1,196,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 32, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 + d2, d3), memory_config: (131072, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1024 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,1024,bf16]> tensor<[2048,1024,1,1,bf16]> tensor<[1,1,196,2048,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 32, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 + d2, d3), memory_config: (2097152, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 2048, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1024 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 2048 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,2048,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 2048, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,1024,bf16]> tensor<[2048,1024,1,1,bf16]> tensor<[1,1,49,2048,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 32, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 + d2, d3), memory_config: (2097152, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 2048, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1024 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 2048 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,49,2048,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 2048, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,1024,bf16]> tensor<[256,1024,1,1,bf16]> tensor<[1,1,196,256,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 32, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 + d2, d3), memory_config: (262144, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 256, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1024 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 256 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,256,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 256, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,1024,bf16]> tensor<[512,1024,1,1,bf16]> tensor<[1,1,196,512,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 32, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 + d2, d3), memory_config: (524288, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 512, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1024 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 512 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,512,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 512, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,256,1024,bf16]> tensor<[1024,1,3,3,bf16]> tensor<[1,1,256,1024,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 256 + d2, d3), memory_config: (8, 32, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (3072, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (256, 1024, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1024 : i32 in_channels: 1024 : i32 input_height: 16 : i32 input_width: 16 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 1024 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,256,1024,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (256, 1024, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,256,1024,bf16]> tensor<[255,1024,1,1,bf16]> tensor<[1,1,256,255,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 256 + d2, d3), memory_config: (8, 32, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 + d2, d3), memory_config: (261120, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (256, 255, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1024 : i32 input_height: 16 : i32 input_width: 16 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 255 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,256,255,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (256, 255, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,256,1024,bf16]> tensor<[512,1024,1,1,bf16]> tensor<[1,1,256,512,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 256 + d2, d3), memory_config: (8, 32, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 + d2, d3), memory_config: (524288, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (256, 512, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1024 : i32 input_height: 16 : i32 input_width: 16 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 512 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,256,512,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (256, 512, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,289,1024,bf16]> tensor<[128,1024,1,1,bf16]> tensor<[1,1,289,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 289 + d2, d3), memory_config: (10, 32, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 + d2, d3), memory_config: (131072, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 17 + d2, d3), memory_config: (289, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1024 : i32 input_height: 17 : i32 input_width: 17 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,289,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 17 + d2, d3), memory_config: (289, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,289,1024,bf16]> tensor<[192,1024,1,1,bf16]> tensor<[1,1,289,192,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 289 + d2, d3), memory_config: (10, 32, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 + d2, d3), memory_config: (196608, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 17 + d2, d3), memory_config: (289, 192, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1024 : i32 input_height: 17 : i32 input_width: 17 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 192 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,289,192,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 17 + d2, d3), memory_config: (289, 192, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,289,1024,bf16]> tensor<[256,1024,1,1,bf16]> tensor<[1,1,289,256,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 289 + d2, d3), memory_config: (10, 32, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 + d2, d3), memory_config: (262144, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 17 + d2, d3), memory_config: (289, 256, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1024 : i32 input_height: 17 : i32 input_width: 17 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 256 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,289,256,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 17 + d2, d3), memory_config: (289, 256, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,289,1024,bf16]> tensor<[384,1024,1,1,bf16]> tensor<[1,1,289,384,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 289 + d2, d3), memory_config: (10, 32, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 + d2, d3), memory_config: (393216, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 17 + d2, d3), memory_config: (289, 384, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1024 : i32 input_height: 17 : i32 input_width: 17 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 384 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,289,384,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 17 + d2, d3), memory_config: (289, 384, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,361,1024,bf16]> tensor<[1024,1,3,3,bf16]> tensor<[1,1,100,1024,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 361 + d1 * 361 + d2, d3), memory_config: (12, 32, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (3072, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (100, 1024, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1024 : i32 in_channels: 1024 : i32 input_height: 19 : i32 input_width: 19 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 1024 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,100,1024,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (100, 1024, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1,1024,bf16]> tensor<[1024,1024,1,1,bf16]> tensor<[1,1,1,1024,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 32, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 + d2, d3), memory_config: (1048576, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 1024, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1024 : i32 input_height: 1 : i32 input_width: 1 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 1024 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,1,1024,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 1024, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,1024,bf16]> tensor<[1024,16,3,3,bf16]> tensor<[1,1,196,1024,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 32, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 48 + d1 * 3 + d2, d3), memory_config: (49152, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 1024, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 64 : i32 in_channels: 1024 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 1024 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,196,1024,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 1024, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,1024,bf16]> tensor<[512,1024,3,3,bf16]> tensor<[1,1,784,512,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 32, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 * 3 + d2, d3), memory_config: (1572864, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 512, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1024 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 512 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,512,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 512, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,3600,1024,bf16]> tensor<[2048,1024,1,1,bf16]> tensor<[1,1,920,2048,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3600 + d1 * 3600 + d2, d3), memory_config: (113, 32, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 + d2, d3), memory_config: (2097152, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 920 + d1 * 40 + d2, d3), memory_config: (920, 2048, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1024 : i32 input_height: 45 : i32 input_width: 80 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 2048 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,920,2048,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 920 + d1 * 40 + d2, d3), memory_config: (920, 2048, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,3600,1024,bf16]> tensor<[256,1024,1,1,bf16]> tensor<[1,1,3600,256,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3600 + d1 * 3600 + d2, d3), memory_config: (113, 32, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 + d2, d3), memory_config: (262144, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3600 + d1 * 80 + d2, d3), memory_config: (3600, 256, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1024 : i32 input_height: 45 : i32 input_width: 80 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 256 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,3600,256,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3600 + d1 * 80 + d2, d3), memory_config: (3600, 256, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,3600,1024,bf16]> tensor<[512,1024,1,1,bf16]> tensor<[1,1,3600,512,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3600 + d1 * 3600 + d2, d3), memory_config: (113, 32, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 + d2, d3), memory_config: (524288, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3600 + d1 * 80 + d2, d3), memory_config: (3600, 512, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1024 : i32 input_height: 45 : i32 input_width: 80 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 512 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,3600,512,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3600 + d1 * 80 + d2, d3), memory_config: (3600, 512, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,512,1024,bf16]> tensor<[256,1024,1,1,bf16]> tensor<[1,1,512,256,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 512 + d1 * 512 + d2, d3), memory_config: (16, 32, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 + d2, d3), memory_config: (262144, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 512 + d1 + d2, d3), memory_config: (512, 256, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1024 : i32 input_height: 512 : i32 input_width: 1 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 256 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,512,256,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 512 + d1 + d2, d3), memory_config: (512, 256, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,1024,bf16]> tensor<[1024,1024,1,1,bf16]> tensor<[1,1,49,1024,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 32, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 + d2, d3), memory_config: (1048576, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 1024, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1024 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 1024 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,1024,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 1024, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,1024,bf16]> tensor<[1024,1024,3,3,bf16]> tensor<[1,1,49,1024,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 32, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 * 3 + d2, d3), memory_config: (3145728, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 1024, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1024 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 1024 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,1024,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 1024, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,1024,bf16]> tensor<[1024,1,3,3,bf16]> tensor<[1,1,49,1024,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 32, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (3072, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 1024, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1024 : i32 in_channels: 1024 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 1024 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,1024,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 1024, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,1024,bf16]> tensor<[128,1024,1,1,bf16]> tensor<[1,1,49,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 32, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 + d2, d3), memory_config: (131072, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1024 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,1024,bf16]> tensor<[2048,1024,1,1,bf16]> tensor<[1,1,49,2048,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 32, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 + d2, d3), memory_config: (2097152, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 2048, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1024 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 2048 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,2048,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 2048, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,1024,bf16]> tensor<[2048,1024,1,1,bf16]> tensor<[1,1,49,2048,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 32, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 + d2, d3), memory_config: (2097152, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 2048, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1024 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 2048 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,2048,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 2048, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,3136,102,bf16]> tensor<[40,102,3,3,bf16]> tensor<[1,1,3136,40,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 3136 + d2, d3), memory_config: (98, 4, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 306 + d1 * 3 + d2, d3), memory_config: (12240, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 40, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 102 : i32 input_height: 56 : i32 input_width: 56 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 40 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,3136,40,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 40, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,1056,bf16]> tensor<[128,1056,1,1,bf16]> tensor<[1,1,196,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 33, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1056 + d1 + d2, d3), memory_config: (135168, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1056 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,1056,bf16]> tensor<[128,1056,1,1,bf16]> tensor<[1,1,49,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 33, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1056 + d1 + d2, d3), memory_config: (135168, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1056 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,1072,bf16]> tensor<[462,1072,3,3,bf16]> tensor<[1,1,49,462,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 34, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3216 + d1 * 3 + d2, d3), memory_config: (1485792, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 462, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1072 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 462 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,462,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 462, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,1088,bf16]> tensor<[128,1088,1,1,bf16]> tensor<[1,1,196,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 34, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1088 + d1 + d2, d3), memory_config: (139264, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1088 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,1088,bf16]> tensor<[768,1088,1,1,bf16]> tensor<[1,1,196,768,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 34, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1088 + d1 + d2, d3), memory_config: (835584, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 768, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1088 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 768 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,768,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 768, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,1088,bf16]> tensor<[128,1088,1,1,bf16]> tensor<[1,1,49,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 34, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1088 + d1 + d2, d3), memory_config: (139264, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1088 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,1120,bf16]> tensor<[128,1120,1,1,bf16]> tensor<[1,1,196,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 35, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1120 + d1 + d2, d3), memory_config: (143360, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1120 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,1120,bf16]> tensor<[128,1120,1,1,bf16]> tensor<[1,1,49,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 35, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1120 + d1 + d2, d3), memory_config: (143360, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1120 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,112,bf16]> tensor<[112,1,5,5,bf16]> tensor<[1,1,49,112,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 4, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5 + d1 * 5 + d2, d3), memory_config: (560, 5, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 112, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 112 : i32 in_channels: 112 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 5 : i32 kernel_width: 5 : i32 out_channels: 112 : i32 padding_height: 2 : i32 padding_width: 2 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,49,112,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 112, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,112,bf16]> tensor<[224,112,3,3,bf16]> tensor<[1,1,196,224,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 4, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 336 + d1 * 3 + d2, d3), memory_config: (75264, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 224, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 112 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 224 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,224,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 224, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,112,bf16]> tensor<[336,112,1,1,bf16]> tensor<[1,1,196,336,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 4, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 112 + d1 + d2, d3), memory_config: (37632, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 336, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 112 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 336 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,336,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 336, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,112,bf16]> tensor<[672,112,1,1,bf16]> tensor<[1,1,196,672,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 4, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 112 + d1 + d2, d3), memory_config: (75264, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 672, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 112 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 672 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,672,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 672, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,225,112,bf16]> tensor<[672,112,1,1,bf16]> tensor<[1,1,225,672,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 225 + d1 * 225 + d2, d3), memory_config: (8, 4, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 112 + d1 + d2, d3), memory_config: (75264, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 225 + d1 * 15 + d2, d3), memory_config: (225, 672, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 112 : i32 input_height: 15 : i32 input_width: 15 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 672 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,225,672,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 225 + d1 * 15 + d2, d3), memory_config: (225, 672, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,400,112,f32]> tensor<[672,112,1,1,f32]> tensor<[1,1,400,672,f32]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 400 + d1 * 400 + d2, d3), memory_config: (13, 4, 'tile<32x32, f32>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 112 + d1 + d2, d3), memory_config: (75264, 1, 'f32', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 400 + d1 * 20 + d2, d3), memory_config: (400, 672, 'f32', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 112 : i32 input_height: 20 : i32 input_width: 20 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 672 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,400,672,f32]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 400 + d1 * 20 + d2, d3), memory_config: (400, 672, 'f32', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,576,112,bf16]> tensor<[672,112,1,1,bf16]> tensor<[1,1,576,672,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 576 + d1 * 576 + d2, d3), memory_config: (18, 4, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 112 + d1 + d2, d3), memory_config: (75264, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 576 + d1 * 24 + d2, d3), memory_config: (576, 672, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 112 : i32 input_height: 24 : i32 input_width: 24 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 672 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,576,672,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 576 + d1 * 24 + d2, d3), memory_config: (576, 672, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,112,bf16]> tensor<[160,112,1,1,bf16]> tensor<[1,1,49,160,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 4, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 112 + d1 + d2, d3), memory_config: (17920, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 160, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 112 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 160 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,160,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 160, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,112,bf16]> tensor<[672,112,1,1,bf16]> tensor<[1,1,49,672,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 4, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 112 + d1 + d2, d3), memory_config: (75264, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 672, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 112 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 672 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,672,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 672, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,1152,bf16]> tensor<[128,1152,1,1,bf16]> tensor<[1,1,196,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 36, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1152 + d1 + d2, d3), memory_config: (147456, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1152 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,1152,bf16]> tensor<[1152,1,3,3,bf16]> tensor<[1,1,49,1152,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 36, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (3456, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 1152, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1152 : i32 in_channels: 1152 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 1152 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,1152,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 1152, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,1152,bf16]> tensor<[1152,1,5,5,bf16]> tensor<[1,1,49,1152,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 36, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5 + d1 * 5 + d2, d3), memory_config: (5760, 5, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 1152, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1152 : i32 in_channels: 1152 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 5 : i32 kernel_width: 5 : i32 out_channels: 1152 : i32 padding_height: 2 : i32 padding_width: 2 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,1152,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 1152, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,1152,bf16]> tensor<[128,1152,1,1,bf16]> tensor<[1,1,49,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 36, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1152 + d1 + d2, d3), memory_config: (147456, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1152 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,1152,bf16]> tensor<[192,1152,1,1,bf16]> tensor<[1,1,49,192,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 36, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1152 + d1 + d2, d3), memory_config: (221184, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 192, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1152 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 192 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,192,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 192, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,1152,bf16]> tensor<[320,1152,1,1,bf16]> tensor<[1,1,49,320,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 36, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1152 + d1 + d2, d3), memory_config: (368640, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 320, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1152 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 320 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,320,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 320, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,64,1152,bf16]> tensor<[1152,1,3,3,bf16]> tensor<[1,1,64,1152,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 64 + d2, d3), memory_config: (2, 36, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (3456, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 8 + d2, d3), memory_config: (64, 1152, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1152 : i32 in_channels: 1152 : i32 input_height: 8 : i32 input_width: 8 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 1152 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,64,1152,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 8 + d2, d3), memory_config: (64, 1152, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,64,1152,bf16]> tensor<[1152,1,5,5,bf16]> tensor<[1,1,64,1152,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 64 + d2, d3), memory_config: (2, 36, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5 + d1 * 5 + d2, d3), memory_config: (5760, 5, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 8 + d2, d3), memory_config: (64, 1152, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1152 : i32 in_channels: 1152 : i32 input_height: 8 : i32 input_width: 8 : i32 kernel_height: 5 : i32 kernel_width: 5 : i32 out_channels: 1152 : i32 padding_height: 2 : i32 padding_width: 2 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,64,1152,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 8 + d2, d3), memory_config: (64, 1152, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,64,1152,bf16]> tensor<[192,1152,1,1,bf16]> tensor<[1,1,64,192,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 64 + d2, d3), memory_config: (2, 36, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1152 + d1 + d2, d3), memory_config: (221184, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 8 + d2, d3), memory_config: (64, 192, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1152 : i32 input_height: 8 : i32 input_width: 8 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 192 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,64,192,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 8 + d2, d3), memory_config: (64, 192, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,64,1152,bf16]> tensor<[320,1152,1,1,bf16]> tensor<[1,1,64,320,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 64 + d2, d3), memory_config: (2, 36, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1152 + d1 + d2, d3), memory_config: (368640, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 8 + d2, d3), memory_config: (64, 320, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1152 : i32 input_height: 8 : i32 input_width: 8 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 320 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,64,320,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 8 + d2, d3), memory_config: (64, 320, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,116,bf16]> tensor<[40,116,3,3,bf16]> tensor<[1,1,196,40,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 4, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 348 + d1 * 3 + d2, d3), memory_config: (13920, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 40, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 116 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 40 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,40,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 40, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,1184,bf16]> tensor<[128,1184,1,1,bf16]> tensor<[1,1,196,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 37, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1184 + d1 + d2, d3), memory_config: (151552, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1184 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,1184,bf16]> tensor<[128,1184,1,1,bf16]> tensor<[1,1,49,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 37, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1184 + d1 + d2, d3), memory_config: (151552, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1184 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,118,bf16]> tensor<[34,118,3,3,bf16]> tensor<[1,1,784,34,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 4, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 354 + d1 * 3 + d2, d3), memory_config: (12036, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 34, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 118 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 34 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,34,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 34, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,120,bf16]> tensor<[120,1,1,5,bf16]> tensor<[1,1,196,120,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 4, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (120, 5, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 120, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 120 : i32 in_channels: 120 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 5 : i32 out_channels: 120 : i32 padding_height: 0 : i32 padding_width: 2 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,120,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 120, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,120,bf16]> tensor<[120,1,5,1,bf16]> tensor<[1,1,196,120,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 4, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5 + d1 * 5 + d2, d3), memory_config: (600, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 120, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 120 : i32 in_channels: 120 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 5 : i32 kernel_width: 1 : i32 out_channels: 120 : i32 padding_height: 2 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,120,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 120, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,289,120,bf16]> tensor<[720,120,1,1,bf16]> tensor<[1,1,289,720,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 289 + d2, d3), memory_config: (10, 4, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 120 + d1 + d2, d3), memory_config: (86400, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 17 + d2, d3), memory_config: (289, 720, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 120 : i32 input_height: 17 : i32 input_width: 17 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 720 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,289,720,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 17 + d2, d3), memory_config: (289, 720, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1,120,bf16]> tensor<[32,120,1,1,bf16]> tensor<[1,1,1,32,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 4, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 120 + d1 + d2, d3), memory_config: (3840, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 32, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 120 : i32 input_height: 1 : i32 input_width: 1 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 32 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,1,32,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 32, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1,120,bf16]> tensor<[480,120,1,1,bf16]> tensor<[1,1,1,480,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 4, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 120 + d1 + d2, d3), memory_config: (57600, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 480, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 120 : i32 input_height: 1 : i32 input_width: 1 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 480 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,1,480,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 480, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,120,bf16]> tensor<[120,1,3,3,bf16]> tensor<[1,1,784,120,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 4, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (360, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 120, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 120 : i32 in_channels: 120 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 120 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,120,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 120, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,120,bf16]> tensor<[120,1,5,5,bf16]> tensor<[1,1,784,120,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 4, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5 + d1 * 5 + d2, d3), memory_config: (600, 5, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 120, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 120 : i32 in_channels: 120 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 5 : i32 kernel_width: 5 : i32 out_channels: 120 : i32 padding_height: 2 : i32 padding_width: 2 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,120,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 120, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,120,bf16]> tensor<[20,120,1,1,bf16]> tensor<[1,1,784,20,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 4, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 120 + d1 + d2, d3), memory_config: (2400, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 20, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 120 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 20 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,20,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 20, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,120,bf16]> tensor<[40,120,1,1,bf16]> tensor<[1,1,784,40,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 4, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 120 + d1 + d2, d3), memory_config: (4800, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 40, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 120 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 40 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,40,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 40, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1600,120,f32]> tensor<[120,1,5,5,f32]> tensor<[1,1,1600,120,f32]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1600 + d1 * 1600 + d2, d3), memory_config: (50, 4, 'tile<32x32, f32>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5 + d1 * 5 + d2, d3), memory_config: (600, 5, 'f32', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1600 + d1 * 40 + d2, d3), memory_config: (1600, 120, 'f32', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 120 : i32 in_channels: 120 : i32 input_height: 40 : i32 input_width: 40 : i32 kernel_height: 5 : i32 kernel_width: 5 : i32 out_channels: 120 : i32 padding_height: 2 : i32 padding_width: 2 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,1600,120,f32]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1600 + d1 * 40 + d2, d3), memory_config: (1600, 120, 'f32', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1600,120,f32]> tensor<[40,120,1,1,f32]> tensor<[1,1,1600,40,f32]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1600 + d1 * 1600 + d2, d3), memory_config: (50, 4, 'tile<32x32, f32>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 120 + d1 + d2, d3), memory_config: (4800, 1, 'f32', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1600 + d1 * 40 + d2, d3), memory_config: (1600, 40, 'f32', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 120 : i32 input_height: 40 : i32 input_width: 40 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 40 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,1600,40,f32]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1600 + d1 * 40 + d2, d3), memory_config: (1600, 40, 'f32', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,1216,bf16]> tensor<[128,1216,1,1,bf16]> tensor<[1,1,196,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 38, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1216 + d1 + d2, d3), memory_config: (155648, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1216 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,1216,bf16]> tensor<[128,1216,1,1,bf16]> tensor<[1,1,49,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 38, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1216 + d1 + d2, d3), memory_config: (155648, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1216 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,122,bf16]> tensor<[46,122,3,3,bf16]> tensor<[1,1,784,46,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 4, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 366 + d1 * 3 + d2, d3), memory_config: (16836, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 46, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 122 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 46 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,46,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 46, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,1248,bf16]> tensor<[128,1248,1,1,bf16]> tensor<[1,1,196,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 39, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1248 + d1 + d2, d3), memory_config: (159744, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1248 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,1248,bf16]> tensor<[128,1248,1,1,bf16]> tensor<[1,1,49,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 39, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1248 + d1 + d2, d3), memory_config: (159744, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1248 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,81,1248,bf16]> tensor<[1248,1,3,3,bf16]> tensor<[1,1,81,1248,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 81 + d1 * 81 + d2, d3), memory_config: (3, 39, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (3744, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 81 + d1 * 9 + d2, d3), memory_config: (81, 1248, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1248 : i32 in_channels: 1248 : i32 input_height: 9 : i32 input_width: 9 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 1248 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,81,1248,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 81 + d1 * 9 + d2, d3), memory_config: (81, 1248, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,81,1248,bf16]> tensor<[1248,1,5,5,bf16]> tensor<[1,1,81,1248,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 81 + d1 * 81 + d2, d3), memory_config: (3, 39, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5 + d1 * 5 + d2, d3), memory_config: (6240, 5, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 81 + d1 * 9 + d2, d3), memory_config: (81, 1248, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1248 : i32 in_channels: 1248 : i32 input_height: 9 : i32 input_width: 9 : i32 kernel_height: 5 : i32 kernel_width: 5 : i32 out_channels: 1248 : i32 padding_height: 2 : i32 padding_width: 2 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,81,1248,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 81 + d1 * 9 + d2, d3), memory_config: (81, 1248, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,81,1248,bf16]> tensor<[208,1248,1,1,bf16]> tensor<[1,1,81,208,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 81 + d1 * 81 + d2, d3), memory_config: (3, 39, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1248 + d1 + d2, d3), memory_config: (259584, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 81 + d1 * 9 + d2, d3), memory_config: (81, 208, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1248 : i32 input_height: 9 : i32 input_width: 9 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 208 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,81,208,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 81 + d1 * 9 + d2, d3), memory_config: (81, 208, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,81,1248,bf16]> tensor<[352,1248,1,1,bf16]> tensor<[1,1,81,352,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 81 + d1 * 81 + d2, d3), memory_config: (3, 39, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1248 + d1 + d2, d3), memory_config: (439296, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 81 + d1 * 9 + d2, d3), memory_config: (81, 352, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1248 : i32 input_height: 9 : i32 input_width: 9 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 352 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,81,352,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 81 + d1 * 9 + d2, d3), memory_config: (81, 352, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,3136,124,bf16]> tensor<[128,124,1,1,bf16]> tensor<[1,1,3136,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 3136 + d2, d3), memory_config: (98, 4, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 124 + d1 + d2, d3), memory_config: (15872, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 124 : i32 input_height: 56 : i32 input_width: 56 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,3136,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,1280,bf16]> tensor<[128,1280,1,1,bf16]> tensor<[1,1,196,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 40, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1280 + d1 + d2, d3), memory_config: (163840, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1280 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,256,1280,bf16]> tensor<[1280,1280,1,1,bf16]> tensor<[1,1,256,1280,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 256 + d2, d3), memory_config: (8, 40, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1280 + d1 + d2, d3), memory_config: (1638400, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (256, 1280, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1280 : i32 input_height: 16 : i32 input_width: 16 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 1280 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,256,1280,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (256, 1280, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,256,1280,bf16]> tensor<[1280,1280,3,3,bf16]> tensor<[1,1,256,1280,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 256 + d2, d3), memory_config: (8, 40, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3840 + d1 * 3 + d2, d3), memory_config: (4915200, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (256, 1280, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1280 : i32 input_height: 16 : i32 input_width: 16 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 1280 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,256,1280,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (256, 1280, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,256,1280,bf16]> tensor<[1280,1280,3,3,bf16]> tensor<[1,1,64,1280,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 256 + d2, d3), memory_config: (8, 40, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3840 + d1 * 3 + d2, d3), memory_config: (4915200, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 8 + d2, d3), memory_config: (64, 1280, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1280 : i32 input_height: 16 : i32 input_width: 16 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 1280 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,64,1280,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 8 + d2, d3), memory_config: (64, 1280, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1200,1280,bf16]> tensor<[1280,1,3,3,bf16]> tensor<[1,1,1200,1280,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1200 + d1 * 1200 + d2, d3), memory_config: (38, 40, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (3840, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1200 + d1 * 40 + d2, d3), memory_config: (1200, 1280, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1280 : i32 in_channels: 1280 : i32 input_height: 30 : i32 input_width: 40 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 1280 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,1200,1280,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1200 + d1 * 40 + d2, d3), memory_config: (1200, 1280, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1024,1280,bf16]> tensor<[1280,1280,3,3,bf16]> tensor<[1,1,1024,1280,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 1024 + d2, d3), memory_config: (32, 40, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3840 + d1 * 3 + d2, d3), memory_config: (4915200, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 1280, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1280 : i32 input_height: 32 : i32 input_width: 32 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 1280 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,1024,1280,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 1280, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1024,1280,bf16]> tensor<[640,1280,1,1,bf16]> tensor<[1,1,1024,640,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 1024 + d2, d3), memory_config: (32, 40, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1280 + d1 + d2, d3), memory_config: (819200, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 640, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1280 : i32 input_height: 32 : i32 input_width: 32 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 640 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,1024,640,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 640, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1024,1280,bf16]> tensor<[640,1280,3,3,bf16]> tensor<[1,1,1024,640,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 1024 + d2, d3), memory_config: (32, 40, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3840 + d1 * 3 + d2, d3), memory_config: (2457600, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 640, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1280 : i32 input_height: 32 : i32 input_width: 32 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 640 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,1024,640,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 640, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,1280,bf16]> tensor<[128,1280,1,1,bf16]> tensor<[1,1,49,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 40, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1280 + d1 + d2, d3), memory_config: (163840, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1280 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,1280,bf16]> tensor<[512,1280,1,1,bf16]> tensor<[1,1,49,512,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 40, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1280 + d1 + d2, d3), memory_config: (655360, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 512, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1280 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 512 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,512,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 512, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,64,1280,bf16]> tensor<[1280,1280,1,1,bf16]> tensor<[1,1,64,1280,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 64 + d2, d3), memory_config: (2, 40, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1280 + d1 + d2, d3), memory_config: (1638400, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 8 + d2, d3), memory_config: (64, 1280, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1280 : i32 input_height: 8 : i32 input_width: 8 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 1280 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,64,1280,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 8 + d2, d3), memory_config: (64, 1280, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,64,1280,bf16]> tensor<[1280,1280,3,3,bf16]> tensor<[1,1,64,1280,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 64 + d2, d3), memory_config: (2, 40, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3840 + d1 * 3 + d2, d3), memory_config: (4915200, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 8 + d2, d3), memory_config: (64, 1280, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1280 : i32 input_height: 8 : i32 input_width: 8 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 1280 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,64,1280,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 8 + d2, d3), memory_config: (64, 1280, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,12544,128,bf16]> tensor<[128,128,3,3,bf16]> tensor<[1,1,12544,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 12544 + d2, d3), memory_config: (392, 4, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 384 + d1 * 3 + d2, d3), memory_config: (49152, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (12544, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 128 : i32 input_height: 112 : i32 input_width: 112 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 128 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,12544,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (12544, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,12544,128,bf16]> tensor<[128,128,3,3,bf16]> tensor<[1,1,12544,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 12544 + d2, d3), memory_config: (392, 4, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 384 + d1 * 3 + d2, d3), memory_config: (49152, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (12544, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 128 : i32 input_height: 112 : i32 input_width: 112 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 128 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,12544,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (12544, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,19200,128,bf16]> tensor<[64,128,3,3,bf16]> tensor<[1,1,19200,64,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 19200 + d1 * 19200 + d2, d3), memory_config: (600, 4, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 384 + d1 * 3 + d2, d3), memory_config: (24576, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 19200 + d1 * 160 + d2, d3), memory_config: (19200, 64, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 128 : i32 input_height: 120 : i32 input_width: 160 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 64 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,19200,64,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 19200 + d1 * 160 + d2, d3), memory_config: (19200, 64, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,16384,128,bf16]> tensor<[128,1,3,3,bf16]> tensor<[1,1,16384,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 16384 + d2, d3), memory_config: (512, 4, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (384, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 128 + d2, d3), memory_config: (16384, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 128 : i32 in_channels: 128 : i32 input_height: 128 : i32 input_width: 128 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 128 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,16384,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 128 + d2, d3), memory_config: (16384, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,16384,128,bf16]> tensor<[256,128,3,3,bf16]> tensor<[1,1,4096,256,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 16384 + d2, d3), memory_config: (512, 4, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 384 + d1 * 3 + d2, d3), memory_config: (98304, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (4096, 256, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 128 : i32 input_height: 128 : i32 input_width: 128 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 256 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,4096,256,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (4096, 256, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,16384,128,bf16]> tensor<[64,128,1,1,bf16]> tensor<[1,1,16384,64,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 16384 + d2, d3), memory_config: (512, 4, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 128 + d1 + d2, d3), memory_config: (8192, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 128 + d2, d3), memory_config: (16384, 64, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 128 : i32 input_height: 128 : i32 input_width: 128 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 64 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,16384,64,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 128 + d2, d3), memory_config: (16384, 64, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,16384,128,bf16]> tensor<[64,128,3,3,bf16]> tensor<[1,1,16384,64,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 16384 + d2, d3), memory_config: (512, 4, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 384 + d1 * 3 + d2, d3), memory_config: (24576, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 128 + d2, d3), memory_config: (16384, 64, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 128 : i32 input_height: 128 : i32 input_width: 128 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 64 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,16384,64,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 128 + d2, d3), memory_config: (16384, 64, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,128,bf16]> tensor<[128,128,3,3,bf16]> tensor<[1,1,196,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 4, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 384 + d1 * 3 + d2, d3), memory_config: (49152, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 128 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 128 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,128,bf16]> tensor<[256,128,1,1,bf16]> tensor<[1,1,196,256,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 4, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 128 + d1 + d2, d3), memory_config: (32768, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 256, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 128 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 256 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,256,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 256, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,128,bf16]> tensor<[256,128,3,3,bf16]> tensor<[1,1,196,256,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 4, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 384 + d1 * 3 + d2, d3), memory_config: (98304, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 256, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 128 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 256 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,256,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 256, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,128,bf16]> tensor<[32,128,3,3,bf16]> tensor<[1,1,196,32,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 4, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 384 + d1 * 3 + d2, d3), memory_config: (12288, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 32, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 128 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 32 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,32,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 32, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,128,bf16]> tensor<[512,128,1,1,bf16]> tensor<[1,1,196,512,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 4, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 128 + d1 + d2, d3), memory_config: (65536, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 512, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 128 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 512 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,512,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 512, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,22500,128,bf16]> tensor<[128,128,1,1,bf16]> tensor<[1,1,22500,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 22500 + d1 * 22500 + d2, d3), memory_config: (704, 4, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 128 + d1 + d2, d3), memory_config: (16384, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 22500 + d1 * 150 + d2, d3), memory_config: (22500, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 128 : i32 input_height: 150 : i32 input_width: 150 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,22500,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 22500 + d1 * 150 + d2, d3), memory_config: (22500, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,22500,128,bf16]> tensor<[128,1,3,3,bf16]> tensor<[1,1,22500,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 22500 + d1 * 22500 + d2, d3), memory_config: (704, 4, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (384, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 22500 + d1 * 150 + d2, d3), memory_config: (22500, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 128 : i32 in_channels: 128 : i32 input_height: 150 : i32 input_width: 150 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 128 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,22500,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 22500 + d1 * 150 + d2, d3), memory_config: (22500, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,22500,128,bf16]> tensor<[128,1,3,3,bf16]> tensor<[1,1,5625,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 22500 + d1 * 22500 + d2, d3), memory_config: (704, 4, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (384, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5625 + d1 * 75 + d2, d3), memory_config: (5625, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 128 : i32 in_channels: 128 : i32 input_height: 150 : i32 input_width: 150 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 128 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,5625,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5625 + d1 * 75 + d2, d3), memory_config: (5625, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,57600,128,bf16]> tensor<[128,128,3,3,bf16]> tensor<[1,1,14400,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 57600 + d1 * 57600 + d2, d3), memory_config: (1800, 4, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 384 + d1 * 3 + d2, d3), memory_config: (49152, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 14400 + d1 * 160 + d2, d3), memory_config: (14400, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 128 : i32 input_height: 180 : i32 input_width: 320 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 128 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,14400,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 14400 + d1 * 160 + d2, d3), memory_config: (14400, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1,128,f32]> tensor<[128,1,3,3,f32]> tensor<[1,1,1,128,f32]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 4, 'tile<32x32, f32>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (384, 3, 'f32', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 128, 'f32', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 128 : i32 in_channels: 128 : i32 input_height: 1 : i32 input_width: 1 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 128 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,1,128,f32]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 128, 'f32', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1,128,f32]> tensor<[24,128,1,1,f32]> tensor<[1,1,1,24,f32]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 4, 'tile<32x32, f32>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 128 + d1 + d2, d3), memory_config: (3072, 1, 'f32', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 24, 'f32', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 128 : i32 input_height: 1 : i32 input_width: 1 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 24 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,1,24,f32]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 24, 'f32', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1,128,f32]> tensor<[546,128,1,1,f32]> tensor<[1,1,1,546,f32]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 4, 'tile<32x32, f32>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 128 + d1 + d2, d3), memory_config: (69888, 1, 'f32', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 546, 'f32', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 128 : i32 input_height: 1 : i32 input_width: 1 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 546 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,1,546,f32]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 546, 'f32', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,50176,128,bf16]> tensor<[64,128,3,3,bf16]> tensor<[1,1,50176,64,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 50176 + d1 * 50176 + d2, d3), memory_config: (1568, 4, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 384 + d1 * 3 + d2, d3), memory_config: (24576, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 50176 + d1 * 224 + d2, d3), memory_config: (50176, 64, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 128 : i32 input_height: 224 : i32 input_width: 224 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 64 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,50176,64,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 50176 + d1 * 224 + d2, d3), memory_config: (50176, 64, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,128,bf16]> tensor<[128,128,1,1,bf16]> tensor<[1,1,784,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 4, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 128 + d1 + d2, d3), memory_config: (16384, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 128 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,128,bf16]> tensor<[128,128,1,1,bf16]> tensor<[1,1,784,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 4, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 128 + d1 + d2, d3), memory_config: (16384, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 128 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,128,bf16]> tensor<[128,128,3,3,bf16]> tensor<[1,1,784,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 4, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 384 + d1 * 3 + d2, d3), memory_config: (49152, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 128 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 128 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,128,bf16]> tensor<[128,128,3,3,bf16]> tensor<[1,1,784,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 4, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 384 + d1 * 3 + d2, d3), memory_config: (49152, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 2 : i32 dilation_width: 2 : i32 groups: 1 : i32 in_channels: 128 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 128 : i32 padding_height: 2 : i32 padding_width: 2 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,128,bf16]> tensor<[128,128,3,3,bf16]> tensor<[1,1,784,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 4, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 384 + d1 * 3 + d2, d3), memory_config: (49152, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 128 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 128 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,128,bf16]> tensor<[128,1,3,3,bf16]> tensor<[1,1,784,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 4, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (384, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 128 : i32 in_channels: 128 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 128 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,128,bf16]> tensor<[16,128,3,3,bf16]> tensor<[1,1,784,16,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 4, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 384 + d1 * 3 + d2, d3), memory_config: (6144, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 16, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 128 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 16 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,16,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 16, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,128,bf16]> tensor<[192,128,3,3,bf16]> tensor<[1,1,784,192,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 4, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 384 + d1 * 3 + d2, d3), memory_config: (73728, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 192, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 128 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 192 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,192,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 192, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,128,bf16]> tensor<[19,128,1,1,bf16]> tensor<[1,1,784,19,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 4, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 128 + d1 + d2, d3), memory_config: (2432, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 19, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 128 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 19 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,19,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 19, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,128,bf16]> tensor<[256,128,1,1,bf16]> tensor<[1,1,784,256,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 4, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 128 + d1 + d2, d3), memory_config: (32768, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 256, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 128 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 256 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,256,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 256, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,128,bf16]> tensor<[256,128,1,1,bf16]> tensor<[1,1,196,256,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 4, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 128 + d1 + d2, d3), memory_config: (32768, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 256, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 128 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 256 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,196,256,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 256, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,128,bf16]> tensor<[256,128,3,3,bf16]> tensor<[1,1,196,256,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 4, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 384 + d1 * 3 + d2, d3), memory_config: (98304, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 256, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 128 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 256 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,196,256,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 256, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,128,bf16]> tensor<[32,128,3,3,bf16]> tensor<[1,1,784,32,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 4, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 384 + d1 * 3 + d2, d3), memory_config: (12288, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 32, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 128 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 32 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,32,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 32, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,128,bf16]> tensor<[38,128,1,1,bf16]> tensor<[1,1,784,38,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 4, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 128 + d1 + d2, d3), memory_config: (4864, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 38, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 128 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 38 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,38,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 38, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,128,bf16]> tensor<[512,128,1,1,bf16]> tensor<[1,1,784,512,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 4, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 128 + d1 + d2, d3), memory_config: (65536, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 512, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 128 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 512 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,512,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 512, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,128,bf16]> tensor<[512,128,1,1,bf16]> tensor<[1,1,784,512,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 4, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 128 + d1 + d2, d3), memory_config: (65536, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 512, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 128 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 512 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,512,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 512, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,4,128,f32]> tensor<[256,128,1,1,f32]> tensor<[1,1,4,256,f32]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4 + d1 * 4 + d2, d3), memory_config: (1, 4, 'tile<32x32, f32>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 128 + d1 + d2, d3), memory_config: (32768, 1, 'f32', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4 + d1 * 2 + d2, d3), memory_config: (4, 256, 'f32', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 128 : i32 input_height: 2 : i32 input_width: 2 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 256 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,4,256,f32]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4 + d1 * 2 + d2, d3), memory_config: (4, 256, 'f32', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1200,128,bf16]> tensor<[64,128,3,3,bf16]> tensor<[1,1,1200,64,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1200 + d1 * 1200 + d2, d3), memory_config: (38, 4, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 384 + d1 * 3 + d2, d3), memory_config: (24576, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1200 + d1 * 40 + d2, d3), memory_config: (1200, 64, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 128 : i32 input_height: 30 : i32 input_width: 40 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 64 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,1200,64,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1200 + d1 * 40 + d2, d3), memory_config: (1200, 64, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1024,128,bf16]> tensor<[128,128,1,1,bf16]> tensor<[1,1,1024,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 1024 + d2, d3), memory_config: (32, 4, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 128 + d1 + d2, d3), memory_config: (16384, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 128 : i32 input_height: 32 : i32 input_width: 32 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,1024,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1024,128,bf16]> tensor<[128,128,3,3,bf16]> tensor<[1,1,1024,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 1024 + d2, d3), memory_config: (32, 4, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 384 + d1 * 3 + d2, d3), memory_config: (49152, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 128 : i32 input_height: 32 : i32 input_width: 32 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 128 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,1024,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1024,128,bf16]> tensor<[256,128,3,3,bf16]> tensor<[1,1,1024,256,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 1024 + d2, d3), memory_config: (32, 4, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 384 + d1 * 3 + d2, d3), memory_config: (98304, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 256, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 128 : i32 input_height: 32 : i32 input_width: 32 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 256 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,1024,256,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 256, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,9,128,f32]> tensor<[128,1,3,3,f32]> tensor<[1,1,4,128,f32]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 9 + d1 * 9 + d2, d3), memory_config: (1, 4, 'tile<32x32, f32>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (384, 3, 'f32', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4 + d1 * 2 + d2, d3), memory_config: (4, 128, 'f32', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 128 : i32 in_channels: 128 : i32 input_height: 3 : i32 input_width: 3 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 128 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,4,128,f32]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4 + d1 * 2 + d2, d3), memory_config: (4, 128, 'f32', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,9,128,f32]> tensor<[256,128,1,1,f32]> tensor<[1,1,9,256,f32]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 9 + d1 * 9 + d2, d3), memory_config: (1, 4, 'tile<32x32, f32>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 128 + d1 + d2, d3), memory_config: (32768, 1, 'f32', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 9 + d1 * 3 + d2, d3), memory_config: (9, 256, 'f32', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 128 : i32 input_height: 3 : i32 input_width: 3 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 256 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,9,256,f32]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 9 + d1 * 3 + d2, d3), memory_config: (9, 256, 'f32', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,3136,128,bf16]> tensor<[128,128,1,1,bf16]> tensor<[1,1,3136,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 3136 + d2, d3), memory_config: (98, 4, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 128 + d1 + d2, d3), memory_config: (16384, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 128 : i32 input_height: 56 : i32 input_width: 56 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,3136,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,3136,128,bf16]> tensor<[128,128,3,3,bf16]> tensor<[1,1,3136,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 3136 + d2, d3), memory_config: (98, 4, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 384 + d1 * 3 + d2, d3), memory_config: (49152, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 128 : i32 input_height: 56 : i32 input_width: 56 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 128 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,3136,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,3136,128,bf16]> tensor<[128,128,3,3,bf16]> tensor<[1,1,784,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 3136 + d2, d3), memory_config: (98, 4, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 384 + d1 * 3 + d2, d3), memory_config: (49152, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 128 : i32 input_height: 56 : i32 input_width: 56 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 128 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,784,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,3136,128,bf16]> tensor<[128,1,3,3,bf16]> tensor<[1,1,3136,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 3136 + d2, d3), memory_config: (98, 4, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (384, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 128 : i32 in_channels: 128 : i32 input_height: 56 : i32 input_width: 56 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 128 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,3136,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,3136,128,bf16]> tensor<[128,1,3,3,bf16]> tensor<[1,1,784,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 3136 + d2, d3), memory_config: (98, 4, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (384, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 128 : i32 in_channels: 128 : i32 input_height: 56 : i32 input_width: 56 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 128 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,784,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,3136,128,bf16]> tensor<[256,128,1,1,bf16]> tensor<[1,1,3136,256,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 3136 + d2, d3), memory_config: (98, 4, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 128 + d1 + d2, d3), memory_config: (32768, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 256, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 128 : i32 input_height: 56 : i32 input_width: 56 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 256 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,3136,256,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 256, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,3136,128,bf16]> tensor<[256,128,3,3,bf16]> tensor<[1,1,3136,256,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 3136 + d2, d3), memory_config: (98, 4, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 384 + d1 * 3 + d2, d3), memory_config: (98304, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 256, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 128 : i32 input_height: 56 : i32 input_width: 56 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 256 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,3136,256,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 256, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,3136,128,bf16]> tensor<[256,128,3,3,bf16]> tensor<[1,1,784,256,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 3136 + d2, d3), memory_config: (98, 4, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 384 + d1 * 3 + d2, d3), memory_config: (98304, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 256, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 128 : i32 input_height: 56 : i32 input_width: 56 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 256 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,784,256,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 256, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,3136,128,bf16]> tensor<[256,128,3,3,bf16]> tensor<[1,1,3136,256,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 3136 + d2, d3), memory_config: (98, 4, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 384 + d1 * 3 + d2, d3), memory_config: (98304, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 256, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 128 : i32 input_height: 56 : i32 input_width: 56 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 256 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,3136,256,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 256, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,3136,128,bf16]> tensor<[32,128,3,3,bf16]> tensor<[1,1,3136,32,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 3136 + d2, d3), memory_config: (98, 4, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 384 + d1 * 3 + d2, d3), memory_config: (12288, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 32, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 128 : i32 input_height: 56 : i32 input_width: 56 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 32 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,3136,32,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 32, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,3136,128,bf16]> tensor<[64,128,1,1,bf16]> tensor<[1,1,3136,64,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 3136 + d2, d3), memory_config: (98, 4, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 128 + d1 + d2, d3), memory_config: (8192, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 64, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 128 : i32 input_height: 56 : i32 input_width: 56 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 64 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,3136,64,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 64, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,25,128,f32]> tensor<[128,1,3,3,f32]> tensor<[1,1,9,128,f32]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 25 + d1 * 25 + d2, d3), memory_config: (1, 4, 'tile<32x32, f32>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (384, 3, 'f32', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 9 + d1 * 3 + d2, d3), memory_config: (9, 128, 'f32', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 128 : i32 in_channels: 128 : i32 input_height: 5 : i32 input_width: 5 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 128 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,9,128,f32]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 9 + d1 * 3 + d2, d3), memory_config: (9, 128, 'f32', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,4800,128,bf16]> tensor<[128,128,4,4,bf16]> tensor<[1,1,300,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4800 + d1 * 4800 + d2, d3), memory_config: (150, 4, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 512 + d1 * 4 + d2, d3), memory_config: (65536, 4, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 300 + d1 * 20 + d2, d3), memory_config: (300, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 128 : i32 input_height: 60 : i32 input_width: 80 : i32 kernel_height: 4 : i32 kernel_width: 4 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 4 : i32 stride_width: 4 : i32 | tensor<[1,1,300,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 300 + d1 * 20 + d2, d3), memory_config: (300, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,4800,128,bf16]> tensor<[320,128,3,3,bf16]> tensor<[1,1,1200,320,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4800 + d1 * 4800 + d2, d3), memory_config: (150, 4, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 384 + d1 * 3 + d2, d3), memory_config: (122880, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1200 + d1 * 40 + d2, d3), memory_config: (1200, 320, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 128 : i32 input_height: 60 : i32 input_width: 80 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 320 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,1200,320,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1200 + d1 * 40 + d2, d3), memory_config: (1200, 320, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,4800,128,bf16]> tensor<[64,128,1,1,bf16]> tensor<[1,1,4800,64,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4800 + d1 * 4800 + d2, d3), memory_config: (150, 4, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 128 + d1 + d2, d3), memory_config: (8192, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4800 + d1 * 80 + d2, d3), memory_config: (4800, 64, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 128 : i32 input_height: 60 : i32 input_width: 80 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 64 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,4800,64,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4800 + d1 * 80 + d2, d3), memory_config: (4800, 64, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,4800,128,bf16]> tensor<[64,128,3,3,bf16]> tensor<[1,1,4800,64,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4800 + d1 * 4800 + d2, d3), memory_config: (150, 4, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 384 + d1 * 3 + d2, d3), memory_config: (24576, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4800 + d1 * 80 + d2, d3), memory_config: (4800, 64, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 128 : i32 input_height: 60 : i32 input_width: 80 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 64 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,4800,64,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4800 + d1 * 80 + d2, d3), memory_config: (4800, 64, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,4096,128,bf16]> tensor<[128,128,1,1,bf16]> tensor<[1,1,4096,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 4096 + d2, d3), memory_config: (128, 4, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 128 + d1 + d2, d3), memory_config: (16384, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (4096, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 128 : i32 input_height: 64 : i32 input_width: 64 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,4096,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (4096, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,4096,128,bf16]> tensor<[128,128,3,3,bf16]> tensor<[1,1,4096,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 4096 + d2, d3), memory_config: (128, 4, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 384 + d1 * 3 + d2, d3), memory_config: (49152, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (4096, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 128 : i32 input_height: 64 : i32 input_width: 64 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 128 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,4096,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (4096, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,4096,128,bf16]> tensor<[128,128,3,3,bf16]> tensor<[1,1,1024,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 4096 + d2, d3), memory_config: (128, 4, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 384 + d1 * 3 + d2, d3), memory_config: (49152, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 128 : i32 input_height: 64 : i32 input_width: 64 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 128 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,1024,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,4096,128,bf16]> tensor<[255,128,1,1,bf16]> tensor<[1,1,4096,255,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 4096 + d2, d3), memory_config: (128, 4, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 128 + d1 + d2, d3), memory_config: (32640, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (4096, 255, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 128 : i32 input_height: 64 : i32 input_width: 64 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 255 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,4096,255,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (4096, 255, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,4096,128,bf16]> tensor<[256,128,3,3,bf16]> tensor<[1,1,4096,256,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 4096 + d2, d3), memory_config: (128, 4, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 384 + d1 * 3 + d2, d3), memory_config: (98304, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (4096, 256, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 128 : i32 input_height: 64 : i32 input_width: 64 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 256 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,4096,256,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (4096, 256, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,4096,128,bf16]> tensor<[256,128,3,3,bf16]> tensor<[1,1,1024,256,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 4096 + d2, d3), memory_config: (128, 4, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 384 + d1 * 3 + d2, d3), memory_config: (98304, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 256, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 128 : i32 input_height: 64 : i32 input_width: 64 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 256 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,1024,256,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 256, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,4096,128,bf16]> tensor<[64,128,1,1,bf16]> tensor<[1,1,4096,64,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 4096 + d2, d3), memory_config: (128, 4, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 128 + d1 + d2, d3), memory_config: (8192, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (4096, 64, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 128 : i32 input_height: 64 : i32 input_width: 64 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 64 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,4096,64,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (4096, 64, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,5625,128,bf16]> tensor<[128,128,1,1,bf16]> tensor<[1,1,5625,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5625 + d1 * 5625 + d2, d3), memory_config: (176, 4, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 128 + d1 + d2, d3), memory_config: (16384, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5625 + d1 * 75 + d2, d3), memory_config: (5625, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 128 : i32 input_height: 75 : i32 input_width: 75 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,5625,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5625 + d1 * 75 + d2, d3), memory_config: (5625, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,5625,128,bf16]> tensor<[128,1,3,3,bf16]> tensor<[1,1,5625,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5625 + d1 * 5625 + d2, d3), memory_config: (176, 4, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (384, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5625 + d1 * 75 + d2, d3), memory_config: (5625, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 128 : i32 in_channels: 128 : i32 input_height: 75 : i32 input_width: 75 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 128 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,5625,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5625 + d1 * 75 + d2, d3), memory_config: (5625, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,5625,128,bf16]> tensor<[256,128,1,1,bf16]> tensor<[1,1,5625,256,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5625 + d1 * 5625 + d2, d3), memory_config: (176, 4, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 128 + d1 + d2, d3), memory_config: (32768, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5625 + d1 * 75 + d2, d3), memory_config: (5625, 256, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 128 : i32 input_height: 75 : i32 input_width: 75 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 256 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,5625,256,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5625 + d1 * 75 + d2, d3), memory_config: (5625, 256, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,128,bf16]> tensor<[32,128,3,3,bf16]> tensor<[1,1,49,32,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 4, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 384 + d1 * 3 + d2, d3), memory_config: (12288, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 32, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 128 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 32 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,32,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 32, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,14400,128,bf16]> tensor<[128,128,3,3,bf16]> tensor<[1,1,14400,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 14400 + d1 * 14400 + d2, d3), memory_config: (450, 4, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 384 + d1 * 3 + d2, d3), memory_config: (49152, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 14400 + d1 * 160 + d2, d3), memory_config: (14400, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 128 : i32 input_height: 90 : i32 input_width: 160 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 128 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,14400,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 14400 + d1 * 160 + d2, d3), memory_config: (14400, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,14400,128,bf16]> tensor<[512,128,1,1,bf16]> tensor<[1,1,14400,512,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 14400 + d1 * 14400 + d2, d3), memory_config: (450, 4, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 128 + d1 + d2, d3), memory_config: (65536, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 14400 + d1 * 160 + d2, d3), memory_config: (14400, 512, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 128 : i32 input_height: 90 : i32 input_width: 160 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 512 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,14400,512,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 14400 + d1 * 160 + d2, d3), memory_config: (14400, 512, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,3136,12,bf16]> tensor<[12,1,3,3,bf16]> tensor<[1,1,3136,12,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 3136 + d2, d3), memory_config: (98, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (36, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 12, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 12 : i32 in_channels: 12 : i32 input_height: 56 : i32 input_width: 56 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 12 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,3136,12,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 12, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,1312,bf16]> tensor<[128,1312,1,1,bf16]> tensor<[1,1,196,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 41, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1312 + d1 + d2, d3), memory_config: (167936, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1312 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,1312,bf16]> tensor<[128,1312,1,1,bf16]> tensor<[1,1,49,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 41, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1312 + d1 + d2, d3), memory_config: (167936, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1312 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,1344,bf16]> tensor<[128,1344,1,1,bf16]> tensor<[1,1,196,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 42, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1344 + d1 + d2, d3), memory_config: (172032, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1344 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,1344,bf16]> tensor<[1344,1344,1,1,bf16]> tensor<[1,1,196,1344,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 42, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1344 + d1 + d2, d3), memory_config: (1806336, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 1344, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1344 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 1344 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,1344,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 1344, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,1344,bf16]> tensor<[1344,168,3,3,bf16]> tensor<[1,1,196,1344,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 42, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 504 + d1 * 3 + d2, d3), memory_config: (677376, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 1344, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 8 : i32 in_channels: 1344 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 1344 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,1344,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 1344, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,1344,bf16]> tensor<[2520,1344,1,1,bf16]> tensor<[1,1,196,2520,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 42, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1344 + d1 + d2, d3), memory_config: (3386880, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 2520, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1344 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 2520 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,2520,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 2520, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,1344,bf16]> tensor<[2520,1344,1,1,bf16]> tensor<[1,1,49,2520,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 42, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1344 + d1 + d2, d3), memory_config: (3386880, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 2520, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1344 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 2520 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,49,2520,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 2520, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,1344,bf16]> tensor<[1344,168,3,3,bf16]> tensor<[1,1,196,1344,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 42, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 504 + d1 * 3 + d2, d3), memory_config: (677376, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 1344, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 8 : i32 in_channels: 1344 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 1344 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,196,1344,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 1344, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,1344,bf16]> tensor<[128,1344,1,1,bf16]> tensor<[1,1,49,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 42, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1344 + d1 + d2, d3), memory_config: (172032, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1344 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,361,136,bf16]> tensor<[816,136,1,1,bf16]> tensor<[1,1,361,816,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 361 + d1 * 361 + d2, d3), memory_config: (12, 5, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 136 + d1 + d2, d3), memory_config: (110976, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 361 + d1 * 19 + d2, d3), memory_config: (361, 816, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 136 : i32 input_height: 19 : i32 input_width: 19 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 816 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,361,816,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 361 + d1 * 19 + d2, d3), memory_config: (361, 816, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,1376,bf16]> tensor<[128,1376,1,1,bf16]> tensor<[1,1,196,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 43, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1376 + d1 + d2, d3), memory_config: (176128, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1376 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,1376,bf16]> tensor<[128,1376,1,1,bf16]> tensor<[1,1,49,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 43, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1376 + d1 + d2, d3), memory_config: (176128, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1376 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,100,1392,bf16]> tensor<[1392,1,3,3,bf16]> tensor<[1,1,100,1392,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 100 + d2, d3), memory_config: (4, 44, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (4176, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (100, 1392, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1392 : i32 in_channels: 1392 : i32 input_height: 10 : i32 input_width: 10 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 1392 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,100,1392,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (100, 1392, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,100,1392,bf16]> tensor<[1392,1,5,5,bf16]> tensor<[1,1,100,1392,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 100 + d2, d3), memory_config: (4, 44, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5 + d1 * 5 + d2, d3), memory_config: (6960, 5, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (100, 1392, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1392 : i32 in_channels: 1392 : i32 input_height: 10 : i32 input_width: 10 : i32 kernel_height: 5 : i32 kernel_width: 5 : i32 out_channels: 1392 : i32 padding_height: 2 : i32 padding_width: 2 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,100,1392,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (100, 1392, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,100,1392,bf16]> tensor<[232,1392,1,1,bf16]> tensor<[1,1,100,232,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 100 + d2, d3), memory_config: (4, 44, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1392 + d1 + d2, d3), memory_config: (322944, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (100, 232, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1392 : i32 input_height: 10 : i32 input_width: 10 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 232 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,100,232,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (100, 232, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,100,1392,bf16]> tensor<[384,1392,1,1,bf16]> tensor<[1,1,100,384,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 100 + d2, d3), memory_config: (4, 44, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1392 + d1 + d2, d3), memory_config: (534528, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (100, 384, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1392 : i32 input_height: 10 : i32 input_width: 10 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 384 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,100,384,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (100, 384, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,1392,bf16]> tensor<[1392,1392,1,1,bf16]> tensor<[1,1,196,1392,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 44, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1392 + d1 + d2, d3), memory_config: (1937664, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 1392, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1392 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 1392 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,1392,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 1392, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,1392,bf16]> tensor<[1392,232,3,3,bf16]> tensor<[1,1,196,1392,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 44, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 696 + d1 * 3 + d2, d3), memory_config: (968832, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 1392, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 6 : i32 in_channels: 1392 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 1392 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,1392,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 1392, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,1392,bf16]> tensor<[3712,1392,1,1,bf16]> tensor<[1,1,196,3712,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 44, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1392 + d1 + d2, d3), memory_config: (5167104, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 3712, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1392 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 3712 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,3712,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 3712, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,1392,bf16]> tensor<[3712,1392,1,1,bf16]> tensor<[1,1,49,3712,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 44, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1392 + d1 + d2, d3), memory_config: (5167104, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 3712, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1392 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 3712 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,49,3712,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 3712, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1,1392,bf16]> tensor<[174,1392,1,1,bf16]> tensor<[1,1,1,174,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 44, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1392 + d1 + d2, d3), memory_config: (242208, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 174, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1392 : i32 input_height: 1 : i32 input_width: 1 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 174 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,1,174,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 174, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1,1392,bf16]> tensor<[348,1392,1,1,bf16]> tensor<[1,1,1,348,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 44, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1392 + d1 + d2, d3), memory_config: (484416, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 348, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1392 : i32 input_height: 1 : i32 input_width: 1 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 348 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,1,348,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 348, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,1392,bf16]> tensor<[1392,232,3,3,bf16]> tensor<[1,1,196,1392,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 44, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 696 + d1 * 3 + d2, d3), memory_config: (968832, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 1392, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 6 : i32 in_channels: 1392 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 1392 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,196,1392,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 1392, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,1408,bf16]> tensor<[128,1408,1,1,bf16]> tensor<[1,1,196,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 44, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1408 + d1 + d2, d3), memory_config: (180224, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1408 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,1408,bf16]> tensor<[128,1408,1,1,bf16]> tensor<[1,1,49,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 44, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1408 + d1 + d2, d3), memory_config: (180224, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1408 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,3136,142,bf16]> tensor<[68,142,3,3,bf16]> tensor<[1,1,3136,68,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 3136 + d2, d3), memory_config: (98, 5, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 426 + d1 * 3 + d2, d3), memory_config: (28968, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 68, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 142 : i32 input_height: 56 : i32 input_width: 56 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 68 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,3136,68,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 68, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,1440,bf16]> tensor<[128,1440,1,1,bf16]> tensor<[1,1,196,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 45, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1440 + d1 + d2, d3), memory_config: (184320, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1440 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,1440,bf16]> tensor<[1024,1440,1,1,bf16]> tensor<[1,1,49,1024,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 45, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1440 + d1 + d2, d3), memory_config: (1474560, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 1024, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1440 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 1024 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,1024,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 1024, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,1440,bf16]> tensor<[128,1440,1,1,bf16]> tensor<[1,1,49,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 45, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1440 + d1 + d2, d3), memory_config: (184320, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1440 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,144,bf16]> tensor<[288,144,3,3,bf16]> tensor<[1,1,196,288,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 5, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 432 + d1 * 3 + d2, d3), memory_config: (124416, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 288, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 144 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 288 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,288,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 288, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,22801,144,bf16]> tensor<[144,1,3,3,bf16]> tensor<[1,1,5625,144,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 22801 + d1 * 22801 + d2, d3), memory_config: (713, 5, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (432, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5625 + d1 * 75 + d2, d3), memory_config: (5625, 144, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 144 : i32 in_channels: 144 : i32 input_height: 151 : i32 input_width: 151 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 144 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,5625,144,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5625 + d1 * 75 + d2, d3), memory_config: (5625, 144, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,36481,144,bf16]> tensor<[144,1,3,3,bf16]> tensor<[1,1,9025,144,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 36481 + d1 * 36481 + d2, d3), memory_config: (1141, 5, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (432, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 9025 + d1 * 95 + d2, d3), memory_config: (9025, 144, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 144 : i32 in_channels: 144 : i32 input_height: 191 : i32 input_width: 191 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 144 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,9025,144,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 9025 + d1 * 95 + d2, d3), memory_config: (9025, 144, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,144,bf16]> tensor<[28,144,3,3,bf16]> tensor<[1,1,784,28,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 5, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 432 + d1 * 3 + d2, d3), memory_config: (12096, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 28, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 144 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 28 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,28,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 28, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,144,bf16]> tensor<[32,144,1,1,bf16]> tensor<[1,1,784,32,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 5, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 144 + d1 + d2, d3), memory_config: (4608, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 32, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 144 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 32 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,32,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 32, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,144,bf16]> tensor<[40,144,1,1,bf16]> tensor<[1,1,784,40,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 5, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 144 + d1 + d2, d3), memory_config: (5760, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 40, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 144 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 40 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,40,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 40, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,900,144,bf16]> tensor<[40,144,1,1,bf16]> tensor<[1,1,900,40,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 900 + d1 * 900 + d2, d3), memory_config: (29, 5, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 144 + d1 + d2, d3), memory_config: (5760, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 900 + d1 * 30 + d2, d3), memory_config: (900, 40, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 144 : i32 input_height: 30 : i32 input_width: 30 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 40 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,900,40,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 900 + d1 * 30 + d2, d3), memory_config: (900, 40, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1089,144,bf16]> tensor<[48,144,1,1,bf16]> tensor<[1,1,1089,48,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1089 + d1 * 1089 + d2, d3), memory_config: (35, 5, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 144 + d1 + d2, d3), memory_config: (6912, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1089 + d1 * 33 + d2, d3), memory_config: (1089, 48, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 144 : i32 input_height: 33 : i32 input_width: 33 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 48 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,1089,48,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1089 + d1 * 33 + d2, d3), memory_config: (1089, 48, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,3136,144,bf16]> tensor<[144,1,3,3,bf16]> tensor<[1,1,3136,144,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 3136 + d2, d3), memory_config: (98, 5, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (432, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 144, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 144 : i32 in_channels: 144 : i32 input_height: 56 : i32 input_width: 56 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 144 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,3136,144,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 144, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,3136,144,bf16]> tensor<[144,1,3,3,bf16]> tensor<[1,1,784,144,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 3136 + d2, d3), memory_config: (98, 5, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (432, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 144, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 144 : i32 in_channels: 144 : i32 input_height: 56 : i32 input_width: 56 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 144 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,784,144,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 144, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,3136,144,bf16]> tensor<[24,144,1,1,bf16]> tensor<[1,1,3136,24,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 3136 + d2, d3), memory_config: (98, 5, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 144 + d1 + d2, d3), memory_config: (3456, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 24, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 144 : i32 input_height: 56 : i32 input_width: 56 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 24 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,3136,24,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 24, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,3481,144,bf16]> tensor<[144,1,5,5,bf16]> tensor<[1,1,784,144,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3481 + d1 * 3481 + d2, d3), memory_config: (109, 5, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5 + d1 * 5 + d2, d3), memory_config: (720, 5, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 144, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 144 : i32 in_channels: 144 : i32 input_height: 59 : i32 input_width: 59 : i32 kernel_height: 5 : i32 kernel_width: 5 : i32 out_channels: 144 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,784,144,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 144, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,3600,144,bf16]> tensor<[144,1,3,3,bf16]> tensor<[1,1,3600,144,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3600 + d1 * 3600 + d2, d3), memory_config: (113, 5, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (432, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3600 + d1 * 60 + d2, d3), memory_config: (3600, 144, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 144 : i32 in_channels: 144 : i32 input_height: 60 : i32 input_width: 60 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 144 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,3600,144,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3600 + d1 * 60 + d2, d3), memory_config: (3600, 144, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,3600,144,bf16]> tensor<[24,144,1,1,bf16]> tensor<[1,1,3600,24,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3600 + d1 * 3600 + d2, d3), memory_config: (113, 5, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 144 + d1 + d2, d3), memory_config: (3456, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3600 + d1 * 60 + d2, d3), memory_config: (3600, 24, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 144 : i32 input_height: 60 : i32 input_width: 60 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 24 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,3600,24,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3600 + d1 * 60 + d2, d3), memory_config: (3600, 24, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,3969,144,bf16]> tensor<[144,1,5,5,bf16]> tensor<[1,1,900,144,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3969 + d1 * 3969 + d2, d3), memory_config: (125, 5, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5 + d1 * 5 + d2, d3), memory_config: (720, 5, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 900 + d1 * 30 + d2, d3), memory_config: (900, 144, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 144 : i32 in_channels: 144 : i32 input_height: 63 : i32 input_width: 63 : i32 kernel_height: 5 : i32 kernel_width: 5 : i32 out_channels: 144 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,900,144,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 900 + d1 * 30 + d2, d3), memory_config: (900, 144, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,4225,144,bf16]> tensor<[144,1,3,3,bf16]> tensor<[1,1,4225,144,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4225 + d1 * 4225 + d2, d3), memory_config: (133, 5, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (432, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4225 + d1 * 65 + d2, d3), memory_config: (4225, 144, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 144 : i32 in_channels: 144 : i32 input_height: 65 : i32 input_width: 65 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 144 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,4225,144,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4225 + d1 * 65 + d2, d3), memory_config: (4225, 144, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,4225,144,bf16]> tensor<[24,144,1,1,bf16]> tensor<[1,1,4225,24,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4225 + d1 * 4225 + d2, d3), memory_config: (133, 5, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 144 + d1 + d2, d3), memory_config: (3456, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4225 + d1 * 65 + d2, d3), memory_config: (4225, 24, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 144 : i32 input_height: 65 : i32 input_width: 65 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 24 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,4225,24,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4225 + d1 * 65 + d2, d3), memory_config: (4225, 24, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,4761,144,bf16]> tensor<[144,1,5,5,bf16]> tensor<[1,1,1089,144,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4761 + d1 * 4761 + d2, d3), memory_config: (149, 5, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5 + d1 * 5 + d2, d3), memory_config: (720, 5, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1089 + d1 * 33 + d2, d3), memory_config: (1089, 144, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 144 : i32 in_channels: 144 : i32 input_height: 69 : i32 input_width: 69 : i32 kernel_height: 5 : i32 kernel_width: 5 : i32 out_channels: 144 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,1089,144,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1089 + d1 * 33 + d2, d3), memory_config: (1089, 144, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,5625,144,bf16]> tensor<[32,144,1,1,bf16]> tensor<[1,1,5625,32,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5625 + d1 * 5625 + d2, d3), memory_config: (176, 5, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 144 + d1 + d2, d3), memory_config: (4608, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5625 + d1 * 75 + d2, d3), memory_config: (5625, 32, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 144 : i32 input_height: 75 : i32 input_width: 75 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 32 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,5625,32,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5625 + d1 * 75 + d2, d3), memory_config: (5625, 32, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,144,bf16]> tensor<[1024,144,1,1,bf16]> tensor<[1,1,49,1024,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 5, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 144 + d1 + d2, d3), memory_config: (147456, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 1024, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 144 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 1024 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,1024,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 1024, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,144,bf16]> tensor<[144,144,3,3,bf16]> tensor<[1,1,49,144,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 5, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 432 + d1 * 3 + d2, d3), memory_config: (62208, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 144, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 144 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 144 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,144,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 144, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,144,bf16]> tensor<[18,144,1,1,bf16]> tensor<[1,1,49,18,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 5, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 144 + d1 + d2, d3), memory_config: (2592, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 18, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 144 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 18 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,18,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 18, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,144,bf16]> tensor<[256,144,1,1,bf16]> tensor<[1,1,49,256,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 5, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 144 + d1 + d2, d3), memory_config: (36864, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 256, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 144 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 256 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,256,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 256, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,144,bf16]> tensor<[36,144,1,1,bf16]> tensor<[1,1,49,36,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 5, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 144 + d1 + d2, d3), memory_config: (5184, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 36, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 144 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 36 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,36,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 36, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,144,bf16]> tensor<[72,144,1,1,bf16]> tensor<[1,1,49,72,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 5, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 144 + d1 + d2, d3), memory_config: (10368, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 72, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 144 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 72 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,72,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 72, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,9025,144,bf16]> tensor<[32,144,1,1,bf16]> tensor<[1,1,9025,32,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 9025 + d1 * 9025 + d2, d3), memory_config: (283, 5, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 144 + d1 + d2, d3), memory_config: (4608, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 9025 + d1 * 95 + d2, d3), memory_config: (9025, 32, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 144 : i32 input_height: 95 : i32 input_width: 95 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 32 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,9025,32,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 9025 + d1 * 95 + d2, d3), memory_config: (9025, 32, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,1472,bf16]> tensor<[128,1472,1,1,bf16]> tensor<[1,1,196,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 46, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1472 + d1 + d2, d3), memory_config: (188416, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1472 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,1472,bf16]> tensor<[128,1472,1,1,bf16]> tensor<[1,1,49,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 46, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1472 + d1 + d2, d3), memory_config: (188416, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1472 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,1504,bf16]> tensor<[128,1504,1,1,bf16]> tensor<[1,1,196,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 47, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1504 + d1 + d2, d3), memory_config: (192512, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1504 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,1504,bf16]> tensor<[128,1504,1,1,bf16]> tensor<[1,1,49,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 47, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1504 + d1 + d2, d3), memory_config: (192512, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1504 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,152,bf16]> tensor<[58,152,3,3,bf16]> tensor<[1,1,784,58,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 5, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 456 + d1 * 3 + d2, d3), memory_config: (26448, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 58, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 152 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 58 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,58,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 58, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,100,1536,bf16]> tensor<[1536,1536,1,1,bf16]> tensor<[1,1,100,1536,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 100 + d2, d3), memory_config: (4, 48, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1536 + d1 + d2, d3), memory_config: (2359296, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (100, 1536, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1536 : i32 input_height: 10 : i32 input_width: 10 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 1536 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,100,1536,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (100, 1536, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,100,1536,bf16]> tensor<[1536,1,3,3,bf16]> tensor<[1,1,100,1536,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 100 + d2, d3), memory_config: (4, 48, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (4608, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (100, 1536, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1536 : i32 in_channels: 1536 : i32 input_height: 10 : i32 input_width: 10 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 1536 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,100,1536,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (100, 1536, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,100,1536,bf16]> tensor<[2048,1536,1,1,bf16]> tensor<[1,1,100,2048,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 100 + d2, d3), memory_config: (4, 48, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1536 + d1 + d2, d3), memory_config: (3145728, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (100, 2048, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1536 : i32 input_height: 10 : i32 input_width: 10 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 2048 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,100,2048,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (100, 2048, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,1536,bf16]> tensor<[128,1536,1,1,bf16]> tensor<[1,1,196,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 48, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1536 + d1 + d2, d3), memory_config: (196608, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1536 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,1536,bf16]> tensor<[128,1536,1,1,bf16]> tensor<[1,1,49,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 48, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1536 + d1 + d2, d3), memory_config: (196608, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1536 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,64,1536,bf16]> tensor<[256,1536,1,1,bf16]> tensor<[1,1,64,256,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 64 + d2, d3), memory_config: (2, 48, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1536 + d1 + d2, d3), memory_config: (393216, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 8 + d2, d3), memory_config: (64, 256, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1536 : i32 input_height: 8 : i32 input_width: 8 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 256 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,64,256,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 8 + d2, d3), memory_config: (64, 256, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,64,1536,bf16]> tensor<[384,1536,1,1,bf16]> tensor<[1,1,64,384,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 64 + d2, d3), memory_config: (2, 48, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1536 + d1 + d2, d3), memory_config: (589824, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 8 + d2, d3), memory_config: (64, 384, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1536 : i32 input_height: 8 : i32 input_width: 8 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 384 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,64,384,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 8 + d2, d3), memory_config: (64, 384, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,1568,bf16]> tensor<[128,1568,1,1,bf16]> tensor<[1,1,196,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 49, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1568 + d1 + d2, d3), memory_config: (200704, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1568 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,1568,bf16]> tensor<[128,1568,1,1,bf16]> tensor<[1,1,49,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 49, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1568 + d1 + d2, d3), memory_config: (200704, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1568 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,156,bf16]> tensor<[68,156,3,3,bf16]> tensor<[1,1,196,68,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 5, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 468 + d1 * 3 + d2, d3), memory_config: (31824, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 68, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 156 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 68 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,68,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 68, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,1600,bf16]> tensor<[128,1600,1,1,bf16]> tensor<[1,1,196,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 50, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1600 + d1 + d2, d3), memory_config: (204800, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1600 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,1600,bf16]> tensor<[128,1600,1,1,bf16]> tensor<[1,1,49,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 50, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1600 + d1 + d2, d3), memory_config: (204800, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1600 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,160,bf16]> tensor<[320,160,3,3,bf16]> tensor<[1,1,196,320,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 5, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 480 + d1 * 3 + d2, d3), memory_config: (153600, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 320, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 160 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 320 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,320,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 320, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,576,160,bf16]> tensor<[960,160,1,1,bf16]> tensor<[1,1,576,960,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 576 + d1 * 576 + d2, d3), memory_config: (18, 5, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 160 + d1 + d2, d3), memory_config: (153600, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 576 + d1 * 24 + d2, d3), memory_config: (576, 960, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 160 : i32 input_height: 24 : i32 input_width: 24 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 960 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,576,960,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 576 + d1 * 24 + d2, d3), memory_config: (576, 960, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,160,bf16]> tensor<[128,160,1,1,bf16]> tensor<[1,1,784,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 5, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 160 + d1 + d2, d3), memory_config: (20480, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 160 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,160,bf16]> tensor<[160,160,1,1,bf16]> tensor<[1,1,784,160,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 5, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 160 + d1 + d2, d3), memory_config: (25600, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 160, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 160 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 160 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,160,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 160, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,160,bf16]> tensor<[160,1,3,3,bf16]> tensor<[1,1,784,160,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 5, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (480, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 160, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 160 : i32 in_channels: 160 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 160 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,160,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 160, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1024,160,bf16]> tensor<[160,160,2,2,bf16]> tensor<[1,1,256,160,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 1024 + d2, d3), memory_config: (32, 5, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 320 + d1 * 2 + d2, d3), memory_config: (51200, 2, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (256, 160, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 160 : i32 input_height: 32 : i32 input_width: 32 : i32 kernel_height: 2 : i32 kernel_width: 2 : i32 out_channels: 160 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,256,160,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (256, 160, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1024,160,bf16]> tensor<[256,160,3,3,bf16]> tensor<[1,1,256,256,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 1024 + d2, d3), memory_config: (32, 5, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 480 + d1 * 3 + d2, d3), memory_config: (122880, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (256, 256, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 160 : i32 input_height: 32 : i32 input_width: 32 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 256 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,256,256,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (256, 256, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,9,160,bf16]> tensor<[960,160,1,1,bf16]> tensor<[1,1,9,960,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 9 + d1 * 9 + d2, d3), memory_config: (1, 5, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 160 + d1 + d2, d3), memory_config: (153600, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 9 + d1 * 3 + d2, d3), memory_config: (9, 960, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 160 : i32 input_height: 3 : i32 input_width: 3 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 960 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,9,960,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 9 + d1 * 3 + d2, d3), memory_config: (9, 960, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,3136,160,bf16]> tensor<[128,160,1,1,bf16]> tensor<[1,1,3136,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 3136 + d2, d3), memory_config: (98, 5, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 160 + d1 + d2, d3), memory_config: (20480, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 160 : i32 input_height: 56 : i32 input_width: 56 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,3136,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,5329,160,bf16]> tensor<[64,160,1,1,bf16]> tensor<[1,1,5329,64,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5329 + d1 * 5329 + d2, d3), memory_config: (167, 5, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 160 + d1 + d2, d3), memory_config: (10240, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5329 + d1 * 73 + d2, d3), memory_config: (5329, 64, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 160 : i32 input_height: 73 : i32 input_width: 73 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 64 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,5329,64,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5329 + d1 * 73 + d2, d3), memory_config: (5329, 64, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,160,bf16]> tensor<[320,160,3,3,bf16]> tensor<[1,1,49,320,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 5, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 480 + d1 * 3 + d2, d3), memory_config: (153600, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 320, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 160 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 320 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,320,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 320, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,160,bf16]> tensor<[480,160,1,1,bf16]> tensor<[1,1,49,480,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 5, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 160 + d1 + d2, d3), memory_config: (76800, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 480, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 160 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 480 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,480,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 480, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,160,bf16]> tensor<[960,160,1,1,bf16]> tensor<[1,1,49,960,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 5, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 160 + d1 + d2, d3), memory_config: (153600, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 960, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 160 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 960 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,960,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 960, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,144,1632,bf16]> tensor<[1632,1,3,3,bf16]> tensor<[1,1,144,1632,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 144 + d1 * 144 + d2, d3), memory_config: (5, 51, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (4896, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 144 + d1 * 12 + d2, d3), memory_config: (144, 1632, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1632 : i32 in_channels: 1632 : i32 input_height: 12 : i32 input_width: 12 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 1632 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,144,1632,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 144 + d1 * 12 + d2, d3), memory_config: (144, 1632, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,144,1632,bf16]> tensor<[1632,1,5,5,bf16]> tensor<[1,1,144,1632,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 144 + d1 * 144 + d2, d3), memory_config: (5, 51, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5 + d1 * 5 + d2, d3), memory_config: (8160, 5, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 144 + d1 * 12 + d2, d3), memory_config: (144, 1632, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1632 : i32 in_channels: 1632 : i32 input_height: 12 : i32 input_width: 12 : i32 kernel_height: 5 : i32 kernel_width: 5 : i32 out_channels: 1632 : i32 padding_height: 2 : i32 padding_width: 2 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,144,1632,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 144 + d1 * 12 + d2, d3), memory_config: (144, 1632, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,144,1632,bf16]> tensor<[272,1632,1,1,bf16]> tensor<[1,1,144,272,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 144 + d1 * 144 + d2, d3), memory_config: (5, 51, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1632 + d1 + d2, d3), memory_config: (443904, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 144 + d1 * 12 + d2, d3), memory_config: (144, 272, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1632 : i32 input_height: 12 : i32 input_width: 12 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 272 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,144,272,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 144 + d1 * 12 + d2, d3), memory_config: (144, 272, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,144,1632,bf16]> tensor<[448,1632,1,1,bf16]> tensor<[1,1,144,448,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 144 + d1 * 144 + d2, d3), memory_config: (5, 51, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1632 + d1 + d2, d3), memory_config: (731136, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 144 + d1 * 12 + d2, d3), memory_config: (144, 448, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1632 : i32 input_height: 12 : i32 input_width: 12 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 448 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,144,448,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 144 + d1 * 12 + d2, d3), memory_config: (144, 448, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,1632,bf16]> tensor<[128,1632,1,1,bf16]> tensor<[1,1,196,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 51, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1632 + d1 + d2, d3), memory_config: (208896, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1632 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,1632,bf16]> tensor<[128,1632,1,1,bf16]> tensor<[1,1,49,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 51, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1632 + d1 + d2, d3), memory_config: (208896, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1632 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,1664,bf16]> tensor<[128,1664,1,1,bf16]> tensor<[1,1,196,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 52, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1664 + d1 + d2, d3), memory_config: (212992, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1664 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,1664,bf16]> tensor<[128,1664,1,1,bf16]> tensor<[1,1,49,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 52, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1664 + d1 + d2, d3), memory_config: (212992, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1664 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1,168,bf16]> tensor<[672,168,1,1,bf16]> tensor<[1,1,1,672,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 6, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 168 + d1 + d2, d3), memory_config: (112896, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 672, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 168 : i32 input_height: 1 : i32 input_width: 1 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 672 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,1,672,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 672, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,1696,bf16]> tensor<[128,1696,1,1,bf16]> tensor<[1,1,196,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 53, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1696 + d1 + d2, d3), memory_config: (217088, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1696 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,1696,bf16]> tensor<[128,1696,1,1,bf16]> tensor<[1,1,49,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 53, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1696 + d1 + d2, d3), memory_config: (217088, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1696 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,12544,16,bf16]> tensor<[16,16,1,1,bf16]> tensor<[1,1,12544,16,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 12544 + d2, d3), memory_config: (392, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16 + d1 + d2, d3), memory_config: (256, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (12544, 16, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 16 : i32 input_height: 112 : i32 input_width: 112 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 16 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,12544,16,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (12544, 16, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,12544,16,bf16]> tensor<[16,1,3,3,bf16]> tensor<[1,1,12544,16,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 12544 + d2, d3), memory_config: (392, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (48, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (12544, 16, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 16 : i32 in_channels: 16 : i32 input_height: 112 : i32 input_width: 112 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 16 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,12544,16,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (12544, 16, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,12544,16,bf16]> tensor<[16,1,3,3,bf16]> tensor<[1,1,3136,16,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 12544 + d2, d3), memory_config: (392, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (48, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 16, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 16 : i32 in_channels: 16 : i32 input_height: 112 : i32 input_width: 112 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 16 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,3136,16,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 16, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,12544,16,bf16]> tensor<[24,16,1,1,bf16]> tensor<[1,1,12544,24,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 12544 + d2, d3), memory_config: (392, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16 + d1 + d2, d3), memory_config: (384, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (12544, 24, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 16 : i32 input_height: 112 : i32 input_width: 112 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 24 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,12544,24,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (12544, 24, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,12544,16,bf16]> tensor<[64,16,1,1,bf16]> tensor<[1,1,12544,64,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 12544 + d2, d3), memory_config: (392, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16 + d1 + d2, d3), memory_config: (1024, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (12544, 64, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 16 : i32 input_height: 112 : i32 input_width: 112 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 64 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,12544,64,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (12544, 64, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,12544,16,bf16]> tensor<[8,16,1,1,bf16]> tensor<[1,1,12544,8,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 12544 + d2, d3), memory_config: (392, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16 + d1 + d2, d3), memory_config: (128, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (12544, 8, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 16 : i32 input_height: 112 : i32 input_width: 112 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 8 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,12544,8,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (12544, 8, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,12544,16,bf16]> tensor<[96,16,1,1,bf16]> tensor<[1,1,12544,96,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 12544 + d2, d3), memory_config: (392, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16 + d1 + d2, d3), memory_config: (1536, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (12544, 96, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 16 : i32 input_height: 112 : i32 input_width: 112 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 96 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,12544,96,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (12544, 96, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,14400,16,bf16]> tensor<[96,16,1,1,bf16]> tensor<[1,1,14400,96,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 14400 + d1 * 14400 + d2, d3), memory_config: (450, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16 + d1 + d2, d3), memory_config: (1536, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 14400 + d1 * 120 + d2, d3), memory_config: (14400, 96, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 16 : i32 input_height: 120 : i32 input_width: 120 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 96 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,14400,96,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 14400 + d1 * 120 + d2, d3), memory_config: (14400, 96, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,16900,16,bf16]> tensor<[96,16,1,1,bf16]> tensor<[1,1,16900,96,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16900 + d1 * 16900 + d2, d3), memory_config: (529, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16 + d1 + d2, d3), memory_config: (1536, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16900 + d1 * 130 + d2, d3), memory_config: (16900, 96, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 16 : i32 input_height: 130 : i32 input_width: 130 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 96 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,16900,96,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16900 + d1 * 130 + d2, d3), memory_config: (16900, 96, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,16,bf16]> tensor<[48,16,3,3,bf16]> tensor<[1,1,196,48,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 48 + d1 * 3 + d2, d3), memory_config: (2304, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 48, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 16 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 48 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,48,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 48, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,16,bf16]> tensor<[4,16,3,3,bf16]> tensor<[1,1,196,4,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 48 + d1 * 3 + d2, d3), memory_config: (192, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 4, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 16 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 4 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,4,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 4, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,25600,16,f32]> tensor<[16,16,1,1,f32]> tensor<[1,1,25600,16,f32]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 25600 + d1 * 25600 + d2, d3), memory_config: (800, 1, 'tile<32x32, f32>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16 + d1 + d2, d3), memory_config: (256, 1, 'f32', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 25600 + d1 * 160 + d2, d3), memory_config: (25600, 16, 'f32', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 16 : i32 input_height: 160 : i32 input_width: 160 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 16 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,25600,16,f32]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 25600 + d1 * 160 + d2, d3), memory_config: (25600, 16, 'f32', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,25600,16,f32]> tensor<[16,1,3,3,f32]> tensor<[1,1,25600,16,f32]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 25600 + d1 * 25600 + d2, d3), memory_config: (800, 1, 'tile<32x32, f32>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (48, 3, 'f32', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 25600 + d1 * 160 + d2, d3), memory_config: (25600, 16, 'f32', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 16 : i32 in_channels: 16 : i32 input_height: 160 : i32 input_width: 160 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 16 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,25600,16,f32]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 25600 + d1 * 160 + d2, d3), memory_config: (25600, 16, 'f32', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,25600,16,f32]> tensor<[64,16,1,1,f32]> tensor<[1,1,25600,64,f32]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 25600 + d1 * 25600 + d2, d3), memory_config: (800, 1, 'tile<32x32, f32>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16 + d1 + d2, d3), memory_config: (1024, 1, 'f32', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 25600 + d1 * 160 + d2, d3), memory_config: (25600, 64, 'f32', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 16 : i32 input_height: 160 : i32 input_width: 160 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 64 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,25600,64,f32]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 25600 + d1 * 160 + d2, d3), memory_config: (25600, 64, 'f32', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,50176,16,bf16]> tensor<[16,16,3,3,bf16]> tensor<[1,1,50176,16,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 50176 + d1 * 50176 + d2, d3), memory_config: (1568, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 48 + d1 * 3 + d2, d3), memory_config: (768, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 50176 + d1 * 224 + d2, d3), memory_config: (50176, 16, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 16 : i32 input_height: 224 : i32 input_width: 224 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 16 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,50176,16,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 50176 + d1 * 224 + d2, d3), memory_config: (50176, 16, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,50176,16,bf16]> tensor<[32,16,3,3,bf16]> tensor<[1,1,12544,32,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 50176 + d1 * 50176 + d2, d3), memory_config: (1568, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 48 + d1 * 3 + d2, d3), memory_config: (1536, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (12544, 32, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 16 : i32 input_height: 224 : i32 input_width: 224 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 32 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,12544,32,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (12544, 32, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,16,bf16]> tensor<[32,16,3,3,bf16]> tensor<[1,1,784,32,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 48 + d1 * 3 + d2, d3), memory_config: (1536, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 32, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 16 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 32 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,32,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 32, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,3136,16,bf16]> tensor<[24,16,1,1,bf16]> tensor<[1,1,3136,24,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 3136 + d2, d3), memory_config: (98, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16 + d1 + d2, d3), memory_config: (384, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 24, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 16 : i32 input_height: 56 : i32 input_width: 56 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 24 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,3136,24,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 24, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,1728,bf16]> tensor<[128,1728,1,1,bf16]> tensor<[1,1,196,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 54, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1728 + d1 + d2, d3), memory_config: (221184, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1728 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,1728,bf16]> tensor<[128,1728,1,1,bf16]> tensor<[1,1,49,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 54, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1728 + d1 + d2, d3), memory_config: (221184, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1728 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,172,bf16]> tensor<[46,172,3,3,bf16]> tensor<[1,1,784,46,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 6, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 516 + d1 * 3 + d2, d3), memory_config: (23736, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 46, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 172 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 46 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,46,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 46, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1,174,bf16]> tensor<[1392,174,1,1,bf16]> tensor<[1,1,1,1392,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 6, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 174 + d1 + d2, d3), memory_config: (242208, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 1392, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 174 : i32 input_height: 1 : i32 input_width: 1 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 1392 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,1,1392,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 1392, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1,174,bf16]> tensor<[696,174,1,1,bf16]> tensor<[1,1,1,696,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 6, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 174 + d1 + d2, d3), memory_config: (121104, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 696, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 174 : i32 input_height: 1 : i32 input_width: 1 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 696 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,1,696,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 696, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,1760,bf16]> tensor<[128,1760,1,1,bf16]> tensor<[1,1,196,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 55, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1760 + d1 + d2, d3), memory_config: (225280, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1760 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,1760,bf16]> tensor<[128,1760,1,1,bf16]> tensor<[1,1,49,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 55, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1760 + d1 + d2, d3), memory_config: (225280, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1760 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,1792,bf16]> tensor<[896,1792,1,1,bf16]> tensor<[1,1,196,896,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 56, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1792 + d1 + d2, d3), memory_config: (1605632, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 896, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1792 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 896 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,896,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 896, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,1792,bf16]> tensor<[128,1792,1,1,bf16]> tensor<[1,1,49,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 56, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1792 + d1 + d2, d3), memory_config: (229376, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1792 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,1824,bf16]> tensor<[128,1824,1,1,bf16]> tensor<[1,1,49,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 57, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1824 + d1 + d2, d3), memory_config: (233472, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1824 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,184,bf16]> tensor<[184,1,3,3,bf16]> tensor<[1,1,196,184,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 6, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (552, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 184, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 184 : i32 in_channels: 184 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 184 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,184,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 184, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,184,bf16]> tensor<[40,184,1,1,bf16]> tensor<[1,1,196,40,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 6, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 184 + d1 + d2, d3), memory_config: (7360, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 40, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 184 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 40 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,40,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 40, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,184,bf16]> tensor<[80,184,1,1,bf16]> tensor<[1,1,196,80,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 6, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 184 + d1 + d2, d3), memory_config: (14720, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 80, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 184 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 80 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,80,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 80, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,400,184,f32]> tensor<[184,1,3,3,f32]> tensor<[1,1,400,184,f32]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 400 + d1 * 400 + d2, d3), memory_config: (13, 6, 'tile<32x32, f32>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (552, 3, 'f32', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 400 + d1 * 20 + d2, d3), memory_config: (400, 184, 'f32', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 184 : i32 in_channels: 184 : i32 input_height: 20 : i32 input_width: 20 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 184 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,400,184,f32]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 400 + d1 * 20 + d2, d3), memory_config: (400, 184, 'f32', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,400,184,f32]> tensor<[80,184,1,1,f32]> tensor<[1,1,400,80,f32]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 400 + d1 * 400 + d2, d3), memory_config: (13, 6, 'tile<32x32, f32>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 184 + d1 + d2, d3), memory_config: (14720, 1, 'f32', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 400 + d1 * 20 + d2, d3), memory_config: (400, 80, 'f32', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 184 : i32 input_height: 20 : i32 input_width: 20 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 80 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,400,80,f32]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 400 + d1 * 20 + d2, d3), memory_config: (400, 80, 'f32', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,184,bf16]> tensor<[184,1,1,5,bf16]> tensor<[1,1,49,184,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 6, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (184, 5, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 184, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 184 : i32 in_channels: 184 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 1 : i32 kernel_width: 5 : i32 out_channels: 184 : i32 padding_height: 0 : i32 padding_width: 2 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,184,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 184, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,184,bf16]> tensor<[184,1,5,1,bf16]> tensor<[1,1,49,184,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 6, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5 + d1 * 5 + d2, d3), memory_config: (920, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 184, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 184 : i32 in_channels: 184 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 5 : i32 kernel_width: 1 : i32 out_channels: 184 : i32 padding_height: 2 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,184,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 184, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,1856,bf16]> tensor<[128,1856,1,1,bf16]> tensor<[1,1,49,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 58, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1856 + d1 + d2, d3), memory_config: (237568, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1856 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,185,bf16]> tensor<[128,185,1,1,bf16]> tensor<[1,1,784,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 6, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 185 + d1 + d2, d3), memory_config: (23680, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 185 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,1888,bf16]> tensor<[128,1888,1,1,bf16]> tensor<[1,1,49,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 59, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1888 + d1 + d2, d3), memory_config: (241664, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1888 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,18,bf16]> tensor<[144,18,3,3,bf16]> tensor<[1,1,49,144,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 54 + d1 * 3 + d2, d3), memory_config: (7776, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 144, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 18 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 144 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,49,144,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 144, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,18,bf16]> tensor<[18,18,3,3,bf16]> tensor<[1,1,196,18,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 54 + d1 * 3 + d2, d3), memory_config: (972, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 18, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 18 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 18 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,196,18,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 18, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,18,bf16]> tensor<[72,18,3,3,bf16]> tensor<[1,1,196,72,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 54 + d1 * 3 + d2, d3), memory_config: (3888, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 72, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 18 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 72 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,196,72,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 72, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,3136,18,bf16]> tensor<[128,18,1,1,bf16]> tensor<[1,1,3136,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 3136 + d2, d3), memory_config: (98, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 18 + d1 + d2, d3), memory_config: (2304, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 18 : i32 input_height: 56 : i32 input_width: 56 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,3136,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,3136,18,bf16]> tensor<[18,18,3,3,bf16]> tensor<[1,1,3136,18,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 3136 + d2, d3), memory_config: (98, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 54 + d1 * 3 + d2, d3), memory_config: (972, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 18, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 18 : i32 input_height: 56 : i32 input_width: 56 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 18 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,3136,18,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 18, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,3136,18,bf16]> tensor<[18,18,3,3,bf16]> tensor<[1,1,784,18,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 3136 + d2, d3), memory_config: (98, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 54 + d1 * 3 + d2, d3), memory_config: (972, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 18, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 18 : i32 input_height: 56 : i32 input_width: 56 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 18 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,784,18,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 18, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,3136,18,bf16]> tensor<[32,18,1,1,bf16]> tensor<[1,1,3136,32,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 3136 + d2, d3), memory_config: (98, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 18 + d1 + d2, d3), memory_config: (576, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 32, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 18 : i32 input_height: 56 : i32 input_width: 56 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 32 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,3136,32,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 32, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,3136,18,bf16]> tensor<[36,18,3,3,bf16]> tensor<[1,1,784,36,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 3136 + d2, d3), memory_config: (98, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 54 + d1 * 3 + d2, d3), memory_config: (1944, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 36, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 18 : i32 input_height: 56 : i32 input_width: 56 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 36 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,784,36,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 36, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,256,1920,bf16]> tensor<[1280,1920,1,1,bf16]> tensor<[1,1,256,1280,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 256 + d2, d3), memory_config: (8, 60, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1920 + d1 + d2, d3), memory_config: (2457600, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (256, 1280, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1920 : i32 input_height: 16 : i32 input_width: 16 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 1280 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,256,1280,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (256, 1280, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,256,1920,bf16]> tensor<[1280,1920,3,3,bf16]> tensor<[1,1,256,1280,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 256 + d2, d3), memory_config: (8, 60, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5760 + d1 * 3 + d2, d3), memory_config: (7372800, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (256, 1280, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1920 : i32 input_height: 16 : i32 input_width: 16 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 1280 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,256,1280,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (256, 1280, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1024,1920,bf16]> tensor<[640,1920,1,1,bf16]> tensor<[1,1,1024,640,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 1024 + d2, d3), memory_config: (32, 60, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1920 + d1 + d2, d3), memory_config: (1228800, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 640, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1920 : i32 input_height: 32 : i32 input_width: 32 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 640 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,1024,640,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 640, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1024,1920,bf16]> tensor<[640,1920,3,3,bf16]> tensor<[1,1,1024,640,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 1024 + d2, d3), memory_config: (32, 60, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5760 + d1 * 3 + d2, d3), memory_config: (3686400, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 640, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1920 : i32 input_height: 32 : i32 input_width: 32 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 640 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,1024,640,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 640, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,192,bf16]> tensor<[192,192,1,1,bf16]> tensor<[1,1,196,192,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 6, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 192 + d1 + d2, d3), memory_config: (36864, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 192, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 192 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 192 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,192,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 192, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,192,bf16]> tensor<[192,1,3,3,bf16]> tensor<[1,1,196,192,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 6, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (576, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 192, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 192 : i32 in_channels: 192 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 192 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,192,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 192, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,192,bf16]> tensor<[64,192,1,1,bf16]> tensor<[1,1,196,64,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 6, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 192 + d1 + d2, d3), memory_config: (12288, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 64, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 192 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 64 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,64,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 64, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,289,192,bf16]> tensor<[192,192,3,3,bf16]> tensor<[1,1,64,192,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 289 + d2, d3), memory_config: (10, 6, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 576 + d1 * 3 + d2, d3), memory_config: (110592, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 8 + d2, d3), memory_config: (64, 192, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 192 : i32 input_height: 17 : i32 input_width: 17 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 192 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,64,192,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 8 + d2, d3), memory_config: (64, 192, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,289,192,bf16]> tensor<[192,192,7,1,bf16]> tensor<[1,1,289,192,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 289 + d2, d3), memory_config: (10, 6, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1344 + d1 * 7 + d2, d3), memory_config: (258048, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 17 + d2, d3), memory_config: (289, 192, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 192 : i32 input_height: 17 : i32 input_width: 17 : i32 kernel_height: 7 : i32 kernel_width: 1 : i32 out_channels: 192 : i32 padding_height: 3 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,289,192,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 17 + d2, d3), memory_config: (289, 192, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,289,192,bf16]> tensor<[224,192,1,7,bf16]> tensor<[1,1,289,224,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 289 + d2, d3), memory_config: (10, 6, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 192 + d1 + d2, d3), memory_config: (43008, 7, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 17 + d2, d3), memory_config: (289, 224, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 192 : i32 input_height: 17 : i32 input_width: 17 : i32 kernel_height: 1 : i32 kernel_width: 7 : i32 out_channels: 224 : i32 padding_height: 0 : i32 padding_width: 3 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,289,224,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 17 + d2, d3), memory_config: (289, 224, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,192,bf16]> tensor<[128,192,1,1,bf16]> tensor<[1,1,784,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 6, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 192 + d1 + d2, d3), memory_config: (24576, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 192 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,192,bf16]> tensor<[16,192,1,1,bf16]> tensor<[1,1,784,16,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 6, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 192 + d1 + d2, d3), memory_config: (3072, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 16, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 192 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 16 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,16,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 16, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,192,bf16]> tensor<[192,1,3,3,bf16]> tensor<[1,1,784,192,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 6, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (576, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 192, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 192 : i32 in_channels: 192 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 192 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,192,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 192, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,192,bf16]> tensor<[192,1,3,3,bf16]> tensor<[1,1,196,192,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 6, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (576, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 192, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 192 : i32 in_channels: 192 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 192 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,196,192,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 192, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,192,bf16]> tensor<[32,192,1,1,bf16]> tensor<[1,1,784,32,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 6, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 192 + d1 + d2, d3), memory_config: (6144, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 32, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 192 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 32 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,32,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 32, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,192,bf16]> tensor<[64,192,1,1,bf16]> tensor<[1,1,784,64,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 6, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 192 + d1 + d2, d3), memory_config: (12288, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 64, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 192 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 64 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,64,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 64, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,192,bf16]> tensor<[96,192,1,1,bf16]> tensor<[1,1,784,96,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 6, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 192 + d1 + d2, d3), memory_config: (18432, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 96, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 192 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 96 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,96,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 96, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1225,192,bf16]> tensor<[224,192,3,3,bf16]> tensor<[1,1,1225,224,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1225 + d1 * 1225 + d2, d3), memory_config: (39, 6, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 576 + d1 * 3 + d2, d3), memory_config: (129024, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1225 + d1 * 35 + d2, d3), memory_config: (1225, 224, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 192 : i32 input_height: 35 : i32 input_width: 35 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 224 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,1225,224,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1225 + d1 * 35 + d2, d3), memory_config: (1225, 224, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1444,192,bf16]> tensor<[48,192,1,1,bf16]> tensor<[1,1,1444,48,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1444 + d1 * 1444 + d2, d3), memory_config: (46, 6, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 192 + d1 + d2, d3), memory_config: (9216, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1444 + d1 * 38 + d2, d3), memory_config: (1444, 48, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 192 : i32 input_height: 38 : i32 input_width: 38 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 48 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,1444,48,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1444 + d1 * 38 + d2, d3), memory_config: (1444, 48, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,2304,192,bf16]> tensor<[56,192,1,1,bf16]> tensor<[1,1,2304,56,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 2304 + d1 * 2304 + d2, d3), memory_config: (72, 6, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 192 + d1 + d2, d3), memory_config: (10752, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 2304 + d1 * 48 + d2, d3), memory_config: (2304, 56, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 192 : i32 input_height: 48 : i32 input_width: 48 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 56 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,2304,56,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 2304 + d1 * 48 + d2, d3), memory_config: (2304, 56, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,3136,192,bf16]> tensor<[128,192,1,1,bf16]> tensor<[1,1,3136,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 3136 + d2, d3), memory_config: (98, 6, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 192 + d1 + d2, d3), memory_config: (24576, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 192 : i32 input_height: 56 : i32 input_width: 56 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,3136,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,5041,192,bf16]> tensor<[192,192,3,3,bf16]> tensor<[1,1,1225,192,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5041 + d1 * 5041 + d2, d3), memory_config: (158, 6, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 576 + d1 * 3 + d2, d3), memory_config: (110592, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1225 + d1 * 35 + d2, d3), memory_config: (1225, 192, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 192 : i32 input_height: 71 : i32 input_width: 71 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 192 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,1225,192,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1225 + d1 * 35 + d2, d3), memory_config: (1225, 192, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,5625,192,bf16]> tensor<[192,1,3,3,bf16]> tensor<[1,1,5625,192,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5625 + d1 * 5625 + d2, d3), memory_config: (176, 6, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (576, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5625 + d1 * 75 + d2, d3), memory_config: (5625, 192, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 192 : i32 in_channels: 192 : i32 input_height: 75 : i32 input_width: 75 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 192 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,5625,192,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5625 + d1 * 75 + d2, d3), memory_config: (5625, 192, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,5625,192,bf16]> tensor<[32,192,1,1,bf16]> tensor<[1,1,5625,32,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5625 + d1 * 5625 + d2, d3), memory_config: (176, 6, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 192 + d1 + d2, d3), memory_config: (6144, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5625 + d1 * 75 + d2, d3), memory_config: (5625, 32, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 192 : i32 input_height: 75 : i32 input_width: 75 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 32 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,5625,32,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5625 + d1 * 75 + d2, d3), memory_config: (5625, 32, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,6241,192,bf16]> tensor<[192,1,5,5,bf16]> tensor<[1,1,1444,192,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 6241 + d1 * 6241 + d2, d3), memory_config: (196, 6, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5 + d1 * 5 + d2, d3), memory_config: (960, 5, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1444 + d1 * 38 + d2, d3), memory_config: (1444, 192, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 192 : i32 in_channels: 192 : i32 input_height: 79 : i32 input_width: 79 : i32 kernel_height: 5 : i32 kernel_width: 5 : i32 out_channels: 192 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,1444,192,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1444 + d1 * 38 + d2, d3), memory_config: (1444, 192, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,192,bf16]> tensor<[1152,192,1,1,bf16]> tensor<[1,1,49,1152,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 6, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 192 + d1 + d2, d3), memory_config: (221184, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 1152, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 192 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 1152 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,1152,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 1152, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,192,bf16]> tensor<[384,192,3,3,bf16]> tensor<[1,1,49,384,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 6, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 576 + d1 * 3 + d2, d3), memory_config: (221184, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 384, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 192 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 384 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,384,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 384, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,64,192,bf16]> tensor<[1152,192,1,1,bf16]> tensor<[1,1,64,1152,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 64 + d2, d3), memory_config: (2, 6, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 192 + d1 + d2, d3), memory_config: (221184, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 8 + d2, d3), memory_config: (64, 1152, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 192 : i32 input_height: 8 : i32 input_width: 8 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 1152 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,64,1152,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 8 + d2, d3), memory_config: (64, 1152, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,9025,192,bf16]> tensor<[192,1,3,3,bf16]> tensor<[1,1,9025,192,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 9025 + d1 * 9025 + d2, d3), memory_config: (283, 6, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (576, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 9025 + d1 * 95 + d2, d3), memory_config: (9025, 192, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 192 : i32 in_channels: 192 : i32 input_height: 95 : i32 input_width: 95 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 192 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,9025,192,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 9025 + d1 * 95 + d2, d3), memory_config: (9025, 192, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,9025,192,bf16]> tensor<[32,192,1,1,bf16]> tensor<[1,1,9025,32,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 9025 + d1 * 9025 + d2, d3), memory_config: (283, 6, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 192 + d1 + d2, d3), memory_config: (6144, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 9025 + d1 * 95 + d2, d3), memory_config: (9025, 32, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 192 : i32 input_height: 95 : i32 input_width: 95 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 32 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,9025,32,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 9025 + d1 * 95 + d2, d3), memory_config: (9025, 32, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,9801,192,bf16]> tensor<[192,1,5,5,bf16]> tensor<[1,1,2304,192,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 9801 + d1 * 9801 + d2, d3), memory_config: (307, 6, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5 + d1 * 5 + d2, d3), memory_config: (960, 5, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 2304 + d1 * 48 + d2, d3), memory_config: (2304, 192, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 192 : i32 in_channels: 192 : i32 input_height: 99 : i32 input_width: 99 : i32 kernel_height: 5 : i32 kernel_width: 5 : i32 out_channels: 192 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,2304,192,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 2304 + d1 * 48 + d2, d3), memory_config: (2304, 192, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,196,bf16]> tensor<[40,196,3,3,bf16]> tensor<[1,1,196,40,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 7, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 588 + d1 * 3 + d2, d3), memory_config: (23520, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 40, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 196 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 40 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,40,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 40, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,1,bf16]> tensor<[16,1,3,3,bf16]> tensor<[1,1,784,16,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (48, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 16, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 16 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,16,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 16, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,1,bf16]> tensor<[32,1,3,3,bf16]> tensor<[1,1,676,32,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (96, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 676 + d1 * 26 + d2, d3), memory_config: (676, 32, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 1 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 32 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,676,32,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 676 + d1 * 26 + d2, d3), memory_config: (676, 32, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,200,bf16]> tensor<[200,1,3,3,bf16]> tensor<[1,1,196,200,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 7, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (600, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 200, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 200 : i32 in_channels: 200 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 200 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,200,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 200, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,200,bf16]> tensor<[40,200,1,1,bf16]> tensor<[1,1,196,40,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 7, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 200 + d1 + d2, d3), memory_config: (8000, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 40, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 200 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 40 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,40,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 40, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,200,bf16]> tensor<[80,200,1,1,bf16]> tensor<[1,1,196,80,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 7, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 200 + d1 + d2, d3), memory_config: (16000, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 80, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 200 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 80 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,80,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 80, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,400,200,f32]> tensor<[200,1,3,3,f32]> tensor<[1,1,400,200,f32]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 400 + d1 * 400 + d2, d3), memory_config: (13, 7, 'tile<32x32, f32>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (600, 3, 'f32', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 400 + d1 * 20 + d2, d3), memory_config: (400, 200, 'f32', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 200 : i32 in_channels: 200 : i32 input_height: 20 : i32 input_width: 20 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 200 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,400,200,f32]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 400 + d1 * 20 + d2, d3), memory_config: (400, 200, 'f32', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,400,200,f32]> tensor<[80,200,1,1,f32]> tensor<[1,1,400,80,f32]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 400 + d1 * 400 + d2, d3), memory_config: (13, 7, 'tile<32x32, f32>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 200 + d1 + d2, d3), memory_config: (16000, 1, 'f32', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 400 + d1 * 20 + d2, d3), memory_config: (400, 80, 'f32', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 200 : i32 input_height: 20 : i32 input_width: 20 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 80 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,400,80,f32]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 400 + d1 * 20 + d2, d3), memory_config: (400, 80, 'f32', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,200,bf16]> tensor<[200,1,1,5,bf16]> tensor<[1,1,49,200,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 7, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (200, 5, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 200, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 200 : i32 in_channels: 200 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 1 : i32 kernel_width: 5 : i32 out_channels: 200 : i32 padding_height: 0 : i32 padding_width: 2 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,200,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 200, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,200,bf16]> tensor<[200,1,5,1,bf16]> tensor<[1,1,49,200,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 7, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5 + d1 * 5 + d2, d3), memory_config: (1000, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 200, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 200 : i32 in_channels: 200 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 5 : i32 kernel_width: 1 : i32 out_channels: 200 : i32 padding_height: 2 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,200,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 200, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,2048,bf16]> tensor<[2048,32,3,3,bf16]> tensor<[1,1,49,2048,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 64, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 96 + d1 * 3 + d2, d3), memory_config: (196608, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 2048, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 64 : i32 in_channels: 2048 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 2048 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,49,2048,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 2048, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,300,2048,bf16]> tensor<[2048,1,3,3,bf16]> tensor<[1,1,300,2048,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 300 + d1 * 300 + d2, d3), memory_config: (10, 64, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (6144, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 300 + d1 * 20 + d2, d3), memory_config: (300, 2048, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 2048 : i32 in_channels: 2048 : i32 input_height: 15 : i32 input_width: 20 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 2048 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,300,2048,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 300 + d1 * 20 + d2, d3), memory_config: (300, 2048, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,920,2048,bf16]> tensor<[256,2048,1,1,bf16]> tensor<[1,1,920,256,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 920 + d1 * 920 + d2, d3), memory_config: (29, 64, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 2048 + d1 + d2, d3), memory_config: (524288, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 920 + d1 * 40 + d2, d3), memory_config: (920, 256, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 2048 : i32 input_height: 23 : i32 input_width: 40 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 256 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,920,256,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 920 + d1 * 40 + d2, d3), memory_config: (920, 256, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,920,2048,bf16]> tensor<[512,2048,1,1,bf16]> tensor<[1,1,920,512,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 920 + d1 * 920 + d2, d3), memory_config: (29, 64, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 2048 + d1 + d2, d3), memory_config: (1048576, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 920 + d1 * 40 + d2, d3), memory_config: (920, 512, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 2048 : i32 input_height: 23 : i32 input_width: 40 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 512 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,920,512,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 920 + d1 * 40 + d2, d3), memory_config: (920, 512, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,2048,bf16]> tensor<[1024,2048,1,1,bf16]> tensor<[1,1,49,1024,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 64, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 2048 + d1 + d2, d3), memory_config: (2097152, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 1024, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 2048 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 1024 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,1024,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 1024, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,2048,bf16]> tensor<[2048,2048,1,1,bf16]> tensor<[1,1,49,2048,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 64, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 2048 + d1 + d2, d3), memory_config: (4194304, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 2048, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 2048 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 2048 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,2048,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 2048, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,2048,bf16]> tensor<[2048,32,3,3,bf16]> tensor<[1,1,49,2048,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 64, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 96 + d1 * 3 + d2, d3), memory_config: (196608, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 2048, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 64 : i32 in_channels: 2048 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 2048 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,2048,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 2048, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,2048,bf16]> tensor<[512,2048,1,1,bf16]> tensor<[1,1,49,512,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 64, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 2048 + d1 + d2, d3), memory_config: (1048576, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 512, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 2048 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 512 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,512,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 512, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,81,208,bf16]> tensor<[1248,208,1,1,bf16]> tensor<[1,1,81,1248,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 81 + d1 * 81 + d2, d3), memory_config: (3, 7, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 208 + d1 + d2, d3), memory_config: (259584, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 81 + d1 * 9 + d2, d3), memory_config: (81, 1248, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 208 : i32 input_height: 9 : i32 input_width: 9 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 1248 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,81,1248,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 81 + d1 * 9 + d2, d3), memory_config: (81, 1248, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1,20,bf16]> tensor<[72,20,1,1,bf16]> tensor<[1,1,1,72,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 20 + d1 + d2, d3), memory_config: (1440, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 72, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 20 : i32 input_height: 1 : i32 input_width: 1 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 72 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,1,72,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 72, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,20,bf16]> tensor<[20,1,3,3,bf16]> tensor<[1,1,784,20,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (60, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 20, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 20 : i32 in_channels: 20 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 20 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,20,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 20, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,218,bf16]> tensor<[78,218,3,3,bf16]> tensor<[1,1,784,78,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 7, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 654 + d1 * 3 + d2, d3), memory_config: (51012, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 78, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 218 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 78 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,78,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 78, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,289,224,bf16]> tensor<[224,224,7,1,bf16]> tensor<[1,1,289,224,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 289 + d2, d3), memory_config: (10, 7, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1568 + d1 * 7 + d2, d3), memory_config: (351232, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 17 + d2, d3), memory_config: (289, 224, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 224 : i32 input_height: 17 : i32 input_width: 17 : i32 kernel_height: 7 : i32 kernel_width: 1 : i32 out_channels: 224 : i32 padding_height: 3 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,289,224,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 17 + d2, d3), memory_config: (289, 224, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,289,224,bf16]> tensor<[256,224,1,7,bf16]> tensor<[1,1,289,256,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 289 + d2, d3), memory_config: (10, 7, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 224 + d1 + d2, d3), memory_config: (57344, 7, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 17 + d2, d3), memory_config: (289, 256, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 224 : i32 input_height: 17 : i32 input_width: 17 : i32 kernel_height: 1 : i32 kernel_width: 7 : i32 out_channels: 256 : i32 padding_height: 0 : i32 padding_width: 3 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,289,256,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 17 + d2, d3), memory_config: (289, 256, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,289,224,bf16]> tensor<[256,224,7,1,bf16]> tensor<[1,1,289,256,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 289 + d2, d3), memory_config: (10, 7, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1568 + d1 * 7 + d2, d3), memory_config: (401408, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 17 + d2, d3), memory_config: (289, 256, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 224 : i32 input_height: 17 : i32 input_width: 17 : i32 kernel_height: 7 : i32 kernel_width: 1 : i32 out_channels: 256 : i32 padding_height: 3 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,289,256,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 17 + d2, d3), memory_config: (289, 256, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,224,bf16]> tensor<[128,224,1,1,bf16]> tensor<[1,1,784,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 7, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 224 + d1 + d2, d3), memory_config: (28672, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 224 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1225,224,bf16]> tensor<[256,224,3,3,bf16]> tensor<[1,1,289,256,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1225 + d1 * 1225 + d2, d3), memory_config: (39, 7, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 672 + d1 * 3 + d2, d3), memory_config: (172032, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 17 + d2, d3), memory_config: (289, 256, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 224 : i32 input_height: 35 : i32 input_width: 35 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 256 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,289,256,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 17 + d2, d3), memory_config: (289, 256, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,3136,224,bf16]> tensor<[128,224,1,1,bf16]> tensor<[1,1,3136,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 3136 + d2, d3), memory_config: (98, 7, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 224 + d1 + d2, d3), memory_config: (28672, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 224 : i32 input_height: 56 : i32 input_width: 56 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,3136,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,224,bf16]> tensor<[224,1,3,3,bf16]> tensor<[1,1,49,224,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 7, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (672, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 224, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 224 : i32 in_channels: 224 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 224 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,224,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 224, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,224,bf16]> tensor<[224,224,1,1,bf16]> tensor<[1,1,49,224,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 7, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 224 + d1 + d2, d3), memory_config: (50176, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 224, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 224 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 224 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,224,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 224, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,100,232,bf16]> tensor<[1392,232,1,1,bf16]> tensor<[1,1,100,1392,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 100 + d2, d3), memory_config: (4, 8, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 232 + d1 + d2, d3), memory_config: (322944, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (100, 1392, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 232 : i32 input_height: 10 : i32 input_width: 10 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 1392 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,100,1392,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (100, 1392, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,12544,232,bf16]> tensor<[232,232,3,3,bf16]> tensor<[1,1,3136,232,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 12544 + d2, d3), memory_config: (392, 8, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 696 + d1 * 3 + d2, d3), memory_config: (161472, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 232, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 232 : i32 input_height: 112 : i32 input_width: 112 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 232 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,3136,232,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 232, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1,232,bf16]> tensor<[58,232,1,1,bf16]> tensor<[1,1,1,58,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 8, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 232 + d1 + d2, d3), memory_config: (13456, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 58, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 232 : i32 input_height: 1 : i32 input_width: 1 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 58 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,1,58,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 58, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1,232,bf16]> tensor<[8,232,1,1,bf16]> tensor<[1,1,1,8,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 8, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 232 + d1 + d2, d3), memory_config: (1856, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 8, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 232 : i32 input_height: 1 : i32 input_width: 1 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 8 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,1,8,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 8, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,3136,232,bf16]> tensor<[232,232,1,1,bf16]> tensor<[1,1,3136,232,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 3136 + d2, d3), memory_config: (98, 8, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 232 + d1 + d2, d3), memory_config: (53824, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 232, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 232 : i32 input_height: 56 : i32 input_width: 56 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 232 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,3136,232,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 232, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,3136,232,bf16]> tensor<[232,232,3,3,bf16]> tensor<[1,1,3136,232,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 3136 + d2, d3), memory_config: (98, 8, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 696 + d1 * 3 + d2, d3), memory_config: (161472, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 232, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 232 : i32 input_height: 56 : i32 input_width: 56 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 232 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,3136,232,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 232, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,3136,232,bf16]> tensor<[696,232,1,1,bf16]> tensor<[1,1,3136,696,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 3136 + d2, d3), memory_config: (98, 8, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 232 + d1 + d2, d3), memory_config: (161472, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 696, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 232 : i32 input_height: 56 : i32 input_width: 56 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 696 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,3136,696,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 696, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,3136,232,bf16]> tensor<[696,232,1,1,bf16]> tensor<[1,1,784,696,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 3136 + d2, d3), memory_config: (98, 8, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 232 + d1 + d2, d3), memory_config: (161472, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 696, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 232 : i32 input_height: 56 : i32 input_width: 56 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 696 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,784,696,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 696, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,236,bf16]> tensor<[68,236,3,3,bf16]> tensor<[1,1,196,68,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 8, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 708 + d1 * 3 + d2, d3), memory_config: (48144, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 68, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 236 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 68 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,68,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 68, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,240,bf16]> tensor<[240,1,1,5,bf16]> tensor<[1,1,196,240,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 8, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (240, 5, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 240, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 240 : i32 in_channels: 240 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 5 : i32 out_channels: 240 : i32 padding_height: 0 : i32 padding_width: 2 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,240,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 240, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,240,bf16]> tensor<[240,1,3,3,bf16]> tensor<[1,1,196,240,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 8, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (720, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 240, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 240 : i32 in_channels: 240 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 240 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,240,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 240, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,240,bf16]> tensor<[240,1,5,1,bf16]> tensor<[1,1,196,240,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 8, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5 + d1 * 5 + d2, d3), memory_config: (1200, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 240, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 240 : i32 in_channels: 240 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 5 : i32 kernel_width: 1 : i32 out_channels: 240 : i32 padding_height: 2 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,240,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 240, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,240,bf16]> tensor<[40,240,1,1,bf16]> tensor<[1,1,196,40,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 8, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 240 + d1 + d2, d3), memory_config: (9600, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 40, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 240 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 40 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,40,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 40, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,240,bf16]> tensor<[80,240,1,1,bf16]> tensor<[1,1,196,80,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 8, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 240 + d1 + d2, d3), memory_config: (19200, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 80, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 240 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 80 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,80,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 80, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,225,240,bf16]> tensor<[80,240,1,1,bf16]> tensor<[1,1,225,80,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 225 + d1 * 225 + d2, d3), memory_config: (8, 8, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 240 + d1 + d2, d3), memory_config: (19200, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 225 + d1 * 15 + d2, d3), memory_config: (225, 80, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 240 : i32 input_height: 15 : i32 input_width: 15 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 80 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,225,80,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 225 + d1 * 15 + d2, d3), memory_config: (225, 80, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1,240,bf16]> tensor<[960,240,1,1,bf16]> tensor<[1,1,1,960,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 8, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 240 + d1 + d2, d3), memory_config: (230400, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 960, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 240 : i32 input_height: 1 : i32 input_width: 1 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 960 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,1,960,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 960, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,400,240,f32]> tensor<[80,240,1,1,f32]> tensor<[1,1,400,80,f32]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 400 + d1 * 400 + d2, d3), memory_config: (13, 8, 'tile<32x32, f32>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 240 + d1 + d2, d3), memory_config: (19200, 1, 'f32', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 400 + d1 * 20 + d2, d3), memory_config: (400, 80, 'f32', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 240 : i32 input_height: 20 : i32 input_width: 20 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 80 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,400,80,f32]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 400 + d1 * 20 + d2, d3), memory_config: (400, 80, 'f32', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,240,bf16]> tensor<[240,1,3,3,bf16]> tensor<[1,1,196,240,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 8, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (720, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 240, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 240 : i32 in_channels: 240 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 240 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,196,240,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 240, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,240,bf16]> tensor<[240,1,5,5,bf16]> tensor<[1,1,784,240,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 8, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5 + d1 * 5 + d2, d3), memory_config: (1200, 5, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 240, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 240 : i32 in_channels: 240 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 5 : i32 kernel_width: 5 : i32 out_channels: 240 : i32 padding_height: 2 : i32 padding_width: 2 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,240,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 240, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,240,bf16]> tensor<[40,240,1,1,bf16]> tensor<[1,1,784,40,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 8, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 240 + d1 + d2, d3), memory_config: (9600, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 40, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 240 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 40 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,40,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 40, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,841,240,bf16]> tensor<[240,1,3,3,bf16]> tensor<[1,1,196,240,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 841 + d1 * 841 + d2, d3), memory_config: (27, 8, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (720, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 240, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 240 : i32 in_channels: 240 : i32 input_height: 29 : i32 input_width: 29 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 240 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,196,240,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 240, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,900,240,bf16]> tensor<[240,1,5,5,bf16]> tensor<[1,1,900,240,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 900 + d1 * 900 + d2, d3), memory_config: (29, 8, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5 + d1 * 5 + d2, d3), memory_config: (1200, 5, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 900 + d1 * 30 + d2, d3), memory_config: (900, 240, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 240 : i32 in_channels: 240 : i32 input_height: 30 : i32 input_width: 30 : i32 kernel_height: 5 : i32 kernel_width: 5 : i32 out_channels: 240 : i32 padding_height: 2 : i32 padding_width: 2 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,900,240,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 900 + d1 * 30 + d2, d3), memory_config: (900, 240, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,900,240,bf16]> tensor<[40,240,1,1,bf16]> tensor<[1,1,900,40,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 900 + d1 * 900 + d2, d3), memory_config: (29, 8, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 240 + d1 + d2, d3), memory_config: (9600, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 900 + d1 * 30 + d2, d3), memory_config: (900, 40, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 240 : i32 input_height: 30 : i32 input_width: 30 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 40 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,900,40,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 900 + d1 * 30 + d2, d3), memory_config: (900, 40, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,961,240,bf16]> tensor<[240,1,3,3,bf16]> tensor<[1,1,225,240,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 961 + d1 * 961 + d2, d3), memory_config: (31, 8, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (720, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 225 + d1 * 15 + d2, d3), memory_config: (225, 240, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 240 : i32 in_channels: 240 : i32 input_height: 31 : i32 input_width: 31 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 240 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,225,240,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 225 + d1 * 15 + d2, d3), memory_config: (225, 240, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1600,240,f32]> tensor<[240,1,3,3,f32]> tensor<[1,1,400,240,f32]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1600 + d1 * 1600 + d2, d3), memory_config: (50, 8, 'tile<32x32, f32>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (720, 3, 'f32', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 400 + d1 * 20 + d2, d3), memory_config: (400, 240, 'f32', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 240 : i32 in_channels: 240 : i32 input_height: 40 : i32 input_width: 40 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 240 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,400,240,f32]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 400 + d1 * 20 + d2, d3), memory_config: (400, 240, 'f32', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,12544,24,bf16]> tensor<[24,1,3,3,bf16]> tensor<[1,1,12544,24,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 12544 + d2, d3), memory_config: (392, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (72, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (12544, 24, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 24 : i32 in_channels: 24 : i32 input_height: 112 : i32 input_width: 112 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 24 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,12544,24,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (12544, 24, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,24,bf16]> tensor<[64,24,3,3,bf16]> tensor<[1,1,196,64,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 72 + d1 * 3 + d2, d3), memory_config: (4608, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 64, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 24 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 64 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,64,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 64, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,22500,24,bf16]> tensor<[144,24,1,1,bf16]> tensor<[1,1,22500,144,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 22500 + d1 * 22500 + d2, d3), memory_config: (704, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 24 + d1 + d2, d3), memory_config: (3456, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 22500 + d1 * 150 + d2, d3), memory_config: (22500, 144, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 24 : i32 input_height: 150 : i32 input_width: 150 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 144 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,22500,144,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 22500 + d1 * 150 + d2, d3), memory_config: (22500, 144, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,36100,24,bf16]> tensor<[144,24,1,1,bf16]> tensor<[1,1,36100,144,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 36100 + d1 * 36100 + d2, d3), memory_config: (1129, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 24 + d1 + d2, d3), memory_config: (3456, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 36100 + d1 * 190 + d2, d3), memory_config: (36100, 144, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 24 : i32 input_height: 190 : i32 input_width: 190 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 144 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,36100,144,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 36100 + d1 * 190 + d2, d3), memory_config: (36100, 144, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1,24,bf16]> tensor<[72,24,1,1,bf16]> tensor<[1,1,1,72,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 24 + d1 + d2, d3), memory_config: (1728, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 72, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 24 : i32 input_height: 1 : i32 input_width: 1 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 72 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,1,72,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 72, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,24,bf16]> tensor<[40,24,1,1,bf16]> tensor<[1,1,784,40,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 24 + d1 + d2, d3), memory_config: (960, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 40, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 24 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 40 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,40,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 40, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,24,bf16]> tensor<[72,24,1,1,bf16]> tensor<[1,1,784,72,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 24 + d1 + d2, d3), memory_config: (1728, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 72, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 24 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 72 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,72,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 72, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,3136,24,bf16]> tensor<[144,24,1,1,bf16]> tensor<[1,1,3136,144,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 3136 + d2, d3), memory_config: (98, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 24 + d1 + d2, d3), memory_config: (3456, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 144, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 24 : i32 input_height: 56 : i32 input_width: 56 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 144 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,3136,144,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 144, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,3136,24,bf16]> tensor<[14,24,3,3,bf16]> tensor<[1,1,3136,14,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 3136 + d2, d3), memory_config: (98, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 72 + d1 * 3 + d2, d3), memory_config: (1008, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 14, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 24 : i32 input_height: 56 : i32 input_width: 56 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 14 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,3136,14,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 14, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,3136,24,bf16]> tensor<[24,1,5,5,bf16]> tensor<[1,1,784,24,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 3136 + d2, d3), memory_config: (98, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5 + d1 * 5 + d2, d3), memory_config: (120, 5, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 24, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 24 : i32 in_channels: 24 : i32 input_height: 56 : i32 input_width: 56 : i32 kernel_height: 5 : i32 kernel_width: 5 : i32 out_channels: 24 : i32 padding_height: 2 : i32 padding_width: 2 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,784,24,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 24, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,3136,24,bf16]> tensor<[36,24,1,1,bf16]> tensor<[1,1,3136,36,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 3136 + d2, d3), memory_config: (98, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 24 + d1 + d2, d3), memory_config: (864, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 36, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 24 : i32 input_height: 56 : i32 input_width: 56 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 36 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,3136,36,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 36, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,3136,24,bf16]> tensor<[72,24,1,1,bf16]> tensor<[1,1,3136,72,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 3136 + d2, d3), memory_config: (98, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 24 + d1 + d2, d3), memory_config: (1728, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 72, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 24 : i32 input_height: 56 : i32 input_width: 56 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 72 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,3136,72,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 72, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,3600,24,bf16]> tensor<[144,24,1,1,bf16]> tensor<[1,1,3600,144,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3600 + d1 * 3600 + d2, d3), memory_config: (113, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 24 + d1 + d2, d3), memory_config: (3456, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3600 + d1 * 60 + d2, d3), memory_config: (3600, 144, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 24 : i32 input_height: 60 : i32 input_width: 60 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 144 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,3600,144,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3600 + d1 * 60 + d2, d3), memory_config: (3600, 144, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,4225,24,bf16]> tensor<[144,24,1,1,bf16]> tensor<[1,1,4225,144,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4225 + d1 * 4225 + d2, d3), memory_config: (133, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 24 + d1 + d2, d3), memory_config: (3456, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4225 + d1 * 65 + d2, d3), memory_config: (4225, 144, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 24 : i32 input_height: 65 : i32 input_width: 65 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 144 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,4225,144,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4225 + d1 * 65 + d2, d3), memory_config: (4225, 144, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,6400,24,f32]> tensor<[72,24,1,1,f32]> tensor<[1,1,6400,72,f32]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 6400 + d1 * 6400 + d2, d3), memory_config: (200, 1, 'tile<32x32, f32>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 24 + d1 + d2, d3), memory_config: (1728, 1, 'f32', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 6400 + d1 * 80 + d2, d3), memory_config: (6400, 72, 'f32', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 24 : i32 input_height: 80 : i32 input_width: 80 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 72 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,6400,72,f32]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 6400 + d1 * 80 + d2, d3), memory_config: (6400, 72, 'f32', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,2520,bf16]> tensor<[2520,168,3,3,bf16]> tensor<[1,1,49,2520,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 79, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 504 + d1 * 3 + d2, d3), memory_config: (1270080, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 2520, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 15 : i32 in_channels: 2520 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 2520 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,49,2520,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 2520, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,2520,bf16]> tensor<[2520,2520,1,1,bf16]> tensor<[1,1,49,2520,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 79, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 2520 + d1 + d2, d3), memory_config: (6350400, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 2520, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 2520 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 2520 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,2520,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 2520, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,256,2560,bf16]> tensor<[1280,2560,1,1,bf16]> tensor<[1,1,256,1280,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 256 + d2, d3), memory_config: (8, 80, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 2560 + d1 + d2, d3), memory_config: (3276800, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (256, 1280, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 2560 : i32 input_height: 16 : i32 input_width: 16 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 1280 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,256,1280,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (256, 1280, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,256,2560,bf16]> tensor<[1280,2560,3,3,bf16]> tensor<[1,1,256,1280,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 256 + d2, d3), memory_config: (8, 80, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 7680 + d1 * 3 + d2, d3), memory_config: (9830400, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (256, 1280, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 2560 : i32 input_height: 16 : i32 input_width: 16 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 1280 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,256,1280,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (256, 1280, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,64,2560,bf16]> tensor<[1280,2560,1,1,bf16]> tensor<[1,1,64,1280,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 64 + d2, d3), memory_config: (2, 80, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 2560 + d1 + d2, d3), memory_config: (3276800, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 8 + d2, d3), memory_config: (64, 1280, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 2560 : i32 input_height: 8 : i32 input_width: 8 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 1280 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,64,1280,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 8 + d2, d3), memory_config: (64, 1280, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,64,2560,bf16]> tensor<[1280,2560,3,3,bf16]> tensor<[1,1,64,1280,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 64 + d2, d3), memory_config: (2, 80, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 7680 + d1 * 3 + d2, d3), memory_config: (9830400, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 8 + d2, d3), memory_config: (64, 1280, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 2560 : i32 input_height: 8 : i32 input_width: 8 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 1280 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,64,1280,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 8 + d2, d3), memory_config: (64, 1280, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,100,256,f32]> tensor<[256,1,3,3,f32]> tensor<[1,1,25,256,f32]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 100 + d2, d3), memory_config: (4, 8, 'tile<32x32, f32>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (768, 3, 'f32', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 25 + d1 * 5 + d2, d3), memory_config: (25, 256, 'f32', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 256 : i32 in_channels: 256 : i32 input_height: 10 : i32 input_width: 10 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 256 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,25,256,f32]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 25 + d1 * 5 + d2, d3), memory_config: (25, 256, 'f32', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,12544,256,bf16]> tensor<[128,256,3,3,bf16]> tensor<[1,1,12544,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 12544 + d2, d3), memory_config: (392, 8, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 768 + d1 * 3 + d2, d3), memory_config: (98304, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (12544, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 256 : i32 input_height: 112 : i32 input_width: 112 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 128 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,12544,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (12544, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,19200,256,bf16]> tensor<[256,1,3,3,bf16]> tensor<[1,1,19200,256,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 19200 + d1 * 19200 + d2, d3), memory_config: (600, 8, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (768, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 19200 + d1 * 160 + d2, d3), memory_config: (19200, 256, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 256 : i32 in_channels: 256 : i32 input_height: 120 : i32 input_width: 160 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 256 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,19200,256,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 19200 + d1 * 160 + d2, d3), memory_config: (19200, 256, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,16384,256,bf16]> tensor<[150,256,1,1,bf16]> tensor<[1,1,16384,150,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 16384 + d2, d3), memory_config: (512, 8, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 + d2, d3), memory_config: (38400, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 128 + d2, d3), memory_config: (16384, 150, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 256 : i32 input_height: 128 : i32 input_width: 128 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 150 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,16384,150,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 128 + d2, d3), memory_config: (16384, 150, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,256,bf16]> tensor<[1024,256,1,1,bf16]> tensor<[1,1,196,1024,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 8, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 + d2, d3), memory_config: (262144, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 1024, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 256 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 1024 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,1024,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 1024, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,256,bf16]> tensor<[128,256,1,1,bf16]> tensor<[1,1,196,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 8, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 + d2, d3), memory_config: (32768, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 256 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,256,bf16]> tensor<[256,256,3,3,bf16]> tensor<[1,1,196,256,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 8, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 768 + d1 * 3 + d2, d3), memory_config: (196608, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 256, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 256 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 256 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,256,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 256, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,256,bf16]> tensor<[512,256,1,1,bf16]> tensor<[1,1,196,512,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 8, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 + d2, d3), memory_config: (131072, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 512, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 256 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 512 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,512,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 512, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,256,bf16]> tensor<[512,256,1,1,bf16]> tensor<[1,1,49,512,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 8, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 + d2, d3), memory_config: (131072, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 512, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 256 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 512 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,49,512,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 512, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,256,bf16]> tensor<[512,256,3,3,bf16]> tensor<[1,1,49,512,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 8, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 768 + d1 * 3 + d2, d3), memory_config: (393216, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 512, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 256 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 512 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,49,512,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 512, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,256,256,bf16]> tensor<[256,256,1,1,bf16]> tensor<[1,1,256,256,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 256 + d2, d3), memory_config: (8, 8, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 + d2, d3), memory_config: (65536, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (256, 256, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 256 : i32 input_height: 16 : i32 input_width: 16 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 256 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,256,256,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (256, 256, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,256,256,bf16]> tensor<[256,256,3,3,bf16]> tensor<[1,1,256,256,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 256 + d2, d3), memory_config: (8, 8, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 768 + d1 * 3 + d2, d3), memory_config: (196608, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (256, 256, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 256 : i32 input_height: 16 : i32 input_width: 16 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 256 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,256,256,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (256, 256, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,256,256,bf16]> tensor<[512,256,3,3,bf16]> tensor<[1,1,256,512,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 256 + d2, d3), memory_config: (8, 8, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 768 + d1 * 3 + d2, d3), memory_config: (393216, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (256, 512, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 256 : i32 input_height: 16 : i32 input_width: 16 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 512 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,256,512,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (256, 512, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,289,256,bf16]> tensor<[256,256,1,7,bf16]> tensor<[1,1,289,256,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 289 + d2, d3), memory_config: (10, 8, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 + d2, d3), memory_config: (65536, 7, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 17 + d2, d3), memory_config: (289, 256, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 256 : i32 input_height: 17 : i32 input_width: 17 : i32 kernel_height: 1 : i32 kernel_width: 7 : i32 out_channels: 256 : i32 padding_height: 0 : i32 padding_width: 3 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,289,256,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 17 + d2, d3), memory_config: (289, 256, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,289,256,bf16]> tensor<[320,256,7,1,bf16]> tensor<[1,1,289,320,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 289 + d2, d3), memory_config: (10, 8, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1792 + d1 * 7 + d2, d3), memory_config: (573440, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 17 + d2, d3), memory_config: (289, 320, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 256 : i32 input_height: 17 : i32 input_width: 17 : i32 kernel_height: 7 : i32 kernel_width: 1 : i32 out_channels: 320 : i32 padding_height: 3 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,289,320,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 17 + d2, d3), memory_config: (289, 320, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,57600,256,bf16]> tensor<[128,256,1,1,bf16]> tensor<[1,1,57600,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 57600 + d1 * 57600 + d2, d3), memory_config: (1800, 8, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 + d2, d3), memory_config: (32768, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 57600 + d1 * 320 + d2, d3), memory_config: (57600, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 256 : i32 input_height: 180 : i32 input_width: 320 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,57600,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 57600 + d1 * 320 + d2, d3), memory_config: (57600, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,57600,256,bf16]> tensor<[512,256,1,1,bf16]> tensor<[1,1,14400,512,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 57600 + d1 * 57600 + d2, d3), memory_config: (1800, 8, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 + d2, d3), memory_config: (131072, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 14400 + d1 * 160 + d2, d3), memory_config: (14400, 512, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 256 : i32 input_height: 180 : i32 input_width: 320 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 512 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,14400,512,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 14400 + d1 * 160 + d2, d3), memory_config: (14400, 512, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,57600,256,bf16]> tensor<[64,256,1,1,bf16]> tensor<[1,1,57600,64,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 57600 + d1 * 57600 + d2, d3), memory_config: (1800, 8, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 + d2, d3), memory_config: (16384, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 57600 + d1 * 320 + d2, d3), memory_config: (57600, 64, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 256 : i32 input_height: 180 : i32 input_width: 320 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 64 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,57600,64,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 57600 + d1 * 320 + d2, d3), memory_config: (57600, 64, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1,256,bf16]> tensor<[256,256,1,1,bf16]> tensor<[1,1,1,256,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 8, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 + d2, d3), memory_config: (65536, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 256, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 256 : i32 input_height: 1 : i32 input_width: 1 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 256 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,1,256,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 256, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,256,bf16]> tensor<[128,256,1,1,bf16]> tensor<[1,1,784,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 8, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 + d2, d3), memory_config: (32768, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 256 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,256,bf16]> tensor<[160,256,1,1,bf16]> tensor<[1,1,784,160,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 8, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 + d2, d3), memory_config: (40960, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 160, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 256 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 160 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,160,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 160, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,256,bf16]> tensor<[20,256,3,3,bf16]> tensor<[1,1,784,20,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 8, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 768 + d1 * 3 + d2, d3), memory_config: (15360, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 20, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 256 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 20 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,20,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 20, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,256,bf16]> tensor<[256,1,3,3,bf16]> tensor<[1,1,784,256,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 8, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (768, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 256, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 256 : i32 in_channels: 256 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 256 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,256,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 256, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,256,bf16]> tensor<[256,1,3,3,bf16]> tensor<[1,1,196,256,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 8, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (768, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 256, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 256 : i32 in_channels: 256 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 256 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,196,256,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 256, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,256,bf16]> tensor<[256,256,1,1,bf16]> tensor<[1,1,784,256,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 8, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 + d2, d3), memory_config: (65536, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 256, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 256 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 256 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,256,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 256, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,256,bf16]> tensor<[256,256,3,3,bf16]> tensor<[1,1,784,256,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 8, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 768 + d1 * 3 + d2, d3), memory_config: (196608, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 256, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 256 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 256 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,256,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 256, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,256,bf16]> tensor<[256,256,3,3,bf16]> tensor<[1,1,196,256,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 8, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 768 + d1 * 3 + d2, d3), memory_config: (196608, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 256, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 256 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 256 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,196,256,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 256, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,256,bf16]> tensor<[32,256,1,1,bf16]> tensor<[1,1,784,32,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 8, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 + d2, d3), memory_config: (8192, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 32, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 256 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 32 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,32,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 32, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,256,bf16]> tensor<[512,256,1,1,bf16]> tensor<[1,1,784,512,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 8, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 + d2, d3), memory_config: (131072, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 512, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 256 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 512 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,512,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 512, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,256,bf16]> tensor<[512,256,3,3,bf16]> tensor<[1,1,784,512,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 8, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 768 + d1 * 3 + d2, d3), memory_config: (393216, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 512, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 256 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 512 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,512,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 512, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,256,bf16]> tensor<[512,256,3,3,bf16]> tensor<[1,1,196,512,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 8, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 768 + d1 * 3 + d2, d3), memory_config: (393216, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 512, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 256 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 512 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,196,512,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 512, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,256,bf16]> tensor<[512,256,3,3,bf16]> tensor<[1,1,784,512,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 8, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 768 + d1 * 3 + d2, d3), memory_config: (393216, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 512, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 256 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 512 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,512,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 512, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,256,bf16]> tensor<[64,256,1,1,bf16]> tensor<[1,1,784,64,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 8, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 + d2, d3), memory_config: (16384, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 64, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 256 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 64 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,64,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 64, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,4,256,f32]> tensor<[24,256,1,1,f32]> tensor<[1,1,4,24,f32]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4 + d1 * 4 + d2, d3), memory_config: (1, 8, 'tile<32x32, f32>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 + d2, d3), memory_config: (6144, 1, 'f32', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4 + d1 * 2 + d2, d3), memory_config: (4, 24, 'f32', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 256 : i32 input_height: 2 : i32 input_width: 2 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 24 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,4,24,f32]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4 + d1 * 2 + d2, d3), memory_config: (4, 24, 'f32', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,4,256,f32]> tensor<[256,1,3,3,f32]> tensor<[1,1,4,256,f32]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4 + d1 * 4 + d2, d3), memory_config: (1, 8, 'tile<32x32, f32>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (768, 3, 'f32', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4 + d1 * 2 + d2, d3), memory_config: (4, 256, 'f32', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 256 : i32 in_channels: 256 : i32 input_height: 2 : i32 input_width: 2 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 256 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,4,256,f32]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4 + d1 * 2 + d2, d3), memory_config: (4, 256, 'f32', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,4,256,f32]> tensor<[546,256,1,1,f32]> tensor<[1,1,4,546,f32]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4 + d1 * 4 + d2, d3), memory_config: (1, 8, 'tile<32x32, f32>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 + d2, d3), memory_config: (139776, 1, 'f32', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4 + d1 * 2 + d2, d3), memory_config: (4, 546, 'f32', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 256 : i32 input_height: 2 : i32 input_width: 2 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 546 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,4,546,f32]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4 + d1 * 2 + d2, d3), memory_config: (4, 546, 'f32', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,4,256,f32]> tensor<[64,256,1,1,f32]> tensor<[1,1,4,64,f32]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4 + d1 * 4 + d2, d3), memory_config: (1, 8, 'tile<32x32, f32>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 + d2, d3), memory_config: (16384, 1, 'f32', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4 + d1 * 2 + d2, d3), memory_config: (4, 64, 'f32', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 256 : i32 input_height: 2 : i32 input_width: 2 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 64 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,4,64,f32]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4 + d1 * 2 + d2, d3), memory_config: (4, 64, 'f32', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1024,256,bf16]> tensor<[128,256,1,1,bf16]> tensor<[1,1,1024,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 1024 + d2, d3), memory_config: (32, 8, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 + d2, d3), memory_config: (32768, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 256 : i32 input_height: 32 : i32 input_width: 32 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,1024,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1024,256,bf16]> tensor<[255,256,1,1,bf16]> tensor<[1,1,1024,255,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 1024 + d2, d3), memory_config: (32, 8, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 + d2, d3), memory_config: (65280, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 255, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 256 : i32 input_height: 32 : i32 input_width: 32 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 255 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,1024,255,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 255, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1024,256,bf16]> tensor<[256,256,1,1,bf16]> tensor<[1,1,1024,256,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 1024 + d2, d3), memory_config: (32, 8, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 + d2, d3), memory_config: (65536, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 256, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 256 : i32 input_height: 32 : i32 input_width: 32 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 256 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,1024,256,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 256, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1024,256,bf16]> tensor<[256,256,3,3,bf16]> tensor<[1,1,1024,256,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 1024 + d2, d3), memory_config: (32, 8, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 768 + d1 * 3 + d2, d3), memory_config: (196608, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 256, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 256 : i32 input_height: 32 : i32 input_width: 32 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 256 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,1024,256,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 256, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1024,256,bf16]> tensor<[256,256,3,3,bf16]> tensor<[1,1,256,256,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 1024 + d2, d3), memory_config: (32, 8, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 768 + d1 * 3 + d2, d3), memory_config: (196608, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (256, 256, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 256 : i32 input_height: 32 : i32 input_width: 32 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 256 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,256,256,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (256, 256, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1024,256,bf16]> tensor<[512,256,3,3,bf16]> tensor<[1,1,1024,512,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 1024 + d2, d3), memory_config: (32, 8, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 768 + d1 * 3 + d2, d3), memory_config: (393216, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 512, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 256 : i32 input_height: 32 : i32 input_width: 32 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 512 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,1024,512,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 512, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1024,256,bf16]> tensor<[512,256,3,3,bf16]> tensor<[1,1,256,512,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 1024 + d2, d3), memory_config: (32, 8, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 768 + d1 * 3 + d2, d3), memory_config: (393216, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (256, 512, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 256 : i32 input_height: 32 : i32 input_width: 32 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 512 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,256,512,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (256, 512, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1444,256,bf16]> tensor<[256,1,3,3,bf16]> tensor<[1,1,1444,256,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1444 + d1 * 1444 + d2, d3), memory_config: (46, 8, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (768, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1444 + d1 * 38 + d2, d3), memory_config: (1444, 256, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 256 : i32 in_channels: 256 : i32 input_height: 38 : i32 input_width: 38 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 256 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,1444,256,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1444 + d1 * 38 + d2, d3), memory_config: (1444, 256, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1444,256,bf16]> tensor<[256,256,1,1,bf16]> tensor<[1,1,1444,256,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1444 + d1 * 1444 + d2, d3), memory_config: (46, 8, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 + d2, d3), memory_config: (65536, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1444 + d1 * 38 + d2, d3), memory_config: (1444, 256, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 256 : i32 input_height: 38 : i32 input_width: 38 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 256 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,1444,256,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1444 + d1 * 38 + d2, d3), memory_config: (1444, 256, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1444,256,bf16]> tensor<[728,256,1,1,bf16]> tensor<[1,1,1444,728,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1444 + d1 * 1444 + d2, d3), memory_config: (46, 8, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 + d2, d3), memory_config: (186368, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1444 + d1 * 38 + d2, d3), memory_config: (1444, 728, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 256 : i32 input_height: 38 : i32 input_width: 38 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 728 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,1444,728,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1444 + d1 * 38 + d2, d3), memory_config: (1444, 728, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,9,256,f32]> tensor<[128,256,1,1,f32]> tensor<[1,1,9,128,f32]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 9 + d1 * 9 + d2, d3), memory_config: (1, 8, 'tile<32x32, f32>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 + d2, d3), memory_config: (32768, 1, 'f32', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 9 + d1 * 3 + d2, d3), memory_config: (9, 128, 'f32', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 256 : i32 input_height: 3 : i32 input_width: 3 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,9,128,f32]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 9 + d1 * 3 + d2, d3), memory_config: (9, 128, 'f32', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,9,256,f32]> tensor<[24,256,1,1,f32]> tensor<[1,1,9,24,f32]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 9 + d1 * 9 + d2, d3), memory_config: (1, 8, 'tile<32x32, f32>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 + d2, d3), memory_config: (6144, 1, 'f32', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 9 + d1 * 3 + d2, d3), memory_config: (9, 24, 'f32', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 256 : i32 input_height: 3 : i32 input_width: 3 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 24 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,9,24,f32]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 9 + d1 * 3 + d2, d3), memory_config: (9, 24, 'f32', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,9,256,f32]> tensor<[256,1,3,3,f32]> tensor<[1,1,9,256,f32]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 9 + d1 * 9 + d2, d3), memory_config: (1, 8, 'tile<32x32, f32>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (768, 3, 'f32', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 9 + d1 * 3 + d2, d3), memory_config: (9, 256, 'f32', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 256 : i32 in_channels: 256 : i32 input_height: 3 : i32 input_width: 3 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 256 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,9,256,f32]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 9 + d1 * 3 + d2, d3), memory_config: (9, 256, 'f32', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,9,256,f32]> tensor<[546,256,1,1,f32]> tensor<[1,1,9,546,f32]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 9 + d1 * 9 + d2, d3), memory_config: (1, 8, 'tile<32x32, f32>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 + d2, d3), memory_config: (139776, 1, 'f32', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 9 + d1 * 3 + d2, d3), memory_config: (9, 546, 'f32', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 256 : i32 input_height: 3 : i32 input_width: 3 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 546 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,9,546,f32]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 9 + d1 * 3 + d2, d3), memory_config: (9, 546, 'f32', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,3600,256,bf16]> tensor<[1024,256,1,1,bf16]> tensor<[1,1,3600,1024,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3600 + d1 * 3600 + d2, d3), memory_config: (113, 8, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 + d2, d3), memory_config: (262144, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3600 + d1 * 80 + d2, d3), memory_config: (3600, 1024, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 256 : i32 input_height: 45 : i32 input_width: 80 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 1024 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,3600,1024,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3600 + d1 * 80 + d2, d3), memory_config: (3600, 1024, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,3600,256,bf16]> tensor<[256,256,3,3,bf16]> tensor<[1,1,3600,256,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3600 + d1 * 3600 + d2, d3), memory_config: (113, 8, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 768 + d1 * 3 + d2, d3), memory_config: (196608, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3600 + d1 * 80 + d2, d3), memory_config: (3600, 256, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 256 : i32 input_height: 45 : i32 input_width: 80 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 256 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,3600,256,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3600 + d1 * 80 + d2, d3), memory_config: (3600, 256, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,512,256,bf16]> tensor<[1024,256,1,1,bf16]> tensor<[1,1,512,1024,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 512 + d1 * 512 + d2, d3), memory_config: (16, 8, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 + d2, d3), memory_config: (262144, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 512 + d1 + d2, d3), memory_config: (512, 1024, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 256 : i32 input_height: 512 : i32 input_width: 1 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 1024 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,512,1024,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 512 + d1 + d2, d3), memory_config: (512, 1024, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,3136,256,bf16]> tensor<[128,256,1,1,bf16]> tensor<[1,1,3136,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 3136 + d2, d3), memory_config: (98, 8, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 + d2, d3), memory_config: (32768, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 256 : i32 input_height: 56 : i32 input_width: 56 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,3136,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,3136,256,bf16]> tensor<[18,256,3,3,bf16]> tensor<[1,1,3136,18,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 3136 + d2, d3), memory_config: (98, 8, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 768 + d1 * 3 + d2, d3), memory_config: (13824, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 18, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 256 : i32 input_height: 56 : i32 input_width: 56 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 18 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,3136,18,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 18, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,3136,256,bf16]> tensor<[256,256,1,1,bf16]> tensor<[1,1,3136,256,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 3136 + d2, d3), memory_config: (98, 8, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 + d2, d3), memory_config: (65536, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 256, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 256 : i32 input_height: 56 : i32 input_width: 56 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 256 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,3136,256,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 256, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,3136,256,bf16]> tensor<[256,256,3,3,bf16]> tensor<[1,1,3136,256,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 3136 + d2, d3), memory_config: (98, 8, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 768 + d1 * 3 + d2, d3), memory_config: (196608, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 256, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 256 : i32 input_height: 56 : i32 input_width: 56 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 256 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,3136,256,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 256, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,3136,256,bf16]> tensor<[256,256,3,3,bf16]> tensor<[1,1,3136,256,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 3136 + d2, d3), memory_config: (98, 8, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 768 + d1 * 3 + d2, d3), memory_config: (196608, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 256, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 256 : i32 input_height: 56 : i32 input_width: 56 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 256 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,3136,256,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 256, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,3136,256,bf16]> tensor<[256,256,3,3,bf16]> tensor<[1,1,784,256,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 3136 + d2, d3), memory_config: (98, 8, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 768 + d1 * 3 + d2, d3), memory_config: (196608, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 256, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 256 : i32 input_height: 56 : i32 input_width: 56 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 256 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,784,256,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 256, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,3136,256,bf16]> tensor<[256,4,3,3,bf16]> tensor<[1,1,3136,256,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 3136 + d2, d3), memory_config: (98, 8, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12 + d1 * 3 + d2, d3), memory_config: (3072, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 256, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 64 : i32 in_channels: 256 : i32 input_height: 56 : i32 input_width: 56 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 256 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,3136,256,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 256, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,3136,256,bf16]> tensor<[36,256,3,3,bf16]> tensor<[1,1,784,36,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 3136 + d2, d3), memory_config: (98, 8, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 768 + d1 * 3 + d2, d3), memory_config: (27648, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 36, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 256 : i32 input_height: 56 : i32 input_width: 56 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 36 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,784,36,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 36, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,3136,256,bf16]> tensor<[512,256,1,1,bf16]> tensor<[1,1,3136,512,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 3136 + d2, d3), memory_config: (98, 8, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 + d2, d3), memory_config: (131072, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 512, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 256 : i32 input_height: 56 : i32 input_width: 56 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 512 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,3136,512,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 512, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,3136,256,bf16]> tensor<[512,256,1,1,bf16]> tensor<[1,1,784,512,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 3136 + d2, d3), memory_config: (98, 8, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 + d2, d3), memory_config: (131072, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 512, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 256 : i32 input_height: 56 : i32 input_width: 56 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 512 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,784,512,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 512, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,3136,256,bf16]> tensor<[64,256,1,1,bf16]> tensor<[1,1,3136,64,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 3136 + d2, d3), memory_config: (98, 8, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 + d2, d3), memory_config: (16384, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 64, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 256 : i32 input_height: 56 : i32 input_width: 56 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 64 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,3136,64,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 64, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,25,256,f32]> tensor<[512,256,1,1,f32]> tensor<[1,1,25,512,f32]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 25 + d1 * 25 + d2, d3), memory_config: (1, 8, 'tile<32x32, f32>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 + d2, d3), memory_config: (131072, 1, 'f32', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 25 + d1 * 5 + d2, d3), memory_config: (25, 512, 'f32', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 256 : i32 input_height: 5 : i32 input_width: 5 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 512 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,25,512,f32]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 25 + d1 * 5 + d2, d3), memory_config: (25, 512, 'f32', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,4096,256,bf16]> tensor<[128,256,1,1,bf16]> tensor<[1,1,4096,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 4096 + d2, d3), memory_config: (128, 8, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 + d2, d3), memory_config: (32768, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (4096, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 256 : i32 input_height: 64 : i32 input_width: 64 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,4096,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (4096, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,4096,256,bf16]> tensor<[128,256,3,3,bf16]> tensor<[1,1,4096,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 4096 + d2, d3), memory_config: (128, 8, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 768 + d1 * 3 + d2, d3), memory_config: (98304, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (4096, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 256 : i32 input_height: 64 : i32 input_width: 64 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 128 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,4096,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (4096, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,4096,256,bf16]> tensor<[255,256,1,1,bf16]> tensor<[1,1,4096,255,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 4096 + d2, d3), memory_config: (128, 8, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 + d2, d3), memory_config: (65280, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (4096, 255, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 256 : i32 input_height: 64 : i32 input_width: 64 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 255 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,4096,255,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (4096, 255, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,4096,256,bf16]> tensor<[256,1,3,3,bf16]> tensor<[1,1,4096,256,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 4096 + d2, d3), memory_config: (128, 8, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (768, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (4096, 256, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 256 : i32 in_channels: 256 : i32 input_height: 64 : i32 input_width: 64 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 256 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,4096,256,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (4096, 256, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,4096,256,bf16]> tensor<[512,256,3,3,bf16]> tensor<[1,1,1024,512,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 4096 + d2, d3), memory_config: (128, 8, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 768 + d1 * 3 + d2, d3), memory_config: (393216, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 512, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 256 : i32 input_height: 64 : i32 input_width: 64 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 512 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,1024,512,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 512, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,4096,256,bf16]> tensor<[64,256,1,1,bf16]> tensor<[1,1,4096,64,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 4096 + d2, d3), memory_config: (128, 8, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 + d2, d3), memory_config: (16384, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (4096, 64, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 256 : i32 input_height: 64 : i32 input_width: 64 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 64 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,4096,64,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (4096, 64, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,5625,256,bf16]> tensor<[256,1,3,3,bf16]> tensor<[1,1,5625,256,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5625 + d1 * 5625 + d2, d3), memory_config: (176, 8, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (768, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5625 + d1 * 75 + d2, d3), memory_config: (5625, 256, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 256 : i32 in_channels: 256 : i32 input_height: 75 : i32 input_width: 75 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 256 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,5625,256,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5625 + d1 * 75 + d2, d3), memory_config: (5625, 256, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,5625,256,bf16]> tensor<[256,1,3,3,bf16]> tensor<[1,1,1444,256,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5625 + d1 * 5625 + d2, d3), memory_config: (176, 8, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (768, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1444 + d1 * 38 + d2, d3), memory_config: (1444, 256, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 256 : i32 in_channels: 256 : i32 input_height: 75 : i32 input_width: 75 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 256 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,1444,256,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1444 + d1 * 38 + d2, d3), memory_config: (1444, 256, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,5625,256,bf16]> tensor<[256,256,1,1,bf16]> tensor<[1,1,5625,256,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5625 + d1 * 5625 + d2, d3), memory_config: (176, 8, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 + d2, d3), memory_config: (65536, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5625 + d1 * 75 + d2, d3), memory_config: (5625, 256, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 256 : i32 input_height: 75 : i32 input_width: 75 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 256 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,5625,256,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5625 + d1 * 75 + d2, d3), memory_config: (5625, 256, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,5625,256,bf16]> tensor<[256,256,1,1,bf16]> tensor<[1,1,1444,256,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5625 + d1 * 5625 + d2, d3), memory_config: (176, 8, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 + d2, d3), memory_config: (65536, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1444 + d1 * 38 + d2, d3), memory_config: (1444, 256, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 256 : i32 input_height: 75 : i32 input_width: 75 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 256 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,1444,256,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1444 + d1 * 38 + d2, d3), memory_config: (1444, 256, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,256,bf16]> tensor<[1024,256,1,1,bf16]> tensor<[1,1,49,1024,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 8, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 + d2, d3), memory_config: (262144, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 1024, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 256 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 1024 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,1024,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 1024, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,256,bf16]> tensor<[256,256,3,3,bf16]> tensor<[1,1,49,256,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 8, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 768 + d1 * 3 + d2, d3), memory_config: (196608, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 256, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 256 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 256 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,256,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 256, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,256,bf16]> tensor<[512,256,1,1,bf16]> tensor<[1,1,49,512,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 8, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 + d2, d3), memory_config: (131072, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 512, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 256 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 512 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,512,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 512, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,14400,256,bf16]> tensor<[256,256,3,3,bf16]> tensor<[1,1,3600,256,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 14400 + d1 * 14400 + d2, d3), memory_config: (450, 8, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 768 + d1 * 3 + d2, d3), memory_config: (196608, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3600 + d1 * 80 + d2, d3), memory_config: (3600, 256, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 256 : i32 input_height: 90 : i32 input_width: 160 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 256 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,3600,256,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3600 + d1 * 80 + d2, d3), memory_config: (3600, 256, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,262,bf16]> tensor<[256,262,1,1,bf16]> tensor<[1,1,784,256,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 9, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 262 + d1 + d2, d3), memory_config: (67072, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 256, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 262 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 256 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,256,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 256, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,144,272,bf16]> tensor<[1632,272,1,1,bf16]> tensor<[1,1,144,1632,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 144 + d1 * 144 + d2, d3), memory_config: (5, 9, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 272 + d1 + d2, d3), memory_config: (443904, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 144 + d1 * 12 + d2, d3), memory_config: (144, 1632, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 272 : i32 input_height: 12 : i32 input_width: 12 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 1632 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,144,1632,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 144 + d1 * 12 + d2, d3), memory_config: (144, 1632, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,272,bf16]> tensor<[160,272,3,3,bf16]> tensor<[1,1,49,160,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 9, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 816 + d1 * 3 + d2, d3), memory_config: (130560, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 160, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 272 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 160 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,160,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 160, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,276,bf16]> tensor<[34,276,3,3,bf16]> tensor<[1,1,784,34,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 9, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 828 + d1 * 3 + d2, d3), memory_config: (28152, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 34, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 276 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 34 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,34,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 34, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,288,bf16]> tensor<[128,288,1,1,bf16]> tensor<[1,1,196,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 9, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 288 + d1 + d2, d3), memory_config: (36864, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 288 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,289,288,bf16]> tensor<[88,288,1,1,bf16]> tensor<[1,1,289,88,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 289 + d2, d3), memory_config: (10, 9, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 288 + d1 + d2, d3), memory_config: (25344, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 17 + d2, d3), memory_config: (289, 88, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 288 : i32 input_height: 17 : i32 input_width: 17 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 88 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,289,88,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 17 + d2, d3), memory_config: (289, 88, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,361,288,bf16]> tensor<[96,288,1,1,bf16]> tensor<[1,1,361,96,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 361 + d1 * 361 + d2, d3), memory_config: (12, 9, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 288 + d1 + d2, d3), memory_config: (27648, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 361 + d1 * 19 + d2, d3), memory_config: (361, 96, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 288 : i32 input_height: 19 : i32 input_width: 19 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 96 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,361,96,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 361 + d1 * 19 + d2, d3), memory_config: (361, 96, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,288,bf16]> tensor<[128,288,1,1,bf16]> tensor<[1,1,784,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 9, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 288 + d1 + d2, d3), memory_config: (36864, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 288 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1089,288,bf16]> tensor<[288,1,5,5,bf16]> tensor<[1,1,1089,288,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1089 + d1 * 1089 + d2, d3), memory_config: (35, 9, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5 + d1 * 5 + d2, d3), memory_config: (1440, 5, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1089 + d1 * 33 + d2, d3), memory_config: (1089, 288, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 288 : i32 in_channels: 288 : i32 input_height: 33 : i32 input_width: 33 : i32 kernel_height: 5 : i32 kernel_width: 5 : i32 out_channels: 288 : i32 padding_height: 2 : i32 padding_width: 2 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,1089,288,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1089 + d1 * 33 + d2, d3), memory_config: (1089, 288, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1089,288,bf16]> tensor<[48,288,1,1,bf16]> tensor<[1,1,1089,48,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1089 + d1 * 1089 + d2, d3), memory_config: (35, 9, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 288 + d1 + d2, d3), memory_config: (13824, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1089 + d1 * 33 + d2, d3), memory_config: (1089, 48, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 288 : i32 input_height: 33 : i32 input_width: 33 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 48 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,1089,48,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1089 + d1 * 33 + d2, d3), memory_config: (1089, 48, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1225,288,bf16]> tensor<[288,1,3,3,bf16]> tensor<[1,1,289,288,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1225 + d1 * 1225 + d2, d3), memory_config: (39, 9, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (864, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 17 + d2, d3), memory_config: (289, 288, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 288 : i32 in_channels: 288 : i32 input_height: 35 : i32 input_width: 35 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 288 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,289,288,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 17 + d2, d3), memory_config: (289, 288, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1444,288,bf16]> tensor<[288,1,5,5,bf16]> tensor<[1,1,1444,288,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1444 + d1 * 1444 + d2, d3), memory_config: (46, 9, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5 + d1 * 5 + d2, d3), memory_config: (1440, 5, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1444 + d1 * 38 + d2, d3), memory_config: (1444, 288, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 288 : i32 in_channels: 288 : i32 input_height: 38 : i32 input_width: 38 : i32 kernel_height: 5 : i32 kernel_width: 5 : i32 out_channels: 288 : i32 padding_height: 2 : i32 padding_width: 2 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,1444,288,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1444 + d1 * 38 + d2, d3), memory_config: (1444, 288, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1444,288,bf16]> tensor<[48,288,1,1,bf16]> tensor<[1,1,1444,48,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1444 + d1 * 1444 + d2, d3), memory_config: (46, 9, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 288 + d1 + d2, d3), memory_config: (13824, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1444 + d1 * 38 + d2, d3), memory_config: (1444, 48, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 288 : i32 input_height: 38 : i32 input_width: 38 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 48 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,1444,48,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1444 + d1 * 38 + d2, d3), memory_config: (1444, 48, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1521,288,bf16]> tensor<[288,1,3,3,bf16]> tensor<[1,1,361,288,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1521 + d1 * 1521 + d2, d3), memory_config: (48, 9, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (864, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 361 + d1 * 19 + d2, d3), memory_config: (361, 288, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 288 : i32 in_channels: 288 : i32 input_height: 39 : i32 input_width: 39 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 288 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,361,288,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 361 + d1 * 19 + d2, d3), memory_config: (361, 288, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,28,bf16]> tensor<[16,28,3,3,bf16]> tensor<[1,1,784,16,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 84 + d1 * 3 + d2, d3), memory_config: (1344, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 16, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 28 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 16 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,16,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 16, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,296,bf16]> tensor<[134,296,3,3,bf16]> tensor<[1,1,784,134,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 10, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 888 + d1 * 3 + d2, d3), memory_config: (118992, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 134, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 296 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 134 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,134,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 134, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,304,bf16]> tensor<[116,304,3,3,bf16]> tensor<[1,1,196,116,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 10, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 912 + d1 * 3 + d2, d3), memory_config: (105792, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 116, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 304 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 116 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,116,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 116, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,10,3072,bf16]> tensor<[3072,1,4,1,bf16]> tensor<[1,1,13,3072,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 10 + d1 * 10 + d2, d3), memory_config: (1, 96, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4 + d1 * 4 + d2, d3), memory_config: (12288, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 13 + d1 + d2, d3), memory_config: (13, 3072, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 3072 : i32 in_channels: 3072 : i32 input_height: 10 : i32 input_width: 1 : i32 kernel_height: 4 : i32 kernel_width: 1 : i32 out_channels: 3072 : i32 padding_height: 3 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,13,3072,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 13 + d1 + d2, d3), memory_config: (13, 3072, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,11,3072,bf16]> tensor<[3072,1,4,1,bf16]> tensor<[1,1,14,3072,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 11 + d1 * 11 + d2, d3), memory_config: (1, 96, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4 + d1 * 4 + d2, d3), memory_config: (12288, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 14 + d1 + d2, d3), memory_config: (14, 3072, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 3072 : i32 in_channels: 3072 : i32 input_height: 11 : i32 input_width: 1 : i32 kernel_height: 4 : i32 kernel_width: 1 : i32 out_channels: 3072 : i32 padding_height: 3 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,14,3072,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 14 + d1 + d2, d3), memory_config: (14, 3072, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,12,3072,bf16]> tensor<[3072,1,4,1,bf16]> tensor<[1,1,15,3072,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12 + d1 * 12 + d2, d3), memory_config: (1, 96, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4 + d1 * 4 + d2, d3), memory_config: (12288, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 15 + d1 + d2, d3), memory_config: (15, 3072, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 3072 : i32 in_channels: 3072 : i32 input_height: 12 : i32 input_width: 1 : i32 kernel_height: 4 : i32 kernel_width: 1 : i32 out_channels: 3072 : i32 padding_height: 3 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,15,3072,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 15 + d1 + d2, d3), memory_config: (15, 3072, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,13,3072,bf16]> tensor<[3072,1,4,1,bf16]> tensor<[1,1,16,3072,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 13 + d1 * 13 + d2, d3), memory_config: (1, 96, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4 + d1 * 4 + d2, d3), memory_config: (12288, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16 + d1 + d2, d3), memory_config: (16, 3072, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 3072 : i32 in_channels: 3072 : i32 input_height: 13 : i32 input_width: 1 : i32 kernel_height: 4 : i32 kernel_width: 1 : i32 out_channels: 3072 : i32 padding_height: 3 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,16,3072,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16 + d1 + d2, d3), memory_config: (16, 3072, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,14,3072,bf16]> tensor<[3072,1,4,1,bf16]> tensor<[1,1,17,3072,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 14 + d1 * 14 + d2, d3), memory_config: (1, 96, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4 + d1 * 4 + d2, d3), memory_config: (12288, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 17 + d1 + d2, d3), memory_config: (17, 3072, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 3072 : i32 in_channels: 3072 : i32 input_height: 14 : i32 input_width: 1 : i32 kernel_height: 4 : i32 kernel_width: 1 : i32 out_channels: 3072 : i32 padding_height: 3 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,17,3072,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 17 + d1 + d2, d3), memory_config: (17, 3072, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,15,3072,bf16]> tensor<[3072,1,4,1,bf16]> tensor<[1,1,18,3072,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 15 + d1 * 15 + d2, d3), memory_config: (1, 96, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4 + d1 * 4 + d2, d3), memory_config: (12288, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 18 + d1 + d2, d3), memory_config: (18, 3072, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 3072 : i32 in_channels: 3072 : i32 input_height: 15 : i32 input_width: 1 : i32 kernel_height: 4 : i32 kernel_width: 1 : i32 out_channels: 3072 : i32 padding_height: 3 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,18,3072,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 18 + d1 + d2, d3), memory_config: (18, 3072, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,6,3072,bf16]> tensor<[3072,1,4,1,bf16]> tensor<[1,1,9,3072,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 6 + d1 * 6 + d2, d3), memory_config: (1, 96, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4 + d1 * 4 + d2, d3), memory_config: (12288, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 9 + d1 + d2, d3), memory_config: (9, 3072, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 3072 : i32 in_channels: 3072 : i32 input_height: 6 : i32 input_width: 1 : i32 kernel_height: 4 : i32 kernel_width: 1 : i32 out_channels: 3072 : i32 padding_height: 3 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,9,3072,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 9 + d1 + d2, d3), memory_config: (9, 3072, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,7,3072,bf16]> tensor<[3072,1,4,1,bf16]> tensor<[1,1,10,3072,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 7 + d1 * 7 + d2, d3), memory_config: (1, 96, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4 + d1 * 4 + d2, d3), memory_config: (12288, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 10 + d1 + d2, d3), memory_config: (10, 3072, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 3072 : i32 in_channels: 3072 : i32 input_height: 7 : i32 input_width: 1 : i32 kernel_height: 4 : i32 kernel_width: 1 : i32 out_channels: 3072 : i32 padding_height: 3 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,10,3072,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 10 + d1 + d2, d3), memory_config: (10, 3072, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,8,3072,bf16]> tensor<[3072,1,4,1,bf16]> tensor<[1,1,11,3072,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 8 + d1 * 8 + d2, d3), memory_config: (1, 96, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4 + d1 * 4 + d2, d3), memory_config: (12288, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 11 + d1 + d2, d3), memory_config: (11, 3072, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 3072 : i32 in_channels: 3072 : i32 input_height: 8 : i32 input_width: 1 : i32 kernel_height: 4 : i32 kernel_width: 1 : i32 out_channels: 3072 : i32 padding_height: 3 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,11,3072,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 11 + d1 + d2, d3), memory_config: (11, 3072, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,8,3072,bf16]> tensor<[768,768,1,1,bf16]> tensor<[1,1,8,768,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 8 + d1 * 8 + d2, d3), memory_config: (1, 96, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 768 + d1 + d2, d3), memory_config: (589824, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 8 + d1 + d2, d3), memory_config: (8, 768, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 4 : i32 in_channels: 3072 : i32 input_height: 8 : i32 input_width: 1 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 768 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,8,768,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 8 + d1 + d2, d3), memory_config: (8, 768, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,9,3072,bf16]> tensor<[3072,1,4,1,bf16]> tensor<[1,1,12,3072,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 9 + d1 * 9 + d2, d3), memory_config: (1, 96, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4 + d1 * 4 + d2, d3), memory_config: (12288, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12 + d1 + d2, d3), memory_config: (12, 3072, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 3072 : i32 in_channels: 3072 : i32 input_height: 9 : i32 input_width: 1 : i32 kernel_height: 4 : i32 kernel_width: 1 : i32 out_channels: 3072 : i32 padding_height: 3 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,12,3072,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12 + d1 + d2, d3), memory_config: (12, 3072, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,310,bf16]> tensor<[58,310,3,3,bf16]> tensor<[1,1,784,58,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 10, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 930 + d1 * 3 + d2, d3), memory_config: (53940, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 58, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 310 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 58 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,58,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 58, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,320,bf16]> tensor<[128,320,1,1,bf16]> tensor<[1,1,196,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 10, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 320 + d1 + d2, d3), memory_config: (40960, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 320 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,320,bf16]> tensor<[40,320,3,3,bf16]> tensor<[1,1,196,40,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 10, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 960 + d1 * 3 + d2, d3), memory_config: (38400, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 40, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 320 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 40 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,40,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 40, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,289,320,bf16]> tensor<[320,320,3,3,bf16]> tensor<[1,1,64,320,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 289 + d2, d3), memory_config: (10, 10, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 960 + d1 * 3 + d2, d3), memory_config: (307200, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 8 + d2, d3), memory_config: (64, 320, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 320 : i32 input_height: 17 : i32 input_width: 17 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 320 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,64,320,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 8 + d2, d3), memory_config: (64, 320, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,320,bf16]> tensor<[128,320,1,1,bf16]> tensor<[1,1,784,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 10, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 320 + d1 + d2, d3), memory_config: (40960, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 320 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1200,320,bf16]> tensor<[320,320,2,2,bf16]> tensor<[1,1,300,320,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1200 + d1 * 1200 + d2, d3), memory_config: (38, 10, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 640 + d1 * 2 + d2, d3), memory_config: (204800, 2, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 300 + d1 * 20 + d2, d3), memory_config: (300, 320, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 320 : i32 input_height: 30 : i32 input_width: 40 : i32 kernel_height: 2 : i32 kernel_width: 2 : i32 out_channels: 320 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,300,320,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 300 + d1 * 20 + d2, d3), memory_config: (300, 320, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1200,320,bf16]> tensor<[512,320,3,3,bf16]> tensor<[1,1,300,512,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1200 + d1 * 1200 + d2, d3), memory_config: (38, 10, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 960 + d1 * 3 + d2, d3), memory_config: (491520, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 300 + d1 * 20 + d2, d3), memory_config: (300, 512, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 320 : i32 input_height: 30 : i32 input_width: 40 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 512 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,300,512,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 300 + d1 * 20 + d2, d3), memory_config: (300, 512, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1200,320,bf16]> tensor<[64,320,1,1,bf16]> tensor<[1,1,1200,64,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1200 + d1 * 1200 + d2, d3), memory_config: (38, 10, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 320 + d1 + d2, d3), memory_config: (20480, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1200 + d1 * 40 + d2, d3), memory_config: (1200, 64, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 320 : i32 input_height: 30 : i32 input_width: 40 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 64 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,1200,64,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1200 + d1 * 40 + d2, d3), memory_config: (1200, 64, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1024,320,bf16]> tensor<[640,320,1,1,bf16]> tensor<[1,1,1024,640,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 1024 + d2, d3), memory_config: (32, 10, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 320 + d1 + d2, d3), memory_config: (204800, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 640, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 320 : i32 input_height: 32 : i32 input_width: 32 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 640 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,1024,640,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 640, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1024,320,bf16]> tensor<[640,320,3,3,bf16]> tensor<[1,1,1024,640,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 1024 + d2, d3), memory_config: (32, 10, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 960 + d1 * 3 + d2, d3), memory_config: (614400, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 640, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 320 : i32 input_height: 32 : i32 input_width: 32 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 640 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,1024,640,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 640, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,4096,320,bf16]> tensor<[320,320,1,1,bf16]> tensor<[1,1,4096,320,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 4096 + d2, d3), memory_config: (128, 10, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 320 + d1 + d2, d3), memory_config: (102400, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (4096, 320, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 320 : i32 input_height: 64 : i32 input_width: 64 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 320 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,4096,320,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (4096, 320, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,4096,320,bf16]> tensor<[320,320,3,3,bf16]> tensor<[1,1,4096,320,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 4096 + d2, d3), memory_config: (128, 10, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 960 + d1 * 3 + d2, d3), memory_config: (307200, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (4096, 320, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 320 : i32 input_height: 64 : i32 input_width: 64 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 320 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,4096,320,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (4096, 320, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,4096,320,bf16]> tensor<[320,320,3,3,bf16]> tensor<[1,1,1024,320,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 4096 + d2, d3), memory_config: (128, 10, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 960 + d1 * 3 + d2, d3), memory_config: (307200, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 320, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 320 : i32 input_height: 64 : i32 input_width: 64 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 320 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,1024,320,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 320, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,4096,320,bf16]> tensor<[4,320,3,3,bf16]> tensor<[1,1,4096,4,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 4096 + d2, d3), memory_config: (128, 10, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 960 + d1 * 3 + d2, d3), memory_config: (3840, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (4096, 4, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 320 : i32 input_height: 64 : i32 input_width: 64 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 4 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,4096,4,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (4096, 4, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,320,bf16]> tensor<[1280,320,1,1,bf16]> tensor<[1,1,49,1280,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 10, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 320 + d1 + d2, d3), memory_config: (409600, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 1280, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 320 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 1280 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,1280,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 1280, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,64,320,bf16]> tensor<[1280,320,1,1,bf16]> tensor<[1,1,64,1280,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 64 + d2, d3), memory_config: (2, 10, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 320 + d1 + d2, d3), memory_config: (409600, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 8 + d2, d3), memory_config: (64, 1280, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 320 : i32 input_height: 8 : i32 input_width: 8 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 1280 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,64,1280,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 8 + d2, d3), memory_config: (64, 1280, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,328,bf16]> tensor<[320,328,1,1,bf16]> tensor<[1,1,784,320,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 11, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 328 + d1 + d2, d3), memory_config: (104960, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 320, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 328 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 320 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,320,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 320, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,12544,32,bf16]> tensor<[16,32,1,1,bf16]> tensor<[1,1,12544,16,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 12544 + d2, d3), memory_config: (392, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 32 + d1 + d2, d3), memory_config: (512, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (12544, 16, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 32 : i32 input_height: 112 : i32 input_width: 112 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 16 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,12544,16,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (12544, 16, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,12544,32,bf16]> tensor<[232,32,1,1,bf16]> tensor<[1,1,12544,232,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 12544 + d2, d3), memory_config: (392, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 32 + d1 + d2, d3), memory_config: (7424, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (12544, 232, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 32 : i32 input_height: 112 : i32 input_width: 112 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 232 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,12544,232,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (12544, 232, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,12544,32,bf16]> tensor<[232,32,1,1,bf16]> tensor<[1,1,3136,232,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 12544 + d2, d3), memory_config: (392, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 32 + d1 + d2, d3), memory_config: (7424, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 232, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 32 : i32 input_height: 112 : i32 input_width: 112 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 232 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,3136,232,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 232, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,12544,32,bf16]> tensor<[32,1,3,3,bf16]> tensor<[1,1,12544,32,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 12544 + d2, d3), memory_config: (392, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (96, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (12544, 32, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 32 : i32 in_channels: 32 : i32 input_height: 112 : i32 input_width: 112 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 32 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,12544,32,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (12544, 32, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,12544,32,bf16]> tensor<[336,32,1,1,bf16]> tensor<[1,1,12544,336,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 12544 + d2, d3), memory_config: (392, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 32 + d1 + d2, d3), memory_config: (10752, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (12544, 336, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 32 : i32 input_height: 112 : i32 input_width: 112 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 336 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,12544,336,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (12544, 336, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,12544,32,bf16]> tensor<[336,32,1,1,bf16]> tensor<[1,1,3136,336,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 12544 + d2, d3), memory_config: (392, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 32 + d1 + d2, d3), memory_config: (10752, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 336, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 32 : i32 input_height: 112 : i32 input_width: 112 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 336 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,3136,336,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 336, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,12544,32,bf16]> tensor<[64,32,1,1,bf16]> tensor<[1,1,12544,64,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 12544 + d2, d3), memory_config: (392, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 32 + d1 + d2, d3), memory_config: (2048, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (12544, 64, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 32 : i32 input_height: 112 : i32 input_width: 112 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 64 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,12544,64,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (12544, 64, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,12544,32,bf16]> tensor<[64,32,3,3,bf16]> tensor<[1,1,12544,64,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 12544 + d2, d3), memory_config: (392, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 96 + d1 * 3 + d2, d3), memory_config: (6144, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (12544, 64, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 32 : i32 input_height: 112 : i32 input_width: 112 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 64 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,12544,64,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (12544, 64, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,12544,32,bf16]> tensor<[64,32,3,3,bf16]> tensor<[1,1,3136,64,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 12544 + d2, d3), memory_config: (392, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 96 + d1 * 3 + d2, d3), memory_config: (6144, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 64, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 32 : i32 input_height: 112 : i32 input_width: 112 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 64 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,3136,64,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 64, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,14400,32,bf16]> tensor<[16,32,1,1,bf16]> tensor<[1,1,14400,16,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 14400 + d1 * 14400 + d2, d3), memory_config: (450, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 32 + d1 + d2, d3), memory_config: (512, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 14400 + d1 * 120 + d2, d3), memory_config: (14400, 16, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 32 : i32 input_height: 120 : i32 input_width: 120 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 16 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,14400,16,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 14400 + d1 * 120 + d2, d3), memory_config: (14400, 16, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,14400,32,bf16]> tensor<[32,1,3,3,bf16]> tensor<[1,1,14400,32,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 14400 + d1 * 14400 + d2, d3), memory_config: (450, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (96, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 14400 + d1 * 120 + d2, d3), memory_config: (14400, 32, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 32 : i32 in_channels: 32 : i32 input_height: 120 : i32 input_width: 120 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 32 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,14400,32,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 14400 + d1 * 120 + d2, d3), memory_config: (14400, 32, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,19200,32,bf16]> tensor<[2,32,3,3,bf16]> tensor<[1,1,19200,2,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 19200 + d1 * 19200 + d2, d3), memory_config: (600, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 96 + d1 * 3 + d2, d3), memory_config: (192, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 19200 + d1 * 160 + d2, d3), memory_config: (19200, 2, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 32 : i32 input_height: 120 : i32 input_width: 160 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 2 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,19200,2,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 19200 + d1 * 160 + d2, d3), memory_config: (19200, 2, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,16384,32,bf16]> tensor<[32,32,1,1,bf16]> tensor<[1,1,16384,32,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 16384 + d2, d3), memory_config: (512, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 32 + d1 + d2, d3), memory_config: (1024, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 128 + d2, d3), memory_config: (16384, 32, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 32 : i32 input_height: 128 : i32 input_width: 128 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 32 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,16384,32,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 128 + d2, d3), memory_config: (16384, 32, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,16384,32,bf16]> tensor<[32,32,3,3,bf16]> tensor<[1,1,16384,32,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 16384 + d2, d3), memory_config: (512, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 96 + d1 * 3 + d2, d3), memory_config: (3072, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 128 + d2, d3), memory_config: (16384, 32, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 32 : i32 input_height: 128 : i32 input_width: 128 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 32 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,16384,32,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 128 + d2, d3), memory_config: (16384, 32, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,16384,32,bf16]> tensor<[32,32,8,8,bf16]> tensor<[1,1,256,32,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 16384 + d2, d3), memory_config: (512, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 8 + d2, d3), memory_config: (8192, 8, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (256, 32, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 32 : i32 input_height: 128 : i32 input_width: 128 : i32 kernel_height: 8 : i32 kernel_width: 8 : i32 out_channels: 32 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 8 : i32 stride_width: 8 : i32 | tensor<[1,1,256,32,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (256, 32, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,16384,32,bf16]> tensor<[64,32,3,3,bf16]> tensor<[1,1,4096,64,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 16384 + d2, d3), memory_config: (512, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 96 + d1 * 3 + d2, d3), memory_config: (6144, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (4096, 64, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 32 : i32 input_height: 128 : i32 input_width: 128 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 64 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,4096,64,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (4096, 64, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,16384,32,bf16]> tensor<[64,32,3,3,bf16]> tensor<[1,1,16384,64,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 16384 + d2, d3), memory_config: (512, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 96 + d1 * 3 + d2, d3), memory_config: (6144, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 128 + d2, d3), memory_config: (16384, 64, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 32 : i32 input_height: 128 : i32 input_width: 128 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 64 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,16384,64,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 128 + d2, d3), memory_config: (16384, 64, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,16900,32,bf16]> tensor<[16,32,1,1,bf16]> tensor<[1,1,16900,16,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16900 + d1 * 16900 + d2, d3), memory_config: (529, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 32 + d1 + d2, d3), memory_config: (512, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16900 + d1 * 130 + d2, d3), memory_config: (16900, 16, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 32 : i32 input_height: 130 : i32 input_width: 130 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 16 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,16900,16,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16900 + d1 * 130 + d2, d3), memory_config: (16900, 16, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,16900,32,bf16]> tensor<[32,1,3,3,bf16]> tensor<[1,1,16900,32,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16900 + d1 * 16900 + d2, d3), memory_config: (529, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (96, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16900 + d1 * 130 + d2, d3), memory_config: (16900, 32, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 32 : i32 in_channels: 32 : i32 input_height: 130 : i32 input_width: 130 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 32 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,16900,32,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16900 + d1 * 130 + d2, d3), memory_config: (16900, 32, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,21609,32,bf16]> tensor<[64,32,3,3,bf16]> tensor<[1,1,21609,64,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 21609 + d1 * 21609 + d2, d3), memory_config: (676, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 96 + d1 * 3 + d2, d3), memory_config: (6144, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 21609 + d1 * 147 + d2, d3), memory_config: (21609, 64, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 32 : i32 input_height: 147 : i32 input_width: 147 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 64 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,21609,64,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 21609 + d1 * 147 + d2, d3), memory_config: (21609, 64, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,22201,32,bf16]> tensor<[32,32,3,3,bf16]> tensor<[1,1,21609,32,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 22201 + d1 * 22201 + d2, d3), memory_config: (694, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 96 + d1 * 3 + d2, d3), memory_config: (3072, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 21609 + d1 * 147 + d2, d3), memory_config: (21609, 32, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 32 : i32 input_height: 149 : i32 input_width: 149 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 32 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,21609,32,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 21609 + d1 * 147 + d2, d3), memory_config: (21609, 32, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,32,bf16]> tensor<[128,32,3,3,bf16]> tensor<[1,1,196,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 96 + d1 * 3 + d2, d3), memory_config: (12288, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 32 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 128 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,32,bf16]> tensor<[64,32,3,3,bf16]> tensor<[1,1,196,64,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 96 + d1 * 3 + d2, d3), memory_config: (6144, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 64, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 32 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 64 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,64,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 64, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,22500,32,bf16]> tensor<[24,32,1,1,bf16]> tensor<[1,1,22500,24,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 22500 + d1 * 22500 + d2, d3), memory_config: (704, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 32 + d1 + d2, d3), memory_config: (768, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 22500 + d1 * 150 + d2, d3), memory_config: (22500, 24, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 32 : i32 input_height: 150 : i32 input_width: 150 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 24 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,22500,24,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 22500 + d1 * 150 + d2, d3), memory_config: (22500, 24, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,22500,32,bf16]> tensor<[32,1,3,3,bf16]> tensor<[1,1,22500,32,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 22500 + d1 * 22500 + d2, d3), memory_config: (704, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (96, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 22500 + d1 * 150 + d2, d3), memory_config: (22500, 32, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 32 : i32 in_channels: 32 : i32 input_height: 150 : i32 input_width: 150 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 32 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,22500,32,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 22500 + d1 * 150 + d2, d3), memory_config: (22500, 32, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,22500,32,bf16]> tensor<[64,32,3,3,bf16]> tensor<[1,1,22500,64,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 22500 + d1 * 22500 + d2, d3), memory_config: (704, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 96 + d1 * 3 + d2, d3), memory_config: (6144, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 22500 + d1 * 150 + d2, d3), memory_config: (22500, 64, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 32 : i32 input_height: 150 : i32 input_width: 150 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 64 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,22500,64,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 22500 + d1 * 150 + d2, d3), memory_config: (22500, 64, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,36100,32,bf16]> tensor<[24,32,1,1,bf16]> tensor<[1,1,36100,24,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 36100 + d1 * 36100 + d2, d3), memory_config: (1129, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 32 + d1 + d2, d3), memory_config: (768, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 36100 + d1 * 190 + d2, d3), memory_config: (36100, 24, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 32 : i32 input_height: 190 : i32 input_width: 190 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 24 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,36100,24,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 36100 + d1 * 190 + d2, d3), memory_config: (36100, 24, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,36100,32,bf16]> tensor<[32,1,3,3,bf16]> tensor<[1,1,36100,32,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 36100 + d1 * 36100 + d2, d3), memory_config: (1129, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (96, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 36100 + d1 * 190 + d2, d3), memory_config: (36100, 32, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 32 : i32 in_channels: 32 : i32 input_height: 190 : i32 input_width: 190 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 32 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,36100,32,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 36100 + d1 * 190 + d2, d3), memory_config: (36100, 32, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1,32,bf16]> tensor<[120,32,1,1,bf16]> tensor<[1,1,1,120,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 32 + d1 + d2, d3), memory_config: (3840, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 120, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 32 : i32 input_height: 1 : i32 input_width: 1 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 120 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,1,120,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 120, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,65536,32,bf16]> tensor<[1,32,1,1,bf16]> tensor<[1,1,65536,1,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 65536 + d1 * 65536 + d2, d3), memory_config: (2048, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 32 + d1 + d2, d3), memory_config: (32, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 65536 + d1 * 256 + d2, d3), memory_config: (65536, 1, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 32 : i32 input_height: 256 : i32 input_width: 256 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 1 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,65536,1,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 65536 + d1 * 256 + d2, d3), memory_config: (65536, 1, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,65536,32,bf16]> tensor<[32,32,3,3,bf16]> tensor<[1,1,65536,32,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 65536 + d1 * 65536 + d2, d3), memory_config: (2048, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 96 + d1 * 3 + d2, d3), memory_config: (3072, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 65536 + d1 * 256 + d2, d3), memory_config: (65536, 32, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 32 : i32 input_height: 256 : i32 input_width: 256 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 32 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,65536,32,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 65536 + d1 * 256 + d2, d3), memory_config: (65536, 32, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,65536,32,bf16]> tensor<[64,32,3,3,bf16]> tensor<[1,1,65536,64,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 65536 + d1 * 65536 + d2, d3), memory_config: (2048, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 96 + d1 * 3 + d2, d3), memory_config: (6144, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 65536 + d1 * 256 + d2, d3), memory_config: (65536, 64, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 32 : i32 input_height: 256 : i32 input_width: 256 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 64 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,65536,64,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 65536 + d1 * 256 + d2, d3), memory_config: (65536, 64, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,65536,32,bf16]> tensor<[64,32,3,3,bf16]> tensor<[1,1,16384,64,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 65536 + d1 * 65536 + d2, d3), memory_config: (2048, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 96 + d1 * 3 + d2, d3), memory_config: (6144, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 128 + d2, d3), memory_config: (16384, 64, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 32 : i32 input_height: 256 : i32 input_width: 256 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 64 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,16384,64,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 128 + d2, d3), memory_config: (16384, 64, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,676,32,bf16]> tensor<[64,32,3,3,bf16]> tensor<[1,1,576,64,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 676 + d1 * 676 + d2, d3), memory_config: (22, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 96 + d1 * 3 + d2, d3), memory_config: (6144, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 576 + d1 * 24 + d2, d3), memory_config: (576, 64, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 32 : i32 input_height: 26 : i32 input_width: 26 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 64 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,576,64,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 576 + d1 * 24 + d2, d3), memory_config: (576, 64, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,32,bf16]> tensor<[192,32,1,1,bf16]> tensor<[1,1,784,192,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 32 + d1 + d2, d3), memory_config: (6144, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 192, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 32 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 192 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,192,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 192, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,32,bf16]> tensor<[96,32,3,3,bf16]> tensor<[1,1,784,96,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 96 + d1 * 3 + d2, d3), memory_config: (9216, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 96, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 32 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 96 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,96,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 96, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1200,32,bf16]> tensor<[2,32,3,3,bf16]> tensor<[1,1,1200,2,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1200 + d1 * 1200 + d2, d3), memory_config: (38, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 96 + d1 * 3 + d2, d3), memory_config: (192, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1200 + d1 * 40 + d2, d3), memory_config: (1200, 2, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 32 : i32 input_height: 30 : i32 input_width: 40 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 2 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,1200,2,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1200 + d1 * 40 + d2, d3), memory_config: (1200, 2, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,262144,32,bf16]> tensor<[64,32,3,3,bf16]> tensor<[1,1,65536,64,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 262144 + d1 * 262144 + d2, d3), memory_config: (8192, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 96 + d1 * 3 + d2, d3), memory_config: (6144, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 65536 + d1 * 256 + d2, d3), memory_config: (65536, 64, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 32 : i32 input_height: 512 : i32 input_width: 512 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 64 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,65536,64,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 65536 + d1 * 256 + d2, d3), memory_config: (65536, 64, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,3136,32,bf16]> tensor<[128,32,1,1,bf16]> tensor<[1,1,3136,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 3136 + d2, d3), memory_config: (98, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 32 + d1 + d2, d3), memory_config: (4096, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 32 : i32 input_height: 56 : i32 input_width: 56 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,3136,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,3136,32,bf16]> tensor<[32,32,3,3,bf16]> tensor<[1,1,3136,32,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 3136 + d2, d3), memory_config: (98, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 96 + d1 * 3 + d2, d3), memory_config: (3072, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 32, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 32 : i32 input_height: 56 : i32 input_width: 56 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 32 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,3136,32,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 32, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,3136,32,bf16]> tensor<[64,32,1,1,bf16]> tensor<[1,1,3136,64,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 3136 + d2, d3), memory_config: (98, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 32 + d1 + d2, d3), memory_config: (2048, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 64, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 32 : i32 input_height: 56 : i32 input_width: 56 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 64 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,3136,64,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 64, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,4800,32,bf16]> tensor<[2,32,3,3,bf16]> tensor<[1,1,4800,2,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4800 + d1 * 4800 + d2, d3), memory_config: (150, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 96 + d1 * 3 + d2, d3), memory_config: (192, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4800 + d1 * 80 + d2, d3), memory_config: (4800, 2, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 32 : i32 input_height: 60 : i32 input_width: 80 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 2 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,4800,2,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4800 + d1 * 80 + d2, d3), memory_config: (4800, 2, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,5625,32,bf16]> tensor<[192,32,1,1,bf16]> tensor<[1,1,5625,192,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5625 + d1 * 5625 + d2, d3), memory_config: (176, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 32 + d1 + d2, d3), memory_config: (6144, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5625 + d1 * 75 + d2, d3), memory_config: (5625, 192, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 32 : i32 input_height: 75 : i32 input_width: 75 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 192 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,5625,192,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5625 + d1 * 75 + d2, d3), memory_config: (5625, 192, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,32,bf16]> tensor<[128,32,3,3,bf16]> tensor<[1,1,49,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 96 + d1 * 3 + d2, d3), memory_config: (12288, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 32 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 128 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,9025,32,bf16]> tensor<[192,32,1,1,bf16]> tensor<[1,1,9025,192,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 9025 + d1 * 9025 + d2, d3), memory_config: (283, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 32 + d1 + d2, d3), memory_config: (6144, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 9025 + d1 * 95 + d2, d3), memory_config: (9025, 192, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 32 : i32 input_height: 95 : i32 input_width: 95 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 192 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,9025,192,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 9025 + d1 * 95 + d2, d3), memory_config: (9025, 192, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,12544,336,bf16]> tensor<[336,168,3,3,bf16]> tensor<[1,1,3136,336,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 12544 + d2, d3), memory_config: (392, 11, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 504 + d1 * 3 + d2, d3), memory_config: (169344, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 336, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 2 : i32 in_channels: 336 : i32 input_height: 112 : i32 input_width: 112 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 336 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,3136,336,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 336, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,336,bf16]> tensor<[336,1,3,3,bf16]> tensor<[1,1,196,336,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 11, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (1008, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 336, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 336 : i32 in_channels: 336 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 336 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,336,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 336, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,576,336,bf16]> tensor<[112,336,1,1,bf16]> tensor<[1,1,576,112,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 576 + d1 * 576 + d2, d3), memory_config: (18, 11, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 336 + d1 + d2, d3), memory_config: (37632, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 576 + d1 * 24 + d2, d3), memory_config: (576, 112, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 336 : i32 input_height: 24 : i32 input_width: 24 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 112 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,576,112,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 576 + d1 * 24 + d2, d3), memory_config: (576, 112, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,2304,336,bf16]> tensor<[336,1,5,5,bf16]> tensor<[1,1,2304,336,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 2304 + d1 * 2304 + d2, d3), memory_config: (72, 11, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5 + d1 * 5 + d2, d3), memory_config: (1680, 5, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 2304 + d1 * 48 + d2, d3), memory_config: (2304, 336, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 336 : i32 in_channels: 336 : i32 input_height: 48 : i32 input_width: 48 : i32 kernel_height: 5 : i32 kernel_width: 5 : i32 out_channels: 336 : i32 padding_height: 2 : i32 padding_width: 2 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,2304,336,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 2304 + d1 * 48 + d2, d3), memory_config: (2304, 336, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,2304,336,bf16]> tensor<[56,336,1,1,bf16]> tensor<[1,1,2304,56,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 2304 + d1 * 2304 + d2, d3), memory_config: (72, 11, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 336 + d1 + d2, d3), memory_config: (18816, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 2304 + d1 * 48 + d2, d3), memory_config: (2304, 56, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 336 : i32 input_height: 48 : i32 input_width: 48 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 56 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,2304,56,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 2304 + d1 * 48 + d2, d3), memory_config: (2304, 56, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,2401,336,bf16]> tensor<[336,1,3,3,bf16]> tensor<[1,1,576,336,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 2401 + d1 * 2401 + d2, d3), memory_config: (76, 11, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (1008, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 576 + d1 * 24 + d2, d3), memory_config: (576, 336, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 336 : i32 in_channels: 336 : i32 input_height: 49 : i32 input_width: 49 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 336 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,576,336,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 576 + d1 * 24 + d2, d3), memory_config: (576, 336, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,3136,336,bf16]> tensor<[336,168,3,3,bf16]> tensor<[1,1,3136,336,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 3136 + d2, d3), memory_config: (98, 11, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 504 + d1 * 3 + d2, d3), memory_config: (169344, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 336, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 2 : i32 in_channels: 336 : i32 input_height: 56 : i32 input_width: 56 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 336 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,3136,336,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 336, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,3136,336,bf16]> tensor<[336,336,1,1,bf16]> tensor<[1,1,3136,336,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 3136 + d2, d3), memory_config: (98, 11, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 336 + d1 + d2, d3), memory_config: (112896, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 336, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 336 : i32 input_height: 56 : i32 input_width: 56 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 336 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,3136,336,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 336, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,3136,336,bf16]> tensor<[672,336,1,1,bf16]> tensor<[1,1,3136,672,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 3136 + d2, d3), memory_config: (98, 11, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 336 + d1 + d2, d3), memory_config: (225792, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 672, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 336 : i32 input_height: 56 : i32 input_width: 56 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 672 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,3136,672,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 672, 'bf16', 'dram') | nan | nan |
| Name | Input Shapes | Input Layouts | Attributes | Output Shapes | Output Layouts | PCC | ATOL |
|---|---|---|---|---|---|---|---|
| ttnn.conv2d | tensor<[1,1,3136,336,bf16]> tensor<[672,336,1,1,bf16]> tensor<[1,1,784,672,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 3136 + d2, d3), memory_config: (98, 11, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 336 + d1 + d2, d3), memory_config: (225792, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 672, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 336 : i32 input_height: 56 : i32 input_width: 56 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 672 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,784,672,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 672, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1,348,bf16]> tensor<[1392,348,1,1,bf16]> tensor<[1,1,1,1392,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 11, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 348 + d1 + d2, d3), memory_config: (484416, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 1392, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 348 : i32 input_height: 1 : i32 input_width: 1 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 1392 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,1,1392,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 1392, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1,348,bf16]> tensor<[3712,348,1,1,bf16]> tensor<[1,1,1,3712,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 11, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 348 + d1 + d2, d3), memory_config: (1291776, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 3712, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 348 : i32 input_height: 1 : i32 input_width: 1 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 3712 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,1,3712,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 3712, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,34,bf16]> tensor<[20,34,3,3,bf16]> tensor<[1,1,784,20,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 2, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 102 + d1 * 3 + d2, d3), memory_config: (2040, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 20, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 34 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 20 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,20,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 20, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,352,bf16]> tensor<[128,352,1,1,bf16]> tensor<[1,1,196,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 11, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 352 + d1 + d2, d3), memory_config: (45056, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 352 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,352,bf16]> tensor<[128,352,1,1,bf16]> tensor<[1,1,784,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 11, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 352 + d1 + d2, d3), memory_config: (45056, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 352 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,81,352,bf16]> tensor<[1280,352,1,1,bf16]> tensor<[1,1,81,1280,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 81 + d1 * 81 + d2, d3), memory_config: (3, 11, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 352 + d1 + d2, d3), memory_config: (450560, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 81 + d1 * 9 + d2, d3), memory_config: (81, 1280, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 352 : i32 input_height: 9 : i32 input_width: 9 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 1280 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,81,1280,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 81 + d1 * 9 + d2, d3), memory_config: (81, 1280, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,360,bf16]> tensor<[68,360,3,3,bf16]> tensor<[1,1,196,68,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 12, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1080 + d1 * 3 + d2, d3), memory_config: (73440, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 68, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 360 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 68 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,68,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 68, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,368,bf16]> tensor<[98,368,3,3,bf16]> tensor<[1,1,784,98,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 12, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1104 + d1 * 3 + d2, d3), memory_config: (108192, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 98, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 368 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 98 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,98,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 98, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,36,bf16]> tensor<[144,36,3,3,bf16]> tensor<[1,1,49,144,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 2, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 108 + d1 * 3 + d2, d3), memory_config: (15552, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 144, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 36 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 144 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,49,144,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 144, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,36,bf16]> tensor<[18,36,1,1,bf16]> tensor<[1,1,784,18,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 2, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 36 + d1 + d2, d3), memory_config: (648, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 18, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 36 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 18 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,18,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 18, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,36,bf16]> tensor<[256,36,1,1,bf16]> tensor<[1,1,784,256,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 2, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 36 + d1 + d2, d3), memory_config: (9216, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 256, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 36 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 256 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,256,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 256, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,36,bf16]> tensor<[36,36,3,3,bf16]> tensor<[1,1,784,36,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 2, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 108 + d1 * 3 + d2, d3), memory_config: (3888, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 36, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 36 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 36 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,36,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 36, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,36,bf16]> tensor<[36,36,3,3,bf16]> tensor<[1,1,196,36,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 2, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 108 + d1 * 3 + d2, d3), memory_config: (3888, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 36, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 36 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 36 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,196,36,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 36, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,36,bf16]> tensor<[64,36,1,1,bf16]> tensor<[1,1,784,64,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 2, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 36 + d1 + d2, d3), memory_config: (2304, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 64, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 36 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 64 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,64,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 64, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,36,bf16]> tensor<[72,36,3,3,bf16]> tensor<[1,1,196,72,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 2, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 108 + d1 * 3 + d2, d3), memory_config: (7776, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 72, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 36 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 72 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,196,72,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 72, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,3136,36,bf16]> tensor<[36,1,3,3,bf16]> tensor<[1,1,3136,36,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 3136 + d2, d3), memory_config: (98, 2, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (108, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 36, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 36 : i32 in_channels: 36 : i32 input_height: 56 : i32 input_width: 56 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 36 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,3136,36,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 36, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,3712,bf16]> tensor<[3712,232,3,3,bf16]> tensor<[1,1,49,3712,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 116, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 696 + d1 * 3 + d2, d3), memory_config: (2583552, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 3712, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 16 : i32 in_channels: 3712 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 3712 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,49,3712,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 3712, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1,3712,bf16]> tensor<[348,3712,1,1,bf16]> tensor<[1,1,1,348,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 116, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3712 + d1 + d2, d3), memory_config: (1291776, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 348, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 3712 : i32 input_height: 1 : i32 input_width: 1 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 348 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,1,348,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 348, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,3712,bf16]> tensor<[3712,3712,1,1,bf16]> tensor<[1,1,49,3712,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 116, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3712 + d1 + d2, d3), memory_config: (13778944, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 3712, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 3712 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 3712 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,3712,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 3712, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,100,384,bf16]> tensor<[1280,384,1,1,bf16]> tensor<[1,1,100,1280,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 100 + d2, d3), memory_config: (4, 12, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 384 + d1 + d2, d3), memory_config: (491520, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (100, 1280, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 384 : i32 input_height: 10 : i32 input_width: 10 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 1280 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,100,1280,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (100, 1280, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,384,bf16]> tensor<[128,384,1,1,bf16]> tensor<[1,1,196,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 12, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 384 + d1 + d2, d3), memory_config: (49152, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 384 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,384,bf16]> tensor<[384,1,3,3,bf16]> tensor<[1,1,196,384,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 12, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (1152, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 384, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 384 : i32 in_channels: 384 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 384 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,384,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 384, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,384,bf16]> tensor<[64,384,1,1,bf16]> tensor<[1,1,196,64,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 12, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 384 + d1 + d2, d3), memory_config: (24576, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 64, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 384 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 64 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,64,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 64, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,384,bf16]> tensor<[96,384,1,1,bf16]> tensor<[1,1,196,96,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 12, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 384 + d1 + d2, d3), memory_config: (36864, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 96, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 384 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 96 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,96,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 96, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,384,bf16]> tensor<[128,384,1,1,bf16]> tensor<[1,1,784,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 12, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 384 + d1 + d2, d3), memory_config: (49152, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 384 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1225,384,bf16]> tensor<[192,384,1,1,bf16]> tensor<[1,1,1225,192,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1225 + d1 * 1225 + d2, d3), memory_config: (39, 12, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 384 + d1 + d2, d3), memory_config: (73728, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1225 + d1 * 35 + d2, d3), memory_config: (1225, 192, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 384 : i32 input_height: 35 : i32 input_width: 35 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 192 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,1225,192,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1225 + d1 * 35 + d2, d3), memory_config: (1225, 192, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1225,384,bf16]> tensor<[384,384,3,3,bf16]> tensor<[1,1,289,384,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1225 + d1 * 1225 + d2, d3), memory_config: (39, 12, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1152 + d1 * 3 + d2, d3), memory_config: (442368, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 17 + d2, d3), memory_config: (289, 384, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 384 : i32 input_height: 35 : i32 input_width: 35 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 384 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,289,384,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 17 + d2, d3), memory_config: (289, 384, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1225,384,bf16]> tensor<[64,384,1,1,bf16]> tensor<[1,1,1225,64,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1225 + d1 * 1225 + d2, d3), memory_config: (39, 12, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 384 + d1 + d2, d3), memory_config: (24576, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1225 + d1 * 35 + d2, d3), memory_config: (1225, 64, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 384 : i32 input_height: 35 : i32 input_width: 35 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 64 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,1225,64,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1225 + d1 * 35 + d2, d3), memory_config: (1225, 64, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1225,384,bf16]> tensor<[96,384,1,1,bf16]> tensor<[1,1,1225,96,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1225 + d1 * 1225 + d2, d3), memory_config: (39, 12, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 384 + d1 + d2, d3), memory_config: (36864, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1225 + d1 * 35 + d2, d3), memory_config: (1225, 96, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 384 : i32 input_height: 35 : i32 input_width: 35 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 96 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,1225,96,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1225 + d1 * 35 + d2, d3), memory_config: (1225, 96, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,4096,384,bf16]> tensor<[128,384,1,1,bf16]> tensor<[1,1,4096,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 4096 + d2, d3), memory_config: (128, 12, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 384 + d1 + d2, d3), memory_config: (49152, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (4096, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 384 : i32 input_height: 64 : i32 input_width: 64 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,4096,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (4096, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,64,384,bf16]> tensor<[256,384,1,3,bf16]> tensor<[1,1,64,256,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 64 + d2, d3), memory_config: (2, 12, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 384 + d1 + d2, d3), memory_config: (98304, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 8 + d2, d3), memory_config: (64, 256, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 384 : i32 input_height: 8 : i32 input_width: 8 : i32 kernel_height: 1 : i32 kernel_width: 3 : i32 out_channels: 256 : i32 padding_height: 0 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,64,256,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 8 + d2, d3), memory_config: (64, 256, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,64,384,bf16]> tensor<[256,384,3,1,bf16]> tensor<[1,1,64,256,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 64 + d2, d3), memory_config: (2, 12, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1152 + d1 * 3 + d2, d3), memory_config: (294912, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 8 + d2, d3), memory_config: (64, 256, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 384 : i32 input_height: 8 : i32 input_width: 8 : i32 kernel_height: 3 : i32 kernel_width: 1 : i32 out_channels: 256 : i32 padding_height: 1 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,64,256,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 8 + d2, d3), memory_config: (64, 256, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,64,384,bf16]> tensor<[448,384,3,1,bf16]> tensor<[1,1,64,448,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 64 + d2, d3), memory_config: (2, 12, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1152 + d1 * 3 + d2, d3), memory_config: (516096, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 8 + d2, d3), memory_config: (64, 448, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 384 : i32 input_height: 8 : i32 input_width: 8 : i32 kernel_height: 3 : i32 kernel_width: 1 : i32 out_channels: 448 : i32 padding_height: 1 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,64,448,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 8 + d2, d3), memory_config: (64, 448, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1048576,3,f32]> tensor<[192,3,4,4,f32]> tensor<[1,1,65536,192,f32]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1048576 + d1 * 1048576 + d2, d3), memory_config: (32768, 1, 'tile<32x32, f32>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12 + d1 * 4 + d2, d3), memory_config: (2304, 4, 'f32', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 65536 + d1 * 256 + d2, d3), memory_config: (65536, 192, 'f32', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 3 : i32 input_height: 1024 : i32 input_width: 1024 : i32 kernel_height: 4 : i32 kernel_width: 4 : i32 out_channels: 192 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 4 : i32 stride_width: 4 : i32 | tensor<[1,1,65536,192,f32]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 65536 + d1 * 256 + d2, d3), memory_config: (65536, 192, 'f32', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,50176,3,bf16]> tensor<[1024,3,16,16,bf16]> tensor<[1,1,196,1024,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 50176 + d1 * 50176 + d2, d3), memory_config: (1568, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 48 + d1 * 16 + d2, d3), memory_config: (49152, 16, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 1024, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 3 : i32 input_height: 224 : i32 input_width: 224 : i32 kernel_height: 16 : i32 kernel_width: 16 : i32 out_channels: 1024 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 16 : i32 stride_width: 16 : i32 | tensor<[1,1,196,1024,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 1024, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,50176,3,bf16]> tensor<[128,3,4,4,bf16]> tensor<[1,1,3136,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 50176 + d1 * 50176 + d2, d3), memory_config: (1568, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12 + d1 * 4 + d2, d3), memory_config: (1536, 4, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 3 : i32 input_height: 224 : i32 input_width: 224 : i32 kernel_height: 4 : i32 kernel_width: 4 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 4 : i32 stride_width: 4 : i32 | tensor<[1,1,3136,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,50176,3,bf16]> tensor<[16,3,3,3,bf16]> tensor<[1,1,12544,16,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 50176 + d1 * 50176 + d2, d3), memory_config: (1568, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 9 + d1 * 3 + d2, d3), memory_config: (144, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (12544, 16, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 3 : i32 input_height: 224 : i32 input_width: 224 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 16 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,12544,16,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (12544, 16, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,50176,3,bf16]> tensor<[16,3,7,7,bf16]> tensor<[1,1,50176,16,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 50176 + d1 * 50176 + d2, d3), memory_config: (1568, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 21 + d1 * 7 + d2, d3), memory_config: (336, 7, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 50176 + d1 * 224 + d2, d3), memory_config: (50176, 16, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 3 : i32 input_height: 224 : i32 input_width: 224 : i32 kernel_height: 7 : i32 kernel_width: 7 : i32 out_channels: 16 : i32 padding_height: 3 : i32 padding_width: 3 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,50176,16,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 50176 + d1 * 224 + d2, d3), memory_config: (50176, 16, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,50176,3,bf16]> tensor<[32,3,3,3,bf16]> tensor<[1,1,12544,32,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 50176 + d1 * 50176 + d2, d3), memory_config: (1568, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 9 + d1 * 3 + d2, d3), memory_config: (288, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (12544, 32, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 3 : i32 input_height: 224 : i32 input_width: 224 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 32 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,12544,32,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (12544, 32, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,50176,3,bf16]> tensor<[64,3,3,3,bf16]> tensor<[1,1,50176,64,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 50176 + d1 * 50176 + d2, d3), memory_config: (1568, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 9 + d1 * 3 + d2, d3), memory_config: (576, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 50176 + d1 * 224 + d2, d3), memory_config: (50176, 64, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 3 : i32 input_height: 224 : i32 input_width: 224 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 64 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,50176,64,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 50176 + d1 * 224 + d2, d3), memory_config: (50176, 64, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,50176,3,bf16]> tensor<[64,3,3,3,bf16]> tensor<[1,1,50176,64,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 50176 + d1 * 50176 + d2, d3), memory_config: (1568, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 9 + d1 * 3 + d2, d3), memory_config: (576, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 50176 + d1 * 224 + d2, d3), memory_config: (50176, 64, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 3 : i32 input_height: 224 : i32 input_width: 224 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 64 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,50176,64,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 50176 + d1 * 224 + d2, d3), memory_config: (50176, 64, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,50176,3,bf16]> tensor<[64,3,3,3,bf16]> tensor<[1,1,12544,64,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 50176 + d1 * 50176 + d2, d3), memory_config: (1568, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 9 + d1 * 3 + d2, d3), memory_config: (576, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (12544, 64, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 3 : i32 input_height: 224 : i32 input_width: 224 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 64 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,12544,64,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (12544, 64, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,50176,3,bf16]> tensor<[64,3,7,7,bf16]> tensor<[1,1,12544,64,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 50176 + d1 * 50176 + d2, d3), memory_config: (1568, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 21 + d1 * 7 + d2, d3), memory_config: (1344, 7, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (12544, 64, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 3 : i32 input_height: 224 : i32 input_width: 224 : i32 kernel_height: 7 : i32 kernel_width: 7 : i32 out_channels: 64 : i32 padding_height: 3 : i32 padding_width: 3 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,12544,64,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (12544, 64, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,50176,3,bf16]> tensor<[768,3,16,16,bf16]> tensor<[1,1,196,768,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 50176 + d1 * 50176 + d2, d3), memory_config: (1568, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 48 + d1 * 16 + d2, d3), memory_config: (36864, 16, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 768, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 3 : i32 input_height: 224 : i32 input_width: 224 : i32 kernel_height: 16 : i32 kernel_width: 16 : i32 out_channels: 768 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 16 : i32 stride_width: 16 : i32 | tensor<[1,1,196,768,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 768, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,50176,3,bf16]> tensor<[768,3,32,32,bf16]> tensor<[1,1,49,768,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 50176 + d1 * 50176 + d2, d3), memory_config: (1568, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 96 + d1 * 32 + d2, d3), memory_config: (73728, 32, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 768, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 3 : i32 input_height: 224 : i32 input_width: 224 : i32 kernel_height: 32 : i32 kernel_width: 32 : i32 out_channels: 768 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 32 : i32 stride_width: 32 : i32 | tensor<[1,1,49,768,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 768, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,50625,3,bf16]> tensor<[32,3,3,3,bf16]> tensor<[1,1,12544,32,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 50625 + d1 * 50625 + d2, d3), memory_config: (1583, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 9 + d1 * 3 + d2, d3), memory_config: (288, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (12544, 32, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 3 : i32 input_height: 225 : i32 input_width: 225 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 32 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,12544,32,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (12544, 32, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,58081,3,bf16]> tensor<[32,3,3,3,bf16]> tensor<[1,1,14400,32,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 58081 + d1 * 58081 + d2, d3), memory_config: (1816, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 9 + d1 * 3 + d2, d3), memory_config: (288, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 14400 + d1 * 120 + d2, d3), memory_config: (14400, 32, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 3 : i32 input_height: 241 : i32 input_width: 241 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 32 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,14400,32,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 14400 + d1 * 120 + d2, d3), memory_config: (14400, 32, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,65536,3,bf16]> tensor<[32,3,3,3,bf16]> tensor<[1,1,65536,32,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 65536 + d1 * 65536 + d2, d3), memory_config: (2048, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 9 + d1 * 3 + d2, d3), memory_config: (288, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 65536 + d1 * 256 + d2, d3), memory_config: (65536, 32, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 3 : i32 input_height: 256 : i32 input_width: 256 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 32 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,65536,32,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 65536 + d1 * 256 + d2, d3), memory_config: (65536, 32, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,68121,3,bf16]> tensor<[32,3,3,3,bf16]> tensor<[1,1,16900,32,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 68121 + d1 * 68121 + d2, d3), memory_config: (2129, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 9 + d1 * 3 + d2, d3), memory_config: (288, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16900 + d1 * 130 + d2, d3), memory_config: (16900, 32, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 3 : i32 input_height: 261 : i32 input_width: 261 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 32 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,16900,32,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16900 + d1 * 130 + d2, d3), memory_config: (16900, 32, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,89401,3,bf16]> tensor<[32,3,3,3,bf16]> tensor<[1,1,22201,32,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 89401 + d1 * 89401 + d2, d3), memory_config: (2794, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 9 + d1 * 3 + d2, d3), memory_config: (288, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 22201 + d1 * 149 + d2, d3), memory_config: (22201, 32, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 3 : i32 input_height: 299 : i32 input_width: 299 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 32 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,22201,32,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 22201 + d1 * 149 + d2, d3), memory_config: (22201, 32, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,89401,3,bf16]> tensor<[32,3,3,3,bf16]> tensor<[1,1,22500,32,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 89401 + d1 * 89401 + d2, d3), memory_config: (2794, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 9 + d1 * 3 + d2, d3), memory_config: (288, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 22500 + d1 * 150 + d2, d3), memory_config: (22500, 32, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 3 : i32 input_height: 299 : i32 input_width: 299 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 32 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,22500,32,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 22500 + d1 * 150 + d2, d3), memory_config: (22500, 32, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,90601,3,bf16]> tensor<[32,3,3,3,bf16]> tensor<[1,1,22500,32,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 90601 + d1 * 90601 + d2, d3), memory_config: (2832, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 9 + d1 * 3 + d2, d3), memory_config: (288, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 22500 + d1 * 150 + d2, d3), memory_config: (22500, 32, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 3 : i32 input_height: 301 : i32 input_width: 301 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 32 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,22500,32,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 22500 + d1 * 150 + d2, d3), memory_config: (22500, 32, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,102400,3,f32]> tensor<[16,3,3,3,f32]> tensor<[1,1,25600,16,f32]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 102400 + d1 * 102400 + d2, d3), memory_config: (3200, 1, 'tile<32x32, f32>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 9 + d1 * 3 + d2, d3), memory_config: (144, 3, 'f32', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 25600 + d1 * 160 + d2, d3), memory_config: (25600, 16, 'f32', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 3 : i32 input_height: 320 : i32 input_width: 320 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 16 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,25600,16,f32]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 25600 + d1 * 160 + d2, d3), memory_config: (25600, 16, 'f32', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,4096,3,bf16]> tensor<[768,3,4,4,bf16]> tensor<[1,1,256,768,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 4096 + d2, d3), memory_config: (128, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12 + d1 * 4 + d2, d3), memory_config: (9216, 4, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 32 + d2, d3), memory_config: (256, 768, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 3 : i32 input_height: 32 : i32 input_width: 128 : i32 kernel_height: 4 : i32 kernel_width: 4 : i32 out_channels: 768 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 4 : i32 stride_width: 4 : i32 | tensor<[1,1,256,768,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 32 + d2, d3), memory_config: (256, 768, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,145161,3,bf16]> tensor<[32,3,3,3,bf16]> tensor<[1,1,36100,32,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 145161 + d1 * 145161 + d2, d3), memory_config: (4537, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 9 + d1 * 3 + d2, d3), memory_config: (288, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 36100 + d1 * 190 + d2, d3), memory_config: (36100, 32, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 3 : i32 input_height: 381 : i32 input_width: 381 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 32 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,36100,32,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 36100 + d1 * 190 + d2, d3), memory_config: (36100, 32, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196608,3,bf16]> tensor<[768,3,32,32,bf16]> tensor<[1,1,192,768,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196608 + d1 * 196608 + d2, d3), memory_config: (6144, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 96 + d1 * 32 + d2, d3), memory_config: (73728, 32, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 192 + d1 * 16 + d2, d3), memory_config: (192, 768, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 3 : i32 input_height: 384 : i32 input_width: 512 : i32 kernel_height: 32 : i32 kernel_width: 32 : i32 out_channels: 768 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 32 : i32 stride_width: 32 : i32 | tensor<[1,1,192,768,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 192 + d1 * 16 + d2, d3), memory_config: (192, 768, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,307200,3,bf16]> tensor<[64,3,7,7,bf16]> tensor<[1,1,19200,64,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 307200 + d1 * 307200 + d2, d3), memory_config: (9600, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 21 + d1 * 7 + d2, d3), memory_config: (1344, 7, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 19200 + d1 * 160 + d2, d3), memory_config: (19200, 64, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 3 : i32 input_height: 480 : i32 input_width: 640 : i32 kernel_height: 7 : i32 kernel_width: 7 : i32 out_channels: 64 : i32 padding_height: 3 : i32 padding_width: 3 : i32 stride_height: 4 : i32 stride_width: 4 : i32 | tensor<[1,1,19200,64,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 19200 + d1 * 160 + d2, d3), memory_config: (19200, 64, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,262144,3,f32]> tensor<[192,3,4,4,f32]> tensor<[1,1,16384,192,f32]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 262144 + d1 * 262144 + d2, d3), memory_config: (8192, 1, 'tile<32x32, f32>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12 + d1 * 4 + d2, d3), memory_config: (2304, 4, 'f32', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 128 + d2, d3), memory_config: (16384, 192, 'f32', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 3 : i32 input_height: 512 : i32 input_width: 512 : i32 kernel_height: 4 : i32 kernel_width: 4 : i32 out_channels: 192 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 4 : i32 stride_width: 4 : i32 | tensor<[1,1,16384,192,f32]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 128 + d2, d3), memory_config: (16384, 192, 'f32', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,262144,3,bf16]> tensor<[32,3,3,3,bf16]> tensor<[1,1,262144,32,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 262144 + d1 * 262144 + d2, d3), memory_config: (8192, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 9 + d1 * 3 + d2, d3), memory_config: (288, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 262144 + d1 * 512 + d2, d3), memory_config: (262144, 32, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 3 : i32 input_height: 512 : i32 input_width: 512 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 32 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,262144,32,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 262144 + d1 * 512 + d2, d3), memory_config: (262144, 32, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,262144,3,bf16]> tensor<[32,3,6,6,bf16]> tensor<[1,1,65536,32,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 262144 + d1 * 262144 + d2, d3), memory_config: (8192, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 18 + d1 * 6 + d2, d3), memory_config: (576, 6, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 65536 + d1 * 256 + d2, d3), memory_config: (65536, 32, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 3 : i32 input_height: 512 : i32 input_width: 512 : i32 kernel_height: 6 : i32 kernel_width: 6 : i32 out_channels: 32 : i32 padding_height: 2 : i32 padding_width: 2 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,65536,32,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 65536 + d1 * 256 + d2, d3), memory_config: (65536, 32, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,262144,3,bf16]> tensor<[32,3,7,7,bf16]> tensor<[1,1,16384,32,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 262144 + d1 * 262144 + d2, d3), memory_config: (8192, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 21 + d1 * 7 + d2, d3), memory_config: (672, 7, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 128 + d2, d3), memory_config: (16384, 32, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 3 : i32 input_height: 512 : i32 input_width: 512 : i32 kernel_height: 7 : i32 kernel_width: 7 : i32 out_channels: 32 : i32 padding_height: 3 : i32 padding_width: 3 : i32 stride_height: 4 : i32 stride_width: 4 : i32 | tensor<[1,1,16384,32,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 128 + d2, d3), memory_config: (16384, 32, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,344064,3,bf16]> tensor<[192,3,16,16,bf16]> tensor<[1,1,1344,192,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 344064 + d1 * 344064 + d2, d3), memory_config: (10752, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 48 + d1 * 16 + d2, d3), memory_config: (9216, 16, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1344 + d1 * 42 + d2, d3), memory_config: (1344, 192, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 3 : i32 input_height: 512 : i32 input_width: 672 : i32 kernel_height: 16 : i32 kernel_width: 16 : i32 out_channels: 192 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 16 : i32 stride_width: 16 : i32 | tensor<[1,1,1344,192,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1344 + d1 * 42 + d2, d3), memory_config: (1344, 192, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,268324,3,bf16]> tensor<[1280,3,14,14,bf16]> tensor<[1,1,1369,1280,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 268324 + d1 * 268324 + d2, d3), memory_config: (8386, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 42 + d1 * 14 + d2, d3), memory_config: (53760, 14, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1369 + d1 * 37 + d2, d3), memory_config: (1369, 1280, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 3 : i32 input_height: 518 : i32 input_width: 518 : i32 kernel_height: 14 : i32 kernel_width: 14 : i32 out_channels: 1280 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 14 : i32 stride_width: 14 : i32 | tensor<[1,1,1369,1280,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1369 + d1 * 37 + d2, d3), memory_config: (1369, 1280, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,921600,3,bf16]> tensor<[64,3,7,7,bf16]> tensor<[1,1,230400,64,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 921600 + d1 * 921600 + d2, d3), memory_config: (28800, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 21 + d1 * 7 + d2, d3), memory_config: (1344, 7, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 230400 + d1 * 640 + d2, d3), memory_config: (230400, 64, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 3 : i32 input_height: 720 : i32 input_width: 1280 : i32 kernel_height: 7 : i32 kernel_width: 7 : i32 out_channels: 64 : i32 padding_height: 3 : i32 padding_width: 3 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,230400,64,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 230400 + d1 * 640 + d2, d3), memory_config: (230400, 64, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,40,bf16]> tensor<[120,40,1,1,bf16]> tensor<[1,1,196,120,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 2, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 40 + d1 + d2, d3), memory_config: (4800, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 120, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 40 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 120 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,120,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 120, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,40,bf16]> tensor<[240,40,1,1,bf16]> tensor<[1,1,196,240,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 2, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 40 + d1 + d2, d3), memory_config: (9600, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 240, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 40 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 240 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,240,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 240, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,40,bf16]> tensor<[40,1,3,3,bf16]> tensor<[1,1,196,40,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 2, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (120, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 40, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 40 : i32 in_channels: 40 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 40 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,40,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 40, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,40,bf16]> tensor<[80,40,1,1,bf16]> tensor<[1,1,196,80,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 2, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 40 + d1 + d2, d3), memory_config: (3200, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 80, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 40 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 80 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,80,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 80, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,40,bf16]> tensor<[120,40,1,1,bf16]> tensor<[1,1,784,120,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 2, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 40 + d1 + d2, d3), memory_config: (4800, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 120, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 40 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 120 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,120,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 120, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,40,bf16]> tensor<[240,40,1,1,bf16]> tensor<[1,1,784,240,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 2, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 40 + d1 + d2, d3), memory_config: (9600, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 240, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 40 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 240 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,240,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 240, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,40,bf16]> tensor<[40,1,3,3,bf16]> tensor<[1,1,196,40,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 2, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (120, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 40, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 40 : i32 in_channels: 40 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 40 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,196,40,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 40, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,40,bf16]> tensor<[60,40,1,1,bf16]> tensor<[1,1,784,60,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 2, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 40 + d1 + d2, d3), memory_config: (2400, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 60, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 40 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 60 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,60,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 60, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,900,40,bf16]> tensor<[240,40,1,1,bf16]> tensor<[1,1,900,240,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 900 + d1 * 900 + d2, d3), memory_config: (29, 2, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 40 + d1 + d2, d3), memory_config: (9600, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 900 + d1 * 30 + d2, d3), memory_config: (900, 240, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 40 : i32 input_height: 30 : i32 input_width: 30 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 240 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,900,240,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 900 + d1 * 30 + d2, d3), memory_config: (900, 240, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1600,40,f32]> tensor<[120,40,1,1,f32]> tensor<[1,1,1600,120,f32]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1600 + d1 * 1600 + d2, d3), memory_config: (50, 2, 'tile<32x32, f32>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 40 + d1 + d2, d3), memory_config: (4800, 1, 'f32', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1600 + d1 * 40 + d2, d3), memory_config: (1600, 120, 'f32', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 40 : i32 input_height: 40 : i32 input_width: 40 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 120 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,1600,120,f32]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1600 + d1 * 40 + d2, d3), memory_config: (1600, 120, 'f32', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1600,40,f32]> tensor<[240,40,1,1,f32]> tensor<[1,1,1600,240,f32]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1600 + d1 * 1600 + d2, d3), memory_config: (50, 2, 'tile<32x32, f32>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 40 + d1 + d2, d3), memory_config: (9600, 1, 'f32', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1600 + d1 * 40 + d2, d3), memory_config: (1600, 240, 'f32', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 40 : i32 input_height: 40 : i32 input_width: 40 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 240 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,1600,240,f32]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1600 + d1 * 40 + d2, d3), memory_config: (1600, 240, 'f32', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,3136,40,bf16]> tensor<[14,40,3,3,bf16]> tensor<[1,1,3136,14,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 3136 + d2, d3), memory_config: (98, 2, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 120 + d1 * 3 + d2, d3), memory_config: (1680, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 14, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 40 : i32 input_height: 56 : i32 input_width: 56 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 14 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,3136,14,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 14, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,416,bf16]> tensor<[128,416,1,1,bf16]> tensor<[1,1,196,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 13, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 416 + d1 + d2, d3), memory_config: (53248, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 416 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,416,bf16]> tensor<[128,416,1,1,bf16]> tensor<[1,1,784,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 13, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 416 + d1 + d2, d3), memory_config: (53248, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 416 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,428,bf16]> tensor<[116,428,3,3,bf16]> tensor<[1,1,196,116,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 14, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1284 + d1 * 3 + d2, d3), memory_config: (148944, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 116, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 428 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 116 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,116,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 116, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,144,448,bf16]> tensor<[1280,448,1,1,bf16]> tensor<[1,1,144,1280,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 144 + d1 * 144 + d2, d3), memory_config: (5, 14, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 448 + d1 + d2, d3), memory_config: (573440, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 144 + d1 * 12 + d2, d3), memory_config: (144, 1280, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 448 : i32 input_height: 12 : i32 input_width: 12 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 1280 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,144,1280,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 144 + d1 * 12 + d2, d3), memory_config: (144, 1280, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,448,bf16]> tensor<[128,448,1,1,bf16]> tensor<[1,1,196,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 14, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 448 + d1 + d2, d3), memory_config: (57344, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 448 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,448,bf16]> tensor<[128,448,1,1,bf16]> tensor<[1,1,784,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 14, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 448 + d1 + d2, d3), memory_config: (57344, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 448 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,3136,448,bf16]> tensor<[256,448,1,1,bf16]> tensor<[1,1,3136,256,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 3136 + d2, d3), memory_config: (98, 14, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 448 + d1 + d2, d3), memory_config: (114688, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 256, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 448 : i32 input_height: 56 : i32 input_width: 56 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 256 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,3136,256,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 256, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,64,448,bf16]> tensor<[512,448,1,3,bf16]> tensor<[1,1,64,512,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 64 + d2, d3), memory_config: (2, 14, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 448 + d1 + d2, d3), memory_config: (229376, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 8 + d2, d3), memory_config: (64, 512, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 448 : i32 input_height: 8 : i32 input_width: 8 : i32 kernel_height: 1 : i32 kernel_width: 3 : i32 out_channels: 512 : i32 padding_height: 0 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,64,512,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 8 + d2, d3), memory_config: (64, 512, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,466,bf16]> tensor<[168,466,3,3,bf16]> tensor<[1,1,784,168,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 15, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1398 + d1 * 3 + d2, d3), memory_config: (234864, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 168, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 466 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 168 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,168,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 168, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,46,bf16]> tensor<[16,46,3,3,bf16]> tensor<[1,1,784,16,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 2, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 138 + d1 * 3 + d2, d3), memory_config: (2208, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 16, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 46 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 16 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,16,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 16, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,100,480,f32]> tensor<[24,480,1,1,f32]> tensor<[1,1,100,24,f32]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 100 + d2, d3), memory_config: (4, 15, 'tile<32x32, f32>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 480 + d1 + d2, d3), memory_config: (11520, 1, 'f32', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (100, 24, 'f32', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 480 : i32 input_height: 10 : i32 input_width: 10 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 24 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,100,24,f32]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (100, 24, 'f32', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,100,480,f32]> tensor<[256,480,1,1,f32]> tensor<[1,1,100,256,f32]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 100 + d2, d3), memory_config: (4, 15, 'tile<32x32, f32>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 480 + d1 + d2, d3), memory_config: (122880, 1, 'f32', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (100, 256, 'f32', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 480 : i32 input_height: 10 : i32 input_width: 10 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 256 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,100,256,f32]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (100, 256, 'f32', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,100,480,f32]> tensor<[480,1,3,3,f32]> tensor<[1,1,100,480,f32]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 100 + d2, d3), memory_config: (4, 15, 'tile<32x32, f32>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (1440, 3, 'f32', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (100, 480, 'f32', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 480 : i32 in_channels: 480 : i32 input_height: 10 : i32 input_width: 10 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 480 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,100,480,f32]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (100, 480, 'f32', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,100,480,f32]> tensor<[480,1,5,5,f32]> tensor<[1,1,100,480,f32]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 100 + d2, d3), memory_config: (4, 15, 'tile<32x32, f32>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5 + d1 * 5 + d2, d3), memory_config: (2400, 5, 'f32', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (100, 480, 'f32', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 480 : i32 in_channels: 480 : i32 input_height: 10 : i32 input_width: 10 : i32 kernel_height: 5 : i32 kernel_width: 5 : i32 out_channels: 480 : i32 padding_height: 2 : i32 padding_width: 2 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,100,480,f32]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (100, 480, 'f32', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,100,480,f32]> tensor<[546,480,1,1,f32]> tensor<[1,1,100,546,f32]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 100 + d2, d3), memory_config: (4, 15, 'tile<32x32, f32>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 480 + d1 + d2, d3), memory_config: (262080, 1, 'f32', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (100, 546, 'f32', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 480 : i32 input_height: 10 : i32 input_width: 10 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 546 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,100,546,f32]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (100, 546, 'f32', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,100,480,f32]> tensor<[80,480,1,1,f32]> tensor<[1,1,100,80,f32]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 100 + d2, d3), memory_config: (4, 15, 'tile<32x32, f32>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 480 + d1 + d2, d3), memory_config: (38400, 1, 'f32', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (100, 80, 'f32', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 480 : i32 input_height: 10 : i32 input_width: 10 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 80 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,100,80,f32]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (100, 80, 'f32', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,480,bf16]> tensor<[112,480,1,1,bf16]> tensor<[1,1,196,112,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 15, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 480 + d1 + d2, d3), memory_config: (53760, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 112, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 480 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 112 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,112,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 112, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,480,bf16]> tensor<[128,480,1,1,bf16]> tensor<[1,1,196,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 15, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 480 + d1 + d2, d3), memory_config: (61440, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 480 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,480,bf16]> tensor<[16,480,1,1,bf16]> tensor<[1,1,196,16,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 15, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 480 + d1 + d2, d3), memory_config: (7680, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 16, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 480 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 16 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,16,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 16, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,480,bf16]> tensor<[192,480,1,1,bf16]> tensor<[1,1,196,192,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 15, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 480 + d1 + d2, d3), memory_config: (92160, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 192, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 480 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 192 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,192,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 192, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,480,bf16]> tensor<[480,1,3,3,bf16]> tensor<[1,1,196,480,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 15, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (1440, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 480, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 480 : i32 in_channels: 480 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 480 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,480,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 480, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,480,bf16]> tensor<[480,1,5,5,bf16]> tensor<[1,1,196,480,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 15, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5 + d1 * 5 + d2, d3), memory_config: (2400, 5, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 480, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 480 : i32 in_channels: 480 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 5 : i32 kernel_width: 5 : i32 out_channels: 480 : i32 padding_height: 2 : i32 padding_width: 2 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,480,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 480, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,480,bf16]> tensor<[56,480,1,1,bf16]> tensor<[1,1,196,56,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 15, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 480 + d1 + d2, d3), memory_config: (26880, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 56, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 480 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 56 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,56,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 56, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,480,bf16]> tensor<[64,480,1,1,bf16]> tensor<[1,1,196,64,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 15, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 480 + d1 + d2, d3), memory_config: (30720, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 64, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 480 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 64 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,64,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 64, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,480,bf16]> tensor<[80,480,1,1,bf16]> tensor<[1,1,196,80,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 15, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 480 + d1 + d2, d3), memory_config: (38400, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 80, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 480 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 80 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,80,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 80, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,480,bf16]> tensor<[96,480,1,1,bf16]> tensor<[1,1,196,96,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 15, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 480 + d1 + d2, d3), memory_config: (46080, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 96, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 480 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 96 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,96,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 96, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,225,480,bf16]> tensor<[112,480,1,1,bf16]> tensor<[1,1,225,112,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 225 + d1 * 225 + d2, d3), memory_config: (8, 15, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 480 + d1 + d2, d3), memory_config: (53760, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 225 + d1 * 15 + d2, d3), memory_config: (225, 112, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 480 : i32 input_height: 15 : i32 input_width: 15 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 112 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,225,112,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 225 + d1 * 15 + d2, d3), memory_config: (225, 112, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,225,480,bf16]> tensor<[480,1,3,3,bf16]> tensor<[1,1,225,480,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 225 + d1 * 225 + d2, d3), memory_config: (8, 15, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (1440, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 225 + d1 * 15 + d2, d3), memory_config: (225, 480, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 480 : i32 in_channels: 480 : i32 input_height: 15 : i32 input_width: 15 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 480 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,225,480,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 225 + d1 * 15 + d2, d3), memory_config: (225, 480, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,225,480,bf16]> tensor<[480,1,5,5,bf16]> tensor<[1,1,225,480,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 225 + d1 * 225 + d2, d3), memory_config: (8, 15, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5 + d1 * 5 + d2, d3), memory_config: (2400, 5, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 225 + d1 * 15 + d2, d3), memory_config: (225, 480, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 480 : i32 in_channels: 480 : i32 input_height: 15 : i32 input_width: 15 : i32 kernel_height: 5 : i32 kernel_width: 5 : i32 out_channels: 480 : i32 padding_height: 2 : i32 padding_width: 2 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,225,480,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 225 + d1 * 15 + d2, d3), memory_config: (225, 480, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,225,480,bf16]> tensor<[80,480,1,1,bf16]> tensor<[1,1,225,80,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 225 + d1 * 225 + d2, d3), memory_config: (8, 15, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 480 + d1 + d2, d3), memory_config: (38400, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 225 + d1 * 15 + d2, d3), memory_config: (225, 80, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 480 : i32 input_height: 15 : i32 input_width: 15 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 80 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,225,80,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 225 + d1 * 15 + d2, d3), memory_config: (225, 80, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1,480,bf16]> tensor<[120,480,1,1,bf16]> tensor<[1,1,1,120,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 15, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 480 + d1 + d2, d3), memory_config: (57600, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 120, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 480 : i32 input_height: 1 : i32 input_width: 1 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 120 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,1,120,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 120, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,400,480,f32]> tensor<[112,480,1,1,f32]> tensor<[1,1,400,112,f32]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 400 + d1 * 400 + d2, d3), memory_config: (13, 15, 'tile<32x32, f32>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 480 + d1 + d2, d3), memory_config: (53760, 1, 'f32', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 400 + d1 * 20 + d2, d3), memory_config: (400, 112, 'f32', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 480 : i32 input_height: 20 : i32 input_width: 20 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 112 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,400,112,f32]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 400 + d1 * 20 + d2, d3), memory_config: (400, 112, 'f32', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,400,480,f32]> tensor<[480,1,3,3,f32]> tensor<[1,1,400,480,f32]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 400 + d1 * 400 + d2, d3), memory_config: (13, 15, 'tile<32x32, f32>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (1440, 3, 'f32', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 400 + d1 * 20 + d2, d3), memory_config: (400, 480, 'f32', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 480 : i32 in_channels: 480 : i32 input_height: 20 : i32 input_width: 20 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 480 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,400,480,f32]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 400 + d1 * 20 + d2, d3), memory_config: (400, 480, 'f32', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,480,bf16]> tensor<[128,480,1,1,bf16]> tensor<[1,1,784,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 15, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 480 + d1 + d2, d3), memory_config: (61440, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 480 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,480,bf16]> tensor<[480,1,1,5,bf16]> tensor<[1,1,49,480,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 15, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (480, 5, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 480, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 480 : i32 in_channels: 480 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 1 : i32 kernel_width: 5 : i32 out_channels: 480 : i32 padding_height: 0 : i32 padding_width: 2 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,480,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 480, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,480,bf16]> tensor<[480,1,3,3,bf16]> tensor<[1,1,49,480,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 15, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (1440, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 480, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 480 : i32 in_channels: 480 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 480 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,480,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 480, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,480,bf16]> tensor<[480,1,5,1,bf16]> tensor<[1,1,49,480,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 15, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5 + d1 * 5 + d2, d3), memory_config: (2400, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 480, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 480 : i32 in_channels: 480 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 5 : i32 kernel_width: 1 : i32 out_channels: 480 : i32 padding_height: 2 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,480,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 480, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,12544,48,bf16]> tensor<[48,1,3,3,bf16]> tensor<[1,1,3136,48,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 12544 + d2, d3), memory_config: (392, 2, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (144, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 48, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 48 : i32 in_channels: 48 : i32 input_height: 112 : i32 input_width: 112 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 48 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,3136,48,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 48, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1089,48,bf16]> tensor<[288,48,1,1,bf16]> tensor<[1,1,1089,288,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1089 + d1 * 1089 + d2, d3), memory_config: (35, 2, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 48 + d1 + d2, d3), memory_config: (13824, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1089 + d1 * 33 + d2, d3), memory_config: (1089, 288, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 48 : i32 input_height: 33 : i32 input_width: 33 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 288 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,1089,288,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1089 + d1 * 33 + d2, d3), memory_config: (1089, 288, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1444,48,bf16]> tensor<[288,48,1,1,bf16]> tensor<[1,1,1444,288,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1444 + d1 * 1444 + d2, d3), memory_config: (46, 2, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 48 + d1 + d2, d3), memory_config: (13824, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1444 + d1 * 38 + d2, d3), memory_config: (1444, 288, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 48 : i32 input_height: 38 : i32 input_width: 38 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 288 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,1444,288,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1444 + d1 * 38 + d2, d3), memory_config: (1444, 288, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,3136,48,bf16]> tensor<[12,48,1,1,bf16]> tensor<[1,1,3136,12,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 3136 + d2, d3), memory_config: (98, 2, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 48 + d1 + d2, d3), memory_config: (576, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 12, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 48 : i32 input_height: 56 : i32 input_width: 56 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 12 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,3136,12,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 12, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,48,bf16]> tensor<[128,48,3,3,bf16]> tensor<[1,1,49,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 2, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 144 + d1 * 3 + d2, d3), memory_config: (18432, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 48 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 128 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,4096,4,bf16]> tensor<[320,4,3,3,bf16]> tensor<[1,1,4096,320,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 4096 + d2, d3), memory_config: (128, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12 + d1 * 3 + d2, d3), memory_config: (3840, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (4096, 320, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 4 : i32 input_height: 64 : i32 input_width: 64 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 320 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,4096,320,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (4096, 320, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,512,bf16]> tensor<[1024,512,1,1,bf16]> tensor<[1,1,196,1024,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 16, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 512 + d1 + d2, d3), memory_config: (524288, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 1024, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 512 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 1024 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,1024,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 1024, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,512,bf16]> tensor<[1024,512,3,3,bf16]> tensor<[1,1,49,1024,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 16, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1536 + d1 * 3 + d2, d3), memory_config: (1572864, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 1024, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 512 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 1024 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,49,1024,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 1024, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,512,bf16]> tensor<[1024,512,3,3,bf16]> tensor<[1,1,196,1024,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 16, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1536 + d1 * 3 + d2, d3), memory_config: (1572864, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 1024, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 512 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 1024 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,1024,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 1024, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,512,bf16]> tensor<[112,512,1,1,bf16]> tensor<[1,1,196,112,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 16, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 512 + d1 + d2, d3), memory_config: (57344, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 112, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 512 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 112 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,112,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 112, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,512,bf16]> tensor<[128,512,1,1,bf16]> tensor<[1,1,196,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 16, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 512 + d1 + d2, d3), memory_config: (65536, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 512 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,512,bf16]> tensor<[144,512,1,1,bf16]> tensor<[1,1,196,144,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 16, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 512 + d1 + d2, d3), memory_config: (73728, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 144, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 512 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 144 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,144,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 144, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,512,bf16]> tensor<[160,512,1,1,bf16]> tensor<[1,1,196,160,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 16, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 512 + d1 + d2, d3), memory_config: (81920, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 160, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 512 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 160 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,160,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 160, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,512,bf16]> tensor<[192,512,1,1,bf16]> tensor<[1,1,196,192,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 16, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 512 + d1 + d2, d3), memory_config: (98304, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 192, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 512 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 192 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,192,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 192, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,512,bf16]> tensor<[24,512,1,1,bf16]> tensor<[1,1,196,24,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 16, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 512 + d1 + d2, d3), memory_config: (12288, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 24, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 512 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 24 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,24,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 24, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,512,bf16]> tensor<[256,512,1,1,bf16]> tensor<[1,1,196,256,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 16, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 512 + d1 + d2, d3), memory_config: (131072, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 256, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 512 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 256 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,256,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 256, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,512,bf16]> tensor<[32,512,1,1,bf16]> tensor<[1,1,196,32,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 16, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 512 + d1 + d2, d3), memory_config: (16384, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 32, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 512 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 32 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,32,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 32, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,512,bf16]> tensor<[512,1,3,3,bf16]> tensor<[1,1,196,512,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 16, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (1536, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 512, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 512 : i32 in_channels: 512 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 512 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,512,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 512, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,512,bf16]> tensor<[512,1,3,3,bf16]> tensor<[1,1,49,512,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 16, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (1536, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 512, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 512 : i32 in_channels: 512 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 512 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,49,512,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 512, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,512,bf16]> tensor<[512,512,1,1,bf16]> tensor<[1,1,196,512,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 16, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 512 + d1 + d2, d3), memory_config: (262144, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 512, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 512 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 512 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,512,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 512, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,512,bf16]> tensor<[512,512,3,3,bf16]> tensor<[1,1,196,512,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 16, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1536 + d1 * 3 + d2, d3), memory_config: (786432, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 512, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 512 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 512 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,512,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 512, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,512,bf16]> tensor<[512,512,3,3,bf16]> tensor<[1,1,196,512,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 16, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1536 + d1 * 3 + d2, d3), memory_config: (786432, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 512, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 512 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 512 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,512,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 512, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,512,bf16]> tensor<[512,512,3,3,bf16]> tensor<[1,1,49,512,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 16, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1536 + d1 * 3 + d2, d3), memory_config: (786432, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 512, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 512 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 512 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,49,512,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 512, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,512,bf16]> tensor<[64,512,1,1,bf16]> tensor<[1,1,196,64,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 16, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 512 + d1 + d2, d3), memory_config: (32768, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 64, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 512 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 64 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,64,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 64, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,300,512,bf16]> tensor<[64,512,1,1,bf16]> tensor<[1,1,300,64,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 300 + d1 * 300 + d2, d3), memory_config: (10, 16, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 512 + d1 + d2, d3), memory_config: (32768, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 300 + d1 * 20 + d2, d3), memory_config: (300, 64, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 512 : i32 input_height: 15 : i32 input_width: 20 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 64 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,300,64,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 300 + d1 * 20 + d2, d3), memory_config: (300, 64, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,256,512,bf16]> tensor<[1024,512,3,3,bf16]> tensor<[1,1,256,1024,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 256 + d2, d3), memory_config: (8, 16, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1536 + d1 * 3 + d2, d3), memory_config: (1572864, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (256, 1024, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 512 : i32 input_height: 16 : i32 input_width: 16 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 1024 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,256,1024,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (256, 1024, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,256,512,bf16]> tensor<[255,512,1,1,bf16]> tensor<[1,1,256,255,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 256 + d2, d3), memory_config: (8, 16, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 512 + d1 + d2, d3), memory_config: (130560, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (256, 255, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 512 : i32 input_height: 16 : i32 input_width: 16 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 255 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,256,255,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (256, 255, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,256,512,bf16]> tensor<[256,512,1,1,bf16]> tensor<[1,1,256,256,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 256 + d2, d3), memory_config: (8, 16, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 512 + d1 + d2, d3), memory_config: (131072, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (256, 256, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 512 : i32 input_height: 16 : i32 input_width: 16 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 256 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,256,256,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (256, 256, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,256,512,bf16]> tensor<[512,512,1,1,bf16]> tensor<[1,1,256,512,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 256 + d2, d3), memory_config: (8, 16, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 512 + d1 + d2, d3), memory_config: (262144, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (256, 512, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 512 : i32 input_height: 16 : i32 input_width: 16 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 512 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,256,512,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (256, 512, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,256,512,bf16]> tensor<[512,512,3,3,bf16]> tensor<[1,1,256,512,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 256 + d2, d3), memory_config: (8, 16, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1536 + d1 * 3 + d2, d3), memory_config: (786432, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (256, 512, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 512 : i32 input_height: 16 : i32 input_width: 16 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 512 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,256,512,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (256, 512, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1,512,bf16]> tensor<[1000,512,1,1,bf16]> tensor<[1,1,1,1000,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 16, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 512 + d1 + d2, d3), memory_config: (512000, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 1000, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 512 : i32 input_height: 1 : i32 input_width: 1 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 1000 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,1,1000,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 1000, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1,512,bf16]> tensor<[512,512,1,1,bf16]> tensor<[1,1,1,512,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 16, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 512 + d1 + d2, d3), memory_config: (262144, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 512, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 512 : i32 input_height: 1 : i32 input_width: 1 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 512 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,1,512,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 512, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,920,512,bf16]> tensor<[2048,512,1,1,bf16]> tensor<[1,1,920,2048,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 920 + d1 * 920 + d2, d3), memory_config: (29, 16, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 512 + d1 + d2, d3), memory_config: (1048576, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 920 + d1 * 40 + d2, d3), memory_config: (920, 2048, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 512 : i32 input_height: 23 : i32 input_width: 40 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 2048 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,920,2048,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 920 + d1 * 40 + d2, d3), memory_config: (920, 2048, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,920,512,bf16]> tensor<[512,512,3,3,bf16]> tensor<[1,1,920,512,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 920 + d1 * 920 + d2, d3), memory_config: (29, 16, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1536 + d1 * 3 + d2, d3), memory_config: (786432, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 920 + d1 * 40 + d2, d3), memory_config: (920, 512, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 512 : i32 input_height: 23 : i32 input_width: 40 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 512 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,920,512,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 920 + d1 * 40 + d2, d3), memory_config: (920, 512, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,512,bf16]> tensor<[1024,512,1,1,bf16]> tensor<[1,1,784,1024,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 16, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 512 + d1 + d2, d3), memory_config: (524288, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 1024, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 512 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 1024 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,1024,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 1024, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,512,bf16]> tensor<[1024,512,1,1,bf16]> tensor<[1,1,196,1024,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 16, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 512 + d1 + d2, d3), memory_config: (524288, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 1024, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 512 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 1024 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,196,1024,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 1024, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,512,bf16]> tensor<[128,512,1,1,bf16]> tensor<[1,1,784,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 16, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 512 + d1 + d2, d3), memory_config: (65536, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 512 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,512,bf16]> tensor<[128,512,1,1,bf16]> tensor<[1,1,784,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 16, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 512 + d1 + d2, d3), memory_config: (65536, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 512 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,512,bf16]> tensor<[19,512,1,1,bf16]> tensor<[1,1,784,19,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 16, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 512 + d1 + d2, d3), memory_config: (9728, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 19, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 512 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 19 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,19,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 19, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,512,bf16]> tensor<[256,512,1,1,bf16]> tensor<[1,1,784,256,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 16, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 512 + d1 + d2, d3), memory_config: (131072, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 256, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 512 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 256 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,256,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 256, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,512,bf16]> tensor<[38,512,1,1,bf16]> tensor<[1,1,784,38,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 16, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 512 + d1 + d2, d3), memory_config: (19456, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 38, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 512 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 38 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,38,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 38, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,512,bf16]> tensor<[512,1,3,3,bf16]> tensor<[1,1,784,512,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 16, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (1536, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 512, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 512 : i32 in_channels: 512 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 512 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,512,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 512, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,512,bf16]> tensor<[512,1,3,3,bf16]> tensor<[1,1,784,512,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 16, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (1536, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 512, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 2 : i32 dilation_width: 2 : i32 groups: 512 : i32 in_channels: 512 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 512 : i32 padding_height: 2 : i32 padding_width: 2 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,512,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 512, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,512,bf16]> tensor<[512,512,1,1,bf16]> tensor<[1,1,784,512,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 16, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 512 + d1 + d2, d3), memory_config: (262144, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 512, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 512 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 512 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,512,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 512, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,512,bf16]> tensor<[512,512,3,3,bf16]> tensor<[1,1,784,512,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 16, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1536 + d1 * 3 + d2, d3), memory_config: (786432, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 512, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 512 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 512 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,512,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 512, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,512,bf16]> tensor<[512,512,3,3,bf16]> tensor<[1,1,784,512,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 16, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1536 + d1 * 3 + d2, d3), memory_config: (786432, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 512, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 512 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 512 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,512,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 512, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,512,bf16]> tensor<[512,512,3,3,bf16]> tensor<[1,1,196,512,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 16, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1536 + d1 * 3 + d2, d3), memory_config: (786432, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 512, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 512 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 512 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,196,512,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 512, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,512,bf16]> tensor<[512,8,3,3,bf16]> tensor<[1,1,784,512,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 16, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 24 + d1 * 3 + d2, d3), memory_config: (12288, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 512, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 64 : i32 in_channels: 512 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 512 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,512,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 512, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1024,512,bf16]> tensor<[1024,512,3,3,bf16]> tensor<[1,1,256,1024,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 1024 + d2, d3), memory_config: (32, 16, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1536 + d1 * 3 + d2, d3), memory_config: (1572864, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (256, 1024, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 512 : i32 input_height: 32 : i32 input_width: 32 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 1024 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,256,1024,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (256, 1024, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1024,512,bf16]> tensor<[128,512,1,1,bf16]> tensor<[1,1,1024,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 1024 + d2, d3), memory_config: (32, 16, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 512 + d1 + d2, d3), memory_config: (65536, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 512 : i32 input_height: 32 : i32 input_width: 32 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,1024,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1024,512,bf16]> tensor<[255,512,1,1,bf16]> tensor<[1,1,1024,255,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 1024 + d2, d3), memory_config: (32, 16, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 512 + d1 + d2, d3), memory_config: (130560, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 255, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 512 : i32 input_height: 32 : i32 input_width: 32 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 255 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,1024,255,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 255, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1024,512,bf16]> tensor<[256,512,1,1,bf16]> tensor<[1,1,1024,256,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 1024 + d2, d3), memory_config: (32, 16, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 512 + d1 + d2, d3), memory_config: (131072, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 256, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 512 : i32 input_height: 32 : i32 input_width: 32 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 256 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,1024,256,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 256, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1024,512,bf16]> tensor<[256,512,3,3,bf16]> tensor<[1,1,1024,256,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 1024 + d2, d3), memory_config: (32, 16, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1536 + d1 * 3 + d2, d3), memory_config: (393216, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 256, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 512 : i32 input_height: 32 : i32 input_width: 32 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 256 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,1024,256,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 256, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,3600,512,bf16]> tensor<[512,512,3,3,bf16]> tensor<[1,1,920,512,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3600 + d1 * 3600 + d2, d3), memory_config: (113, 16, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1536 + d1 * 3 + d2, d3), memory_config: (786432, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 920 + d1 * 40 + d2, d3), memory_config: (920, 512, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 512 : i32 input_height: 45 : i32 input_width: 80 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 512 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,920,512,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 920 + d1 * 40 + d2, d3), memory_config: (920, 512, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,3136,512,bf16]> tensor<[256,512,3,3,bf16]> tensor<[1,1,3136,256,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 3136 + d2, d3), memory_config: (98, 16, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1536 + d1 * 3 + d2, d3), memory_config: (393216, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 256, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 512 : i32 input_height: 56 : i32 input_width: 56 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 256 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,3136,256,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 256, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,3136,512,bf16]> tensor<[512,8,3,3,bf16]> tensor<[1,1,784,512,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 3136 + d2, d3), memory_config: (98, 16, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 24 + d1 * 3 + d2, d3), memory_config: (12288, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 512, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 64 : i32 in_channels: 512 : i32 input_height: 56 : i32 input_width: 56 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 512 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,784,512,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 512, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,25,512,f32]> tensor<[128,512,1,1,f32]> tensor<[1,1,25,128,f32]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 25 + d1 * 25 + d2, d3), memory_config: (1, 16, 'tile<32x32, f32>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 512 + d1 + d2, d3), memory_config: (65536, 1, 'f32', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 25 + d1 * 5 + d2, d3), memory_config: (25, 128, 'f32', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 512 : i32 input_height: 5 : i32 input_width: 5 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,25,128,f32]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 25 + d1 * 5 + d2, d3), memory_config: (25, 128, 'f32', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,25,512,f32]> tensor<[24,512,1,1,f32]> tensor<[1,1,25,24,f32]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 25 + d1 * 25 + d2, d3), memory_config: (1, 16, 'tile<32x32, f32>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 512 + d1 + d2, d3), memory_config: (12288, 1, 'f32', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 25 + d1 * 5 + d2, d3), memory_config: (25, 24, 'f32', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 512 : i32 input_height: 5 : i32 input_width: 5 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 24 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,25,24,f32]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 25 + d1 * 5 + d2, d3), memory_config: (25, 24, 'f32', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,25,512,f32]> tensor<[512,1,3,3,f32]> tensor<[1,1,25,512,f32]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 25 + d1 * 25 + d2, d3), memory_config: (1, 16, 'tile<32x32, f32>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (1536, 3, 'f32', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 25 + d1 * 5 + d2, d3), memory_config: (25, 512, 'f32', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 512 : i32 in_channels: 512 : i32 input_height: 5 : i32 input_width: 5 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 512 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,25,512,f32]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 25 + d1 * 5 + d2, d3), memory_config: (25, 512, 'f32', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,25,512,f32]> tensor<[546,512,1,1,f32]> tensor<[1,1,25,546,f32]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 25 + d1 * 25 + d2, d3), memory_config: (1, 16, 'tile<32x32, f32>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 512 + d1 + d2, d3), memory_config: (279552, 1, 'f32', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 25 + d1 * 5 + d2, d3), memory_config: (25, 546, 'f32', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 512 : i32 input_height: 5 : i32 input_width: 5 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 546 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,25,546,f32]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 25 + d1 * 5 + d2, d3), memory_config: (25, 546, 'f32', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,4800,512,bf16]> tensor<[512,1,3,3,bf16]> tensor<[1,1,4800,512,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4800 + d1 * 4800 + d2, d3), memory_config: (150, 16, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (1536, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4800 + d1 * 80 + d2, d3), memory_config: (4800, 512, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 512 : i32 in_channels: 512 : i32 input_height: 60 : i32 input_width: 80 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 512 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,4800,512,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4800 + d1 * 80 + d2, d3), memory_config: (4800, 512, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,512,bf16]> tensor<[1024,512,1,1,bf16]> tensor<[1,1,49,1024,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 16, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 512 + d1 + d2, d3), memory_config: (524288, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 1024, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 512 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 1024 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,1024,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 1024, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,512,bf16]> tensor<[2048,512,1,1,bf16]> tensor<[1,1,49,2048,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 16, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 512 + d1 + d2, d3), memory_config: (1048576, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 2048, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 512 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 2048 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,2048,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 2048, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,512,bf16]> tensor<[512,512,3,3,bf16]> tensor<[1,1,49,512,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 16, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1536 + d1 * 3 + d2, d3), memory_config: (786432, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 512, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 512 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 512 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,512,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 512, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,64,512,bf16]> tensor<[256,512,1,3,bf16]> tensor<[1,1,64,256,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 64 + d2, d3), memory_config: (2, 16, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 512 + d1 + d2, d3), memory_config: (131072, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 8 + d2, d3), memory_config: (64, 256, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 512 : i32 input_height: 8 : i32 input_width: 8 : i32 kernel_height: 1 : i32 kernel_width: 3 : i32 out_channels: 256 : i32 padding_height: 0 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,64,256,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 8 + d2, d3), memory_config: (64, 256, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,64,512,bf16]> tensor<[256,512,3,1,bf16]> tensor<[1,1,64,256,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 64 + d2, d3), memory_config: (2, 16, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1536 + d1 * 3 + d2, d3), memory_config: (393216, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 8 + d2, d3), memory_config: (64, 256, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 512 : i32 input_height: 8 : i32 input_width: 8 : i32 kernel_height: 3 : i32 kernel_width: 1 : i32 out_channels: 256 : i32 padding_height: 1 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,64,256,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 8 + d2, d3), memory_config: (64, 256, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,14400,512,bf16]> tensor<[1024,512,1,1,bf16]> tensor<[1,1,3600,1024,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 14400 + d1 * 14400 + d2, d3), memory_config: (450, 16, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 512 + d1 + d2, d3), memory_config: (524288, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3600 + d1 * 80 + d2, d3), memory_config: (3600, 1024, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 512 : i32 input_height: 90 : i32 input_width: 160 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 1024 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,3600,1024,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3600 + d1 * 80 + d2, d3), memory_config: (3600, 1024, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,14400,512,bf16]> tensor<[128,512,1,1,bf16]> tensor<[1,1,14400,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 14400 + d1 * 14400 + d2, d3), memory_config: (450, 16, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 512 + d1 + d2, d3), memory_config: (65536, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 14400 + d1 * 160 + d2, d3), memory_config: (14400, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 512 : i32 input_height: 90 : i32 input_width: 160 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,14400,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 14400 + d1 * 160 + d2, d3), memory_config: (14400, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,14400,512,bf16]> tensor<[256,512,1,1,bf16]> tensor<[1,1,14400,256,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 14400 + d1 * 14400 + d2, d3), memory_config: (450, 16, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 512 + d1 + d2, d3), memory_config: (131072, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 14400 + d1 * 160 + d2, d3), memory_config: (14400, 256, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 512 : i32 input_height: 90 : i32 input_width: 160 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 256 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,14400,256,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 14400 + d1 * 160 + d2, d3), memory_config: (14400, 256, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,528,bf16]> tensor<[128,528,1,1,bf16]> tensor<[1,1,196,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 17, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 528 + d1 + d2, d3), memory_config: (67584, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 528 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,528,bf16]> tensor<[160,528,1,1,bf16]> tensor<[1,1,196,160,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 17, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 528 + d1 + d2, d3), memory_config: (84480, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 160, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 528 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 160 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,160,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 160, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,528,bf16]> tensor<[256,528,1,1,bf16]> tensor<[1,1,196,256,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 17, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 528 + d1 + d2, d3), memory_config: (135168, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 256, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 528 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 256 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,256,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 256, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,528,bf16]> tensor<[32,528,1,1,bf16]> tensor<[1,1,196,32,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 17, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 528 + d1 + d2, d3), memory_config: (16896, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 32, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 528 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 32 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,32,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 32, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,289,528,bf16]> tensor<[120,528,1,1,bf16]> tensor<[1,1,289,120,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 289 + d2, d3), memory_config: (10, 17, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 528 + d1 + d2, d3), memory_config: (63360, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 17 + d2, d3), memory_config: (289, 120, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 528 : i32 input_height: 17 : i32 input_width: 17 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 120 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,289,120,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 17 + d2, d3), memory_config: (289, 120, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,289,528,bf16]> tensor<[528,1,3,3,bf16]> tensor<[1,1,289,528,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 289 + d2, d3), memory_config: (10, 17, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (1584, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 17 + d2, d3), memory_config: (289, 528, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 528 : i32 in_channels: 528 : i32 input_height: 17 : i32 input_width: 17 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 528 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,289,528,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 17 + d2, d3), memory_config: (289, 528, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,289,528,bf16]> tensor<[528,1,5,5,bf16]> tensor<[1,1,289,528,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 289 + d2, d3), memory_config: (10, 17, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5 + d1 * 5 + d2, d3), memory_config: (2640, 5, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 17 + d2, d3), memory_config: (289, 528, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 528 : i32 in_channels: 528 : i32 input_height: 17 : i32 input_width: 17 : i32 kernel_height: 5 : i32 kernel_width: 5 : i32 out_channels: 528 : i32 padding_height: 2 : i32 padding_width: 2 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,289,528,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 17 + d2, d3), memory_config: (289, 528, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,289,528,bf16]> tensor<[88,528,1,1,bf16]> tensor<[1,1,289,88,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 289 + d2, d3), memory_config: (10, 17, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 528 + d1 + d2, d3), memory_config: (46464, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 17 + d2, d3), memory_config: (289, 88, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 528 : i32 input_height: 17 : i32 input_width: 17 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 88 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,289,88,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 17 + d2, d3), memory_config: (289, 88, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,544,bf16]> tensor<[128,544,1,1,bf16]> tensor<[1,1,196,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 17, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 544 + d1 + d2, d3), memory_config: (69632, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 544 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,544,bf16]> tensor<[196,544,3,3,bf16]> tensor<[1,1,196,196,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 17, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1632 + d1 * 3 + d2, d3), memory_config: (319872, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 196, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 544 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 196 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,196,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 196, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,3136,54,bf16]> tensor<[24,54,3,3,bf16]> tensor<[1,1,3136,24,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 3136 + d2, d3), memory_config: (98, 2, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 162 + d1 * 3 + d2, d3), memory_config: (3888, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 24, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 54 : i32 input_height: 56 : i32 input_width: 56 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 24 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,3136,24,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 24, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,56,bf16]> tensor<[56,1,3,3,bf16]> tensor<[1,1,196,56,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 2, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (168, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 56, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 56 : i32 in_channels: 56 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 56 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,56,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 56, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,2304,56,bf16]> tensor<[336,56,1,1,bf16]> tensor<[1,1,2304,336,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 2304 + d1 * 2304 + d2, d3), memory_config: (72, 2, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 56 + d1 + d2, d3), memory_config: (18816, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 2304 + d1 * 48 + d2, d3), memory_config: (2304, 336, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 56 : i32 input_height: 48 : i32 input_width: 48 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 336 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,2304,336,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 2304 + d1 * 48 + d2, d3), memory_config: (2304, 336, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,576,bf16]> tensor<[128,576,1,1,bf16]> tensor<[1,1,196,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 18, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 576 + d1 + d2, d3), memory_config: (73728, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 576 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,576,bf16]> tensor<[576,1,3,3,bf16]> tensor<[1,1,196,576,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 18, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (1728, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 576, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 576 : i32 in_channels: 576 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 576 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,576,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 576, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,576,bf16]> tensor<[576,1,3,3,bf16]> tensor<[1,1,49,576,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 18, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (1728, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 576, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 576 : i32 in_channels: 576 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 576 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,49,576,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 576, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,576,bf16]> tensor<[96,576,1,1,bf16]> tensor<[1,1,196,96,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 18, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 576 + d1 + d2, d3), memory_config: (55296, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 96, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 576 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 96 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,96,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 96, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,361,576,bf16]> tensor<[136,576,1,1,bf16]> tensor<[1,1,361,136,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 361 + d1 * 361 + d2, d3), memory_config: (12, 18, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 576 + d1 + d2, d3), memory_config: (78336, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 361 + d1 * 19 + d2, d3), memory_config: (361, 136, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 576 : i32 input_height: 19 : i32 input_width: 19 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 136 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,361,136,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 361 + d1 * 19 + d2, d3), memory_config: (361, 136, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,361,576,bf16]> tensor<[576,1,3,3,bf16]> tensor<[1,1,361,576,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 361 + d1 * 361 + d2, d3), memory_config: (12, 18, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (1728, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 361 + d1 * 19 + d2, d3), memory_config: (361, 576, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 576 : i32 in_channels: 576 : i32 input_height: 19 : i32 input_width: 19 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 576 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,361,576,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 361 + d1 * 19 + d2, d3), memory_config: (361, 576, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,361,576,bf16]> tensor<[576,1,5,5,bf16]> tensor<[1,1,361,576,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 361 + d1 * 361 + d2, d3), memory_config: (12, 18, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5 + d1 * 5 + d2, d3), memory_config: (2880, 5, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 361 + d1 * 19 + d2, d3), memory_config: (361, 576, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 576 : i32 in_channels: 576 : i32 input_height: 19 : i32 input_width: 19 : i32 kernel_height: 5 : i32 kernel_width: 5 : i32 out_channels: 576 : i32 padding_height: 2 : i32 padding_width: 2 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,361,576,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 361 + d1 * 19 + d2, d3), memory_config: (361, 576, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,361,576,bf16]> tensor<[96,576,1,1,bf16]> tensor<[1,1,361,96,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 361 + d1 * 361 + d2, d3), memory_config: (12, 18, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 576 + d1 + d2, d3), memory_config: (55296, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 361 + d1 * 19 + d2, d3), memory_config: (361, 96, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 576 : i32 input_height: 19 : i32 input_width: 19 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 96 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,361,96,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 361 + d1 * 19 + d2, d3), memory_config: (361, 96, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,576,bf16]> tensor<[160,576,1,1,bf16]> tensor<[1,1,49,160,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 18, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 576 + d1 + d2, d3), memory_config: (92160, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 160, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 576 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 160 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,160,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 160, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1,58,bf16]> tensor<[232,58,1,1,bf16]> tensor<[1,1,1,232,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 2, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 58 + d1 + d2, d3), memory_config: (13456, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 232, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 58 : i32 input_height: 1 : i32 input_width: 1 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 232 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,1,232,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 232, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1,58,bf16]> tensor<[696,58,1,1,bf16]> tensor<[1,1,1,696,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 2, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 58 + d1 + d2, d3), memory_config: (40368, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 696, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 58 : i32 input_height: 1 : i32 input_width: 1 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 696 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,1,696,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 696, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,58,bf16]> tensor<[20,58,3,3,bf16]> tensor<[1,1,784,20,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 2, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 174 + d1 * 3 + d2, d3), memory_config: (3480, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 20, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 58 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 20 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,20,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 20, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,608,bf16]> tensor<[128,608,1,1,bf16]> tensor<[1,1,196,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 19, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 608 + d1 + d2, d3), memory_config: (77824, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 608 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,60,bf16]> tensor<[60,1,3,3,bf16]> tensor<[1,1,784,60,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 2, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (180, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 60, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 60 : i32 in_channels: 60 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 60 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,60,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 60, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,62,bf16]> tensor<[28,62,3,3,bf16]> tensor<[1,1,784,28,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 2, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 186 + d1 * 3 + d2, d3), memory_config: (5208, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 28, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 62 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 28 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,28,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 28, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,640,bf16]> tensor<[128,640,1,1,bf16]> tensor<[1,1,196,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 20, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 640 + d1 + d2, d3), memory_config: (81920, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 640 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,256,640,bf16]> tensor<[1280,640,1,1,bf16]> tensor<[1,1,256,1280,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 256 + d2, d3), memory_config: (8, 20, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 640 + d1 + d2, d3), memory_config: (819200, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (256, 1280, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 640 : i32 input_height: 16 : i32 input_width: 16 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 1280 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,256,1280,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (256, 1280, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,256,640,bf16]> tensor<[1280,640,3,3,bf16]> tensor<[1,1,256,1280,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 256 + d2, d3), memory_config: (8, 20, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1920 + d1 * 3 + d2, d3), memory_config: (2457600, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (256, 1280, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 640 : i32 input_height: 16 : i32 input_width: 16 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 1280 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,256,1280,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (256, 1280, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1024,640,bf16]> tensor<[640,1,3,3,bf16]> tensor<[1,1,1024,640,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 1024 + d2, d3), memory_config: (32, 20, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (1920, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 640, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 640 : i32 in_channels: 640 : i32 input_height: 32 : i32 input_width: 32 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 640 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,1024,640,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 640, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1024,640,bf16]> tensor<[640,640,1,1,bf16]> tensor<[1,1,1024,640,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 1024 + d2, d3), memory_config: (32, 20, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 640 + d1 + d2, d3), memory_config: (409600, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 640, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 640 : i32 input_height: 32 : i32 input_width: 32 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 640 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,1024,640,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 640, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1024,640,bf16]> tensor<[640,640,3,3,bf16]> tensor<[1,1,1024,640,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 1024 + d2, d3), memory_config: (32, 20, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1920 + d1 * 3 + d2, d3), memory_config: (1228800, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 640, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 640 : i32 input_height: 32 : i32 input_width: 32 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 640 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,1024,640,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 640, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1024,640,bf16]> tensor<[640,640,3,3,bf16]> tensor<[1,1,256,640,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 1024 + d2, d3), memory_config: (32, 20, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1920 + d1 * 3 + d2, d3), memory_config: (1228800, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (256, 640, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 640 : i32 input_height: 32 : i32 input_width: 32 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 640 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,256,640,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (256, 640, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,4096,640,bf16]> tensor<[320,640,1,1,bf16]> tensor<[1,1,4096,320,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 4096 + d2, d3), memory_config: (128, 20, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 640 + d1 + d2, d3), memory_config: (204800, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (4096, 320, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 640 : i32 input_height: 64 : i32 input_width: 64 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 320 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,4096,320,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (4096, 320, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,4096,640,bf16]> tensor<[320,640,3,3,bf16]> tensor<[1,1,4096,320,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 4096 + d2, d3), memory_config: (128, 20, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1920 + d1 * 3 + d2, d3), memory_config: (614400, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (4096, 320, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 640 : i32 input_height: 64 : i32 input_width: 64 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 320 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,4096,320,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (4096, 320, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,4096,640,bf16]> tensor<[640,640,3,3,bf16]> tensor<[1,1,4096,640,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 4096 + d2, d3), memory_config: (128, 20, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1920 + d1 * 3 + d2, d3), memory_config: (1228800, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (4096, 640, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 640 : i32 input_height: 64 : i32 input_width: 64 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 640 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,4096,640,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (4096, 640, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,640,bf16]> tensor<[160,640,3,3,bf16]> tensor<[1,1,49,160,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 20, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1920 + d1 * 3 + d2, d3), memory_config: (307200, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 160, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 640 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 160 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,160,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 160, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,12544,64,bf16]> tensor<[128,64,3,3,bf16]> tensor<[1,1,12544,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 12544 + d2, d3), memory_config: (392, 2, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 192 + d1 * 3 + d2, d3), memory_config: (24576, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (12544, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 64 : i32 input_height: 112 : i32 input_width: 112 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 128 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,12544,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (12544, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,12544,64,bf16]> tensor<[128,64,3,3,bf16]> tensor<[1,1,12544,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 12544 + d2, d3), memory_config: (392, 2, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 192 + d1 * 3 + d2, d3), memory_config: (24576, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (12544, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 64 : i32 input_height: 112 : i32 input_width: 112 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 128 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,12544,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (12544, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,12544,64,bf16]> tensor<[64,1,3,3,bf16]> tensor<[1,1,12544,64,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 12544 + d2, d3), memory_config: (392, 2, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (192, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (12544, 64, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 64 : i32 in_channels: 64 : i32 input_height: 112 : i32 input_width: 112 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 64 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,12544,64,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (12544, 64, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,12544,64,bf16]> tensor<[64,1,3,3,bf16]> tensor<[1,1,3136,64,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 12544 + d2, d3), memory_config: (392, 2, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (192, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 64, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 64 : i32 in_channels: 64 : i32 input_height: 112 : i32 input_width: 112 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 64 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,3136,64,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 64, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,12544,64,bf16]> tensor<[64,64,1,1,bf16]> tensor<[1,1,12544,64,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 12544 + d2, d3), memory_config: (392, 2, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 + d2, d3), memory_config: (4096, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (12544, 64, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 64 : i32 input_height: 112 : i32 input_width: 112 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 64 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,12544,64,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (12544, 64, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,12544,64,bf16]> tensor<[64,64,3,3,bf16]> tensor<[1,1,3136,64,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 12544 + d2, d3), memory_config: (392, 2, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 192 + d1 * 3 + d2, d3), memory_config: (12288, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 64, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 64 : i32 input_height: 112 : i32 input_width: 112 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 64 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,3136,64,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 64, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,19200,64,bf16]> tensor<[128,64,3,3,bf16]> tensor<[1,1,4800,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 19200 + d1 * 19200 + d2, d3), memory_config: (600, 2, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 192 + d1 * 3 + d2, d3), memory_config: (24576, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4800 + d1 * 80 + d2, d3), memory_config: (4800, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 64 : i32 input_height: 120 : i32 input_width: 160 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 128 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,4800,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4800 + d1 * 80 + d2, d3), memory_config: (4800, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,19200,64,bf16]> tensor<[32,64,3,3,bf16]> tensor<[1,1,19200,32,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 19200 + d1 * 19200 + d2, d3), memory_config: (600, 2, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 192 + d1 * 3 + d2, d3), memory_config: (6144, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 19200 + d1 * 160 + d2, d3), memory_config: (19200, 32, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 64 : i32 input_height: 120 : i32 input_width: 160 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 32 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,19200,32,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 19200 + d1 * 160 + d2, d3), memory_config: (19200, 32, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,19200,64,bf16]> tensor<[64,64,8,8,bf16]> tensor<[1,1,300,64,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 19200 + d1 * 19200 + d2, d3), memory_config: (600, 2, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 512 + d1 * 8 + d2, d3), memory_config: (32768, 8, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 300 + d1 * 20 + d2, d3), memory_config: (300, 64, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 64 : i32 input_height: 120 : i32 input_width: 160 : i32 kernel_height: 8 : i32 kernel_width: 8 : i32 out_channels: 64 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 8 : i32 stride_width: 8 : i32 | tensor<[1,1,300,64,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 300 + d1 * 20 + d2, d3), memory_config: (300, 64, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,16384,64,bf16]> tensor<[128,64,3,3,bf16]> tensor<[1,1,16384,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 16384 + d2, d3), memory_config: (512, 2, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 192 + d1 * 3 + d2, d3), memory_config: (24576, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 128 + d2, d3), memory_config: (16384, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 64 : i32 input_height: 128 : i32 input_width: 128 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 128 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,16384,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 128 + d2, d3), memory_config: (16384, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,16384,64,bf16]> tensor<[128,64,3,3,bf16]> tensor<[1,1,4096,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 16384 + d2, d3), memory_config: (512, 2, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 192 + d1 * 3 + d2, d3), memory_config: (24576, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (4096, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 64 : i32 input_height: 128 : i32 input_width: 128 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 128 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,4096,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (4096, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,16384,64,bf16]> tensor<[32,64,1,1,bf16]> tensor<[1,1,16384,32,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 16384 + d2, d3), memory_config: (512, 2, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 + d2, d3), memory_config: (2048, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 128 + d2, d3), memory_config: (16384, 32, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 64 : i32 input_height: 128 : i32 input_width: 128 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 32 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,16384,32,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 128 + d2, d3), memory_config: (16384, 32, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,16384,64,bf16]> tensor<[64,64,1,1,bf16]> tensor<[1,1,16384,64,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 16384 + d2, d3), memory_config: (512, 2, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 + d2, d3), memory_config: (4096, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 128 + d2, d3), memory_config: (16384, 64, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 64 : i32 input_height: 128 : i32 input_width: 128 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 64 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,16384,64,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 128 + d2, d3), memory_config: (16384, 64, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,16384,64,bf16]> tensor<[64,64,3,3,bf16]> tensor<[1,1,16384,64,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 16384 + d2, d3), memory_config: (512, 2, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 192 + d1 * 3 + d2, d3), memory_config: (12288, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 128 + d2, d3), memory_config: (16384, 64, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 64 : i32 input_height: 128 : i32 input_width: 128 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 64 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,16384,64,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 128 + d2, d3), memory_config: (16384, 64, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,21609,64,bf16]> tensor<[96,64,3,3,bf16]> tensor<[1,1,5329,96,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 21609 + d1 * 21609 + d2, d3), memory_config: (676, 2, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 192 + d1 * 3 + d2, d3), memory_config: (18432, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5329 + d1 * 73 + d2, d3), memory_config: (5329, 96, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 64 : i32 input_height: 147 : i32 input_width: 147 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 96 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,5329,96,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5329 + d1 * 73 + d2, d3), memory_config: (5329, 96, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,64,bf16]> tensor<[384,64,1,1,bf16]> tensor<[1,1,196,384,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 2, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 + d2, d3), memory_config: (24576, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 384, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 64 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 384 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,384,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 384, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,22500,64,bf16]> tensor<[128,64,1,1,bf16]> tensor<[1,1,22500,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 22500 + d1 * 22500 + d2, d3), memory_config: (704, 2, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 + d2, d3), memory_config: (8192, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 22500 + d1 * 150 + d2, d3), memory_config: (22500, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 64 : i32 input_height: 150 : i32 input_width: 150 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,22500,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 22500 + d1 * 150 + d2, d3), memory_config: (22500, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,22500,64,bf16]> tensor<[128,64,1,1,bf16]> tensor<[1,1,5625,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 22500 + d1 * 22500 + d2, d3), memory_config: (704, 2, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 + d2, d3), memory_config: (8192, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5625 + d1 * 75 + d2, d3), memory_config: (5625, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 64 : i32 input_height: 150 : i32 input_width: 150 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,5625,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5625 + d1 * 75 + d2, d3), memory_config: (5625, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,22500,64,bf16]> tensor<[64,1,3,3,bf16]> tensor<[1,1,22500,64,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 22500 + d1 * 22500 + d2, d3), memory_config: (704, 2, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (192, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 22500 + d1 * 150 + d2, d3), memory_config: (22500, 64, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 64 : i32 in_channels: 64 : i32 input_height: 150 : i32 input_width: 150 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 64 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,22500,64,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 22500 + d1 * 150 + d2, d3), memory_config: (22500, 64, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,25600,64,f32]> tensor<[64,1,3,3,f32]> tensor<[1,1,6400,64,f32]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 25600 + d1 * 25600 + d2, d3), memory_config: (800, 2, 'tile<32x32, f32>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (192, 3, 'f32', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 6400 + d1 * 80 + d2, d3), memory_config: (6400, 64, 'f32', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 64 : i32 in_channels: 64 : i32 input_height: 160 : i32 input_width: 160 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 64 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,6400,64,f32]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 6400 + d1 * 80 + d2, d3), memory_config: (6400, 64, 'f32', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,57600,64,bf16]> tensor<[256,64,1,1,bf16]> tensor<[1,1,57600,256,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 57600 + d1 * 57600 + d2, d3), memory_config: (1800, 2, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 + d2, d3), memory_config: (16384, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 57600 + d1 * 320 + d2, d3), memory_config: (57600, 256, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 64 : i32 input_height: 180 : i32 input_width: 320 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 256 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,57600,256,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 57600 + d1 * 320 + d2, d3), memory_config: (57600, 256, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,57600,64,bf16]> tensor<[64,64,1,1,bf16]> tensor<[1,1,57600,64,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 57600 + d1 * 57600 + d2, d3), memory_config: (1800, 2, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 + d2, d3), memory_config: (4096, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 57600 + d1 * 320 + d2, d3), memory_config: (57600, 64, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 64 : i32 input_height: 180 : i32 input_width: 320 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 64 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,57600,64,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 57600 + d1 * 320 + d2, d3), memory_config: (57600, 64, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,57600,64,bf16]> tensor<[64,64,3,3,bf16]> tensor<[1,1,57600,64,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 57600 + d1 * 57600 + d2, d3), memory_config: (1800, 2, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 192 + d1 * 3 + d2, d3), memory_config: (12288, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 57600 + d1 * 320 + d2, d3), memory_config: (57600, 64, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 64 : i32 input_height: 180 : i32 input_width: 320 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 64 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,57600,64,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 57600 + d1 * 320 + d2, d3), memory_config: (57600, 64, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1,64,f32]> tensor<[128,64,1,1,f32]> tensor<[1,1,1,128,f32]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 2, 'tile<32x32, f32>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 + d2, d3), memory_config: (8192, 1, 'f32', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 128, 'f32', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 64 : i32 input_height: 1 : i32 input_width: 1 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,1,128,f32]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 128, 'f32', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,50176,64,bf16]> tensor<[1,64,1,1,bf16]> tensor<[1,1,50176,1,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 50176 + d1 * 50176 + d2, d3), memory_config: (1568, 2, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 + d2, d3), memory_config: (64, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 50176 + d1 * 224 + d2, d3), memory_config: (50176, 1, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 64 : i32 input_height: 224 : i32 input_width: 224 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 1 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,50176,1,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 50176 + d1 * 224 + d2, d3), memory_config: (50176, 1, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,50176,64,bf16]> tensor<[64,64,3,3,bf16]> tensor<[1,1,50176,64,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 50176 + d1 * 50176 + d2, d3), memory_config: (1568, 2, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 192 + d1 * 3 + d2, d3), memory_config: (12288, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 50176 + d1 * 224 + d2, d3), memory_config: (50176, 64, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 64 : i32 input_height: 224 : i32 input_width: 224 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 64 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,50176,64,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 50176 + d1 * 224 + d2, d3), memory_config: (50176, 64, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,50176,64,bf16]> tensor<[64,64,3,3,bf16]> tensor<[1,1,50176,64,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 50176 + d1 * 50176 + d2, d3), memory_config: (1568, 2, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 192 + d1 * 3 + d2, d3), memory_config: (12288, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 50176 + d1 * 224 + d2, d3), memory_config: (50176, 64, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 64 : i32 input_height: 224 : i32 input_width: 224 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 64 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,50176,64,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 50176 + d1 * 224 + d2, d3), memory_config: (50176, 64, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,65536,64,bf16]> tensor<[128,64,3,3,bf16]> tensor<[1,1,16384,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 65536 + d1 * 65536 + d2, d3), memory_config: (2048, 2, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 192 + d1 * 3 + d2, d3), memory_config: (24576, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 128 + d2, d3), memory_config: (16384, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 64 : i32 input_height: 256 : i32 input_width: 256 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 128 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,16384,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 128 + d2, d3), memory_config: (16384, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,65536,64,bf16]> tensor<[32,64,1,1,bf16]> tensor<[1,1,65536,32,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 65536 + d1 * 65536 + d2, d3), memory_config: (2048, 2, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 + d2, d3), memory_config: (2048, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 65536 + d1 * 256 + d2, d3), memory_config: (65536, 32, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 64 : i32 input_height: 256 : i32 input_width: 256 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 32 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,65536,32,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 65536 + d1 * 256 + d2, d3), memory_config: (65536, 32, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,65536,64,bf16]> tensor<[32,64,3,3,bf16]> tensor<[1,1,65536,32,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 65536 + d1 * 65536 + d2, d3), memory_config: (2048, 2, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 192 + d1 * 3 + d2, d3), memory_config: (6144, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 65536 + d1 * 256 + d2, d3), memory_config: (65536, 32, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 64 : i32 input_height: 256 : i32 input_width: 256 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 32 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,65536,32,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 65536 + d1 * 256 + d2, d3), memory_config: (65536, 32, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,64,bf16]> tensor<[128,64,1,1,bf16]> tensor<[1,1,784,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 2, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 + d2, d3), memory_config: (8192, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 64 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,64,bf16]> tensor<[256,64,1,1,bf16]> tensor<[1,1,784,256,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 2, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 + d2, d3), memory_config: (16384, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 256, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 64 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 256 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,256,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 256, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,64,bf16]> tensor<[64,64,3,3,bf16]> tensor<[1,1,784,64,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 2, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 192 + d1 * 3 + d2, d3), memory_config: (12288, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 64, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 64 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 64 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,64,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 64, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,4,64,f32]> tensor<[64,1,3,3,f32]> tensor<[1,1,1,64,f32]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4 + d1 * 4 + d2, d3), memory_config: (1, 2, 'tile<32x32, f32>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (192, 3, 'f32', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 64, 'f32', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 64 : i32 in_channels: 64 : i32 input_height: 2 : i32 input_width: 2 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 64 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,1,64,f32]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 64, 'f32', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1200,64,bf16]> tensor<[32,64,3,3,bf16]> tensor<[1,1,1200,32,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1200 + d1 * 1200 + d2, d3), memory_config: (38, 2, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 192 + d1 * 3 + d2, d3), memory_config: (6144, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1200 + d1 * 40 + d2, d3), memory_config: (1200, 32, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 64 : i32 input_height: 30 : i32 input_width: 40 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 32 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,1200,32,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1200 + d1 * 40 + d2, d3), memory_config: (1200, 32, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1225,64,bf16]> tensor<[96,64,3,3,bf16]> tensor<[1,1,1225,96,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1225 + d1 * 1225 + d2, d3), memory_config: (39, 2, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 192 + d1 * 3 + d2, d3), memory_config: (18432, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1225 + d1 * 35 + d2, d3), memory_config: (1225, 96, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 64 : i32 input_height: 35 : i32 input_width: 35 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 96 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,1225,96,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1225 + d1 * 35 + d2, d3), memory_config: (1225, 96, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,307200,64,bf16]> tensor<[1,64,3,3,bf16]> tensor<[1,1,307200,1,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 307200 + d1 * 307200 + d2, d3), memory_config: (9600, 2, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 192 + d1 * 3 + d2, d3), memory_config: (192, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 307200 + d1 * 640 + d2, d3), memory_config: (307200, 1, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 64 : i32 input_height: 480 : i32 input_width: 640 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 1 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,307200,1,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 307200 + d1 * 640 + d2, d3), memory_config: (307200, 1, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,307200,64,bf16]> tensor<[64,64,3,3,bf16]> tensor<[1,1,307200,64,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 307200 + d1 * 307200 + d2, d3), memory_config: (9600, 2, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 192 + d1 * 3 + d2, d3), memory_config: (12288, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 307200 + d1 * 640 + d2, d3), memory_config: (307200, 64, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 64 : i32 input_height: 480 : i32 input_width: 640 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 64 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,307200,64,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 307200 + d1 * 640 + d2, d3), memory_config: (307200, 64, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,3136,64,bf16]> tensor<[128,64,1,1,bf16]> tensor<[1,1,3136,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 3136 + d2, d3), memory_config: (98, 2, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 + d2, d3), memory_config: (8192, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 64 : i32 input_height: 56 : i32 input_width: 56 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,3136,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,3136,64,bf16]> tensor<[128,64,1,1,bf16]> tensor<[1,1,784,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 3136 + d2, d3), memory_config: (98, 2, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 + d2, d3), memory_config: (8192, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 64 : i32 input_height: 56 : i32 input_width: 56 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,784,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,3136,64,bf16]> tensor<[128,64,3,3,bf16]> tensor<[1,1,784,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 3136 + d2, d3), memory_config: (98, 2, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 192 + d1 * 3 + d2, d3), memory_config: (24576, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 64 : i32 input_height: 56 : i32 input_width: 56 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 128 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,784,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,3136,64,bf16]> tensor<[14,64,3,3,bf16]> tensor<[1,1,3136,14,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 3136 + d2, d3), memory_config: (98, 2, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 192 + d1 * 3 + d2, d3), memory_config: (2688, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 14, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 64 : i32 input_height: 56 : i32 input_width: 56 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 14 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,3136,14,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 14, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,3136,64,bf16]> tensor<[192,64,3,3,bf16]> tensor<[1,1,3136,192,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 3136 + d2, d3), memory_config: (98, 2, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 192 + d1 * 3 + d2, d3), memory_config: (36864, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 192, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 64 : i32 input_height: 56 : i32 input_width: 56 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 192 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,3136,192,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 192, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,3136,64,bf16]> tensor<[24,64,1,1,bf16]> tensor<[1,1,3136,24,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 3136 + d2, d3), memory_config: (98, 2, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 + d2, d3), memory_config: (1536, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 24, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 64 : i32 input_height: 56 : i32 input_width: 56 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 24 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,3136,24,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 24, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,3136,64,bf16]> tensor<[256,64,1,1,bf16]> tensor<[1,1,3136,256,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 3136 + d2, d3), memory_config: (98, 2, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 + d2, d3), memory_config: (16384, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 256, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 64 : i32 input_height: 56 : i32 input_width: 56 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 256 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,3136,256,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 256, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,3136,64,bf16]> tensor<[64,64,1,1,bf16]> tensor<[1,1,3136,64,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 3136 + d2, d3), memory_config: (98, 2, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 + d2, d3), memory_config: (4096, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 64, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 64 : i32 input_height: 56 : i32 input_width: 56 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 64 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,3136,64,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 64, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,3136,64,bf16]> tensor<[64,64,3,3,bf16]> tensor<[1,1,3136,64,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 3136 + d2, d3), memory_config: (98, 2, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 192 + d1 * 3 + d2, d3), memory_config: (12288, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 64, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 64 : i32 input_height: 56 : i32 input_width: 56 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 64 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,3136,64,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 64, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,4800,64,bf16]> tensor<[32,64,3,3,bf16]> tensor<[1,1,4800,32,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4800 + d1 * 4800 + d2, d3), memory_config: (150, 2, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 192 + d1 * 3 + d2, d3), memory_config: (6144, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4800 + d1 * 80 + d2, d3), memory_config: (4800, 32, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 64 : i32 input_height: 60 : i32 input_width: 80 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 32 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,4800,32,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4800 + d1 * 80 + d2, d3), memory_config: (4800, 32, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,4096,64,bf16]> tensor<[128,64,3,3,bf16]> tensor<[1,1,4096,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 4096 + d2, d3), memory_config: (128, 2, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 192 + d1 * 3 + d2, d3), memory_config: (24576, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (4096, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 64 : i32 input_height: 64 : i32 input_width: 64 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 128 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,4096,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (4096, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,4096,64,bf16]> tensor<[160,64,3,3,bf16]> tensor<[1,1,1024,160,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 4096 + d2, d3), memory_config: (128, 2, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 192 + d1 * 3 + d2, d3), memory_config: (30720, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 160, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 64 : i32 input_height: 64 : i32 input_width: 64 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 160 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,1024,160,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 160, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,4096,64,bf16]> tensor<[64,64,1,1,bf16]> tensor<[1,1,4096,64,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 4096 + d2, d3), memory_config: (128, 2, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 + d2, d3), memory_config: (4096, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (4096, 64, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 64 : i32 input_height: 64 : i32 input_width: 64 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 64 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,4096,64,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (4096, 64, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,4096,64,bf16]> tensor<[64,64,3,3,bf16]> tensor<[1,1,4096,64,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 4096 + d2, d3), memory_config: (128, 2, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 192 + d1 * 3 + d2, d3), memory_config: (12288, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (4096, 64, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 64 : i32 input_height: 64 : i32 input_width: 64 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 64 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,4096,64,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (4096, 64, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,4096,64,bf16]> tensor<[64,64,4,4,bf16]> tensor<[1,1,256,64,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 4096 + d2, d3), memory_config: (128, 2, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 4 + d2, d3), memory_config: (16384, 4, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (256, 64, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 64 : i32 input_height: 64 : i32 input_width: 64 : i32 kernel_height: 4 : i32 kernel_width: 4 : i32 out_channels: 64 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 4 : i32 stride_width: 4 : i32 | tensor<[1,1,256,64,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (256, 64, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,5329,64,bf16]> tensor<[64,64,1,7,bf16]> tensor<[1,1,5329,64,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5329 + d1 * 5329 + d2, d3), memory_config: (167, 2, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 + d2, d3), memory_config: (4096, 7, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5329 + d1 * 73 + d2, d3), memory_config: (5329, 64, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 64 : i32 input_height: 73 : i32 input_width: 73 : i32 kernel_height: 1 : i32 kernel_width: 7 : i32 out_channels: 64 : i32 padding_height: 0 : i32 padding_width: 3 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,5329,64,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5329 + d1 * 73 + d2, d3), memory_config: (5329, 64, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,5329,64,bf16]> tensor<[64,64,7,1,bf16]> tensor<[1,1,5329,64,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5329 + d1 * 5329 + d2, d3), memory_config: (167, 2, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 448 + d1 * 7 + d2, d3), memory_config: (28672, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5329 + d1 * 73 + d2, d3), memory_config: (5329, 64, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 64 : i32 input_height: 73 : i32 input_width: 73 : i32 kernel_height: 7 : i32 kernel_width: 1 : i32 out_channels: 64 : i32 padding_height: 3 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,5329,64,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5329 + d1 * 73 + d2, d3), memory_config: (5329, 64, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,5329,64,bf16]> tensor<[96,64,3,3,bf16]> tensor<[1,1,5041,96,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5329 + d1 * 5329 + d2, d3), memory_config: (167, 2, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 192 + d1 * 3 + d2, d3), memory_config: (18432, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5041 + d1 * 71 + d2, d3), memory_config: (5041, 96, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 64 : i32 input_height: 73 : i32 input_width: 73 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 96 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,5041,96,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5041 + d1 * 71 + d2, d3), memory_config: (5041, 96, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,6400,64,f32]> tensor<[24,64,1,1,f32]> tensor<[1,1,6400,24,f32]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 6400 + d1 * 6400 + d2, d3), memory_config: (200, 2, 'tile<32x32, f32>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 + d2, d3), memory_config: (1536, 1, 'f32', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 6400 + d1 * 80 + d2, d3), memory_config: (6400, 24, 'f32', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 64 : i32 input_height: 80 : i32 input_width: 80 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 24 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,6400,24,f32]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 6400 + d1 * 80 + d2, d3), memory_config: (6400, 24, 'f32', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,654,bf16]> tensor<[640,654,1,1,bf16]> tensor<[1,1,196,640,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 21, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 654 + d1 + d2, d3), memory_config: (418560, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 640, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 654 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 640 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,640,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 640, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,100,672,f32]> tensor<[80,672,1,1,f32]> tensor<[1,1,100,80,f32]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 100 + d2, d3), memory_config: (4, 21, 'tile<32x32, f32>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 672 + d1 + d2, d3), memory_config: (53760, 1, 'f32', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (100, 80, 'f32', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 672 : i32 input_height: 10 : i32 input_width: 10 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 80 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,100,80,f32]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (100, 80, 'f32', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,672,bf16]> tensor<[112,672,1,1,bf16]> tensor<[1,1,196,112,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 21, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 672 + d1 + d2, d3), memory_config: (75264, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 112, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 672 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 112 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,112,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 112, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,672,bf16]> tensor<[128,672,1,1,bf16]> tensor<[1,1,196,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 21, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 672 + d1 + d2, d3), memory_config: (86016, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 672 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,672,bf16]> tensor<[56,672,1,1,bf16]> tensor<[1,1,196,56,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 21, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 672 + d1 + d2, d3), memory_config: (37632, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 56, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 672 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 56 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,56,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 56, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,672,bf16]> tensor<[672,1,3,3,bf16]> tensor<[1,1,196,672,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 21, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (2016, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 672, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 672 : i32 in_channels: 672 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 672 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,672,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 672, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,672,bf16]> tensor<[672,1,5,5,bf16]> tensor<[1,1,196,672,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 21, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5 + d1 * 5 + d2, d3), memory_config: (3360, 5, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 672, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 672 : i32 in_channels: 672 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 5 : i32 kernel_width: 5 : i32 out_channels: 672 : i32 padding_height: 2 : i32 padding_width: 2 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,672,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 672, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,672,bf16]> tensor<[672,1,5,5,bf16]> tensor<[1,1,49,672,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 21, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5 + d1 * 5 + d2, d3), memory_config: (3360, 5, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 672, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 672 : i32 in_channels: 672 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 5 : i32 kernel_width: 5 : i32 out_channels: 672 : i32 padding_height: 2 : i32 padding_width: 2 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,49,672,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 672, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,225,672,bf16]> tensor<[112,672,1,1,bf16]> tensor<[1,1,225,112,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 225 + d1 * 225 + d2, d3), memory_config: (8, 21, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 672 + d1 + d2, d3), memory_config: (75264, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 225 + d1 * 15 + d2, d3), memory_config: (225, 112, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 672 : i32 input_height: 15 : i32 input_width: 15 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 112 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,225,112,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 225 + d1 * 15 + d2, d3), memory_config: (225, 112, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,225,672,bf16]> tensor<[672,1,5,5,bf16]> tensor<[1,1,225,672,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 225 + d1 * 225 + d2, d3), memory_config: (8, 21, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5 + d1 * 5 + d2, d3), memory_config: (3360, 5, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 225 + d1 * 15 + d2, d3), memory_config: (225, 672, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 672 : i32 in_channels: 672 : i32 input_height: 15 : i32 input_width: 15 : i32 kernel_height: 5 : i32 kernel_width: 5 : i32 out_channels: 672 : i32 padding_height: 2 : i32 padding_width: 2 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,225,672,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 225 + d1 * 15 + d2, d3), memory_config: (225, 672, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,289,672,bf16]> tensor<[672,1,5,5,bf16]> tensor<[1,1,49,672,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 289 + d2, d3), memory_config: (10, 21, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5 + d1 * 5 + d2, d3), memory_config: (3360, 5, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 672, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 672 : i32 in_channels: 672 : i32 input_height: 17 : i32 input_width: 17 : i32 kernel_height: 5 : i32 kernel_width: 5 : i32 out_channels: 672 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,49,672,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 672, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,361,672,bf16]> tensor<[672,1,5,5,bf16]> tensor<[1,1,64,672,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 361 + d1 * 361 + d2, d3), memory_config: (12, 21, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5 + d1 * 5 + d2, d3), memory_config: (3360, 5, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 8 + d2, d3), memory_config: (64, 672, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 672 : i32 in_channels: 672 : i32 input_height: 19 : i32 input_width: 19 : i32 kernel_height: 5 : i32 kernel_width: 5 : i32 out_channels: 672 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,64,672,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 8 + d2, d3), memory_config: (64, 672, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1,672,bf16]> tensor<[168,672,1,1,bf16]> tensor<[1,1,1,168,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 21, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 672 + d1 + d2, d3), memory_config: (112896, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 168, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 672 : i32 input_height: 1 : i32 input_width: 1 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 168 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,1,168,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 168, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,400,672,f32]> tensor<[112,672,1,1,f32]> tensor<[1,1,400,112,f32]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 400 + d1 * 400 + d2, d3), memory_config: (13, 21, 'tile<32x32, f32>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 672 + d1 + d2, d3), memory_config: (75264, 1, 'f32', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 400 + d1 * 20 + d2, d3), memory_config: (400, 112, 'f32', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 672 : i32 input_height: 20 : i32 input_width: 20 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 112 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,400,112,f32]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 400 + d1 * 20 + d2, d3), memory_config: (400, 112, 'f32', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,400,672,f32]> tensor<[24,672,1,1,f32]> tensor<[1,1,400,24,f32]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 400 + d1 * 400 + d2, d3), memory_config: (13, 21, 'tile<32x32, f32>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 672 + d1 + d2, d3), memory_config: (16128, 1, 'f32', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 400 + d1 * 20 + d2, d3), memory_config: (400, 24, 'f32', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 672 : i32 input_height: 20 : i32 input_width: 20 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 24 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,400,24,f32]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 400 + d1 * 20 + d2, d3), memory_config: (400, 24, 'f32', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,400,672,f32]> tensor<[546,672,1,1,f32]> tensor<[1,1,400,546,f32]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 400 + d1 * 400 + d2, d3), memory_config: (13, 21, 'tile<32x32, f32>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 672 + d1 + d2, d3), memory_config: (366912, 1, 'f32', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 400 + d1 * 20 + d2, d3), memory_config: (400, 546, 'f32', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 672 : i32 input_height: 20 : i32 input_width: 20 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 546 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,400,546,f32]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 400 + d1 * 20 + d2, d3), memory_config: (400, 546, 'f32', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,400,672,f32]> tensor<[672,1,3,3,f32]> tensor<[1,1,400,672,f32]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 400 + d1 * 400 + d2, d3), memory_config: (13, 21, 'tile<32x32, f32>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (2016, 3, 'f32', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 400 + d1 * 20 + d2, d3), memory_config: (400, 672, 'f32', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 672 : i32 in_channels: 672 : i32 input_height: 20 : i32 input_width: 20 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 672 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,400,672,f32]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 400 + d1 * 20 + d2, d3), memory_config: (400, 672, 'f32', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,400,672,f32]> tensor<[672,1,5,5,f32]> tensor<[1,1,100,672,f32]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 400 + d1 * 400 + d2, d3), memory_config: (13, 21, 'tile<32x32, f32>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5 + d1 * 5 + d2, d3), memory_config: (3360, 5, 'f32', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (100, 672, 'f32', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 672 : i32 in_channels: 672 : i32 input_height: 20 : i32 input_width: 20 : i32 kernel_height: 5 : i32 kernel_width: 5 : i32 out_channels: 672 : i32 padding_height: 2 : i32 padding_width: 2 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,100,672,f32]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (100, 672, 'f32', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,576,672,bf16]> tensor<[112,672,1,1,bf16]> tensor<[1,1,576,112,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 576 + d1 * 576 + d2, d3), memory_config: (18, 21, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 672 + d1 + d2, d3), memory_config: (75264, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 576 + d1 * 24 + d2, d3), memory_config: (576, 112, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 672 : i32 input_height: 24 : i32 input_width: 24 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 112 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,576,112,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 576 + d1 * 24 + d2, d3), memory_config: (576, 112, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,576,672,bf16]> tensor<[160,672,1,1,bf16]> tensor<[1,1,576,160,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 576 + d1 * 576 + d2, d3), memory_config: (18, 21, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 672 + d1 + d2, d3), memory_config: (107520, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 576 + d1 * 24 + d2, d3), memory_config: (576, 160, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 672 : i32 input_height: 24 : i32 input_width: 24 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 160 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,576,160,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 576 + d1 * 24 + d2, d3), memory_config: (576, 160, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,576,672,bf16]> tensor<[672,1,3,3,bf16]> tensor<[1,1,576,672,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 576 + d1 * 576 + d2, d3), memory_config: (18, 21, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (2016, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 576 + d1 * 24 + d2, d3), memory_config: (576, 672, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 672 : i32 in_channels: 672 : i32 input_height: 24 : i32 input_width: 24 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 672 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,576,672,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 576 + d1 * 24 + d2, d3), memory_config: (576, 672, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,576,672,bf16]> tensor<[672,1,5,5,bf16]> tensor<[1,1,576,672,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 576 + d1 * 576 + d2, d3), memory_config: (18, 21, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5 + d1 * 5 + d2, d3), memory_config: (3360, 5, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 576 + d1 * 24 + d2, d3), memory_config: (576, 672, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 672 : i32 in_channels: 672 : i32 input_height: 24 : i32 input_width: 24 : i32 kernel_height: 5 : i32 kernel_width: 5 : i32 out_channels: 672 : i32 padding_height: 2 : i32 padding_width: 2 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,576,672,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 576 + d1 * 24 + d2, d3), memory_config: (576, 672, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,672,bf16]> tensor<[1344,672,1,1,bf16]> tensor<[1,1,784,1344,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 21, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 672 + d1 + d2, d3), memory_config: (903168, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 1344, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 672 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 1344 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,1344,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 1344, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,672,bf16]> tensor<[1344,672,1,1,bf16]> tensor<[1,1,196,1344,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 21, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 672 + d1 + d2, d3), memory_config: (903168, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 1344, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 672 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 1344 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,196,1344,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 1344, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,672,bf16]> tensor<[672,168,3,3,bf16]> tensor<[1,1,784,672,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 21, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 504 + d1 * 3 + d2, d3), memory_config: (338688, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 672, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 4 : i32 in_channels: 672 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 672 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,672,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 672, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,672,bf16]> tensor<[672,672,1,1,bf16]> tensor<[1,1,784,672,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 21, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 672 + d1 + d2, d3), memory_config: (451584, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 672, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 672 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 672 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,672,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 672, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,3136,672,bf16]> tensor<[672,168,3,3,bf16]> tensor<[1,1,784,672,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 3136 + d2, d3), memory_config: (98, 21, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 504 + d1 * 3 + d2, d3), memory_config: (338688, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 672, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 4 : i32 in_channels: 672 : i32 input_height: 56 : i32 input_width: 56 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 672 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,784,672,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 672, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,672,bf16]> tensor<[160,672,1,1,bf16]> tensor<[1,1,49,160,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 21, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 672 + d1 + d2, d3), memory_config: (107520, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 160, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 672 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 160 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,160,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 160, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,672,bf16]> tensor<[192,672,1,1,bf16]> tensor<[1,1,49,192,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 21, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 672 + d1 + d2, d3), memory_config: (129024, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 192, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 672 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 192 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,192,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 192, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,672,bf16]> tensor<[672,1,1,5,bf16]> tensor<[1,1,49,672,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 21, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (672, 5, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 672, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 672 : i32 in_channels: 672 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 1 : i32 kernel_width: 5 : i32 out_channels: 672 : i32 padding_height: 0 : i32 padding_width: 2 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,672,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 672, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,672,bf16]> tensor<[672,1,5,1,bf16]> tensor<[1,1,49,672,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 21, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5 + d1 * 5 + d2, d3), memory_config: (3360, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 672, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 672 : i32 in_channels: 672 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 5 : i32 kernel_width: 1 : i32 out_channels: 672 : i32 padding_height: 2 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,672,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 672, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,672,bf16]> tensor<[80,672,1,1,bf16]> tensor<[1,1,49,80,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 21, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 672 + d1 + d2, d3), memory_config: (53760, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 80, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 672 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 80 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,80,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 80, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,64,672,bf16]> tensor<[192,672,1,1,bf16]> tensor<[1,1,64,192,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 64 + d2, d3), memory_config: (2, 21, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 672 + d1 + d2, d3), memory_config: (129024, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 8 + d2, d3), memory_config: (64, 192, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 672 : i32 input_height: 8 : i32 input_width: 8 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 192 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,64,192,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 8 + d2, d3), memory_config: (64, 192, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,68,bf16]> tensor<[40,68,3,3,bf16]> tensor<[1,1,196,40,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 3, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 204 + d1 * 3 + d2, d3), memory_config: (8160, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 40, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 68 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 40 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,40,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 40, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1,696,bf16]> tensor<[174,696,1,1,bf16]> tensor<[1,1,1,174,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 22, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 696 + d1 + d2, d3), memory_config: (121104, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 174, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 696 : i32 input_height: 1 : i32 input_width: 1 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 174 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,1,174,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 174, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1,696,bf16]> tensor<[58,696,1,1,bf16]> tensor<[1,1,1,58,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 22, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 696 + d1 + d2, d3), memory_config: (40368, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 58, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 696 : i32 input_height: 1 : i32 input_width: 1 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 58 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,1,58,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 58, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,696,bf16]> tensor<[1392,696,1,1,bf16]> tensor<[1,1,784,1392,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 22, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 696 + d1 + d2, d3), memory_config: (968832, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 1392, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 696 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 1392 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,1392,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 1392, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,696,bf16]> tensor<[1392,696,1,1,bf16]> tensor<[1,1,196,1392,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 22, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 696 + d1 + d2, d3), memory_config: (968832, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 1392, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 696 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 1392 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,196,1392,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 1392, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,696,bf16]> tensor<[696,232,3,3,bf16]> tensor<[1,1,784,696,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 22, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 696 + d1 * 3 + d2, d3), memory_config: (484416, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 696, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 3 : i32 in_channels: 696 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 696 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,696,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 696, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,696,bf16]> tensor<[696,696,1,1,bf16]> tensor<[1,1,784,696,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 22, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 696 + d1 + d2, d3), memory_config: (484416, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 696, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 696 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 696 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,696,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 696, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,3136,696,bf16]> tensor<[696,232,3,3,bf16]> tensor<[1,1,784,696,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 3136 + d2, d3), memory_config: (98, 22, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 696 + d1 * 3 + d2, d3), memory_config: (484416, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 696, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 3 : i32 in_channels: 696 : i32 input_height: 56 : i32 input_width: 56 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 696 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,784,696,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 696, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,704,bf16]> tensor<[128,704,1,1,bf16]> tensor<[1,1,196,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 22, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 704 + d1 + d2, d3), memory_config: (90112, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 704 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,289,720,bf16]> tensor<[120,720,1,1,bf16]> tensor<[1,1,289,120,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 289 + d2, d3), memory_config: (10, 23, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 720 + d1 + d2, d3), memory_config: (86400, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 17 + d2, d3), memory_config: (289, 120, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 720 : i32 input_height: 17 : i32 input_width: 17 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 120 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,289,120,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 17 + d2, d3), memory_config: (289, 120, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,289,720,bf16]> tensor<[720,1,5,5,bf16]> tensor<[1,1,289,720,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 289 + d2, d3), memory_config: (10, 23, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5 + d1 * 5 + d2, d3), memory_config: (3600, 5, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 17 + d2, d3), memory_config: (289, 720, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 720 : i32 in_channels: 720 : i32 input_height: 17 : i32 input_width: 17 : i32 kernel_height: 5 : i32 kernel_width: 5 : i32 out_channels: 720 : i32 padding_height: 2 : i32 padding_width: 2 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,289,720,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 17 + d2, d3), memory_config: (289, 720, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,441,720,bf16]> tensor<[720,1,5,5,bf16]> tensor<[1,1,81,720,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 441 + d1 * 441 + d2, d3), memory_config: (14, 23, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5 + d1 * 5 + d2, d3), memory_config: (3600, 5, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 81 + d1 * 9 + d2, d3), memory_config: (81, 720, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 720 : i32 in_channels: 720 : i32 input_height: 21 : i32 input_width: 21 : i32 kernel_height: 5 : i32 kernel_width: 5 : i32 out_channels: 720 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,81,720,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 81 + d1 * 9 + d2, d3), memory_config: (81, 720, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,81,720,bf16]> tensor<[208,720,1,1,bf16]> tensor<[1,1,81,208,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 81 + d1 * 81 + d2, d3), memory_config: (3, 23, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 720 + d1 + d2, d3), memory_config: (149760, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 81 + d1 * 9 + d2, d3), memory_config: (81, 208, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 720 : i32 input_height: 9 : i32 input_width: 9 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 208 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,81,208,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 81 + d1 * 9 + d2, d3), memory_config: (81, 208, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,361,728,bf16]> tensor<[1024,728,1,1,bf16]> tensor<[1,1,361,1024,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 361 + d1 * 361 + d2, d3), memory_config: (12, 23, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 728 + d1 + d2, d3), memory_config: (745472, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 361 + d1 * 19 + d2, d3), memory_config: (361, 1024, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 728 : i32 input_height: 19 : i32 input_width: 19 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 1024 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,361,1024,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 361 + d1 * 19 + d2, d3), memory_config: (361, 1024, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,361,728,bf16]> tensor<[1024,728,1,1,bf16]> tensor<[1,1,100,1024,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 361 + d1 * 361 + d2, d3), memory_config: (12, 23, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 728 + d1 + d2, d3), memory_config: (745472, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (100, 1024, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 728 : i32 input_height: 19 : i32 input_width: 19 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 1024 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,100,1024,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (100, 1024, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,361,728,bf16]> tensor<[728,1,3,3,bf16]> tensor<[1,1,361,728,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 361 + d1 * 361 + d2, d3), memory_config: (12, 23, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (2184, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 361 + d1 * 19 + d2, d3), memory_config: (361, 728, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 728 : i32 in_channels: 728 : i32 input_height: 19 : i32 input_width: 19 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 728 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,361,728,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 361 + d1 * 19 + d2, d3), memory_config: (361, 728, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,361,728,bf16]> tensor<[728,728,1,1,bf16]> tensor<[1,1,361,728,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 361 + d1 * 361 + d2, d3), memory_config: (12, 23, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 728 + d1 + d2, d3), memory_config: (529984, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 361 + d1 * 19 + d2, d3), memory_config: (361, 728, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 728 : i32 input_height: 19 : i32 input_width: 19 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 728 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,361,728,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 361 + d1 * 19 + d2, d3), memory_config: (361, 728, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1444,728,bf16]> tensor<[728,1,3,3,bf16]> tensor<[1,1,1444,728,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1444 + d1 * 1444 + d2, d3), memory_config: (46, 23, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (2184, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1444 + d1 * 38 + d2, d3), memory_config: (1444, 728, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 728 : i32 in_channels: 728 : i32 input_height: 38 : i32 input_width: 38 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 728 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,1444,728,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1444 + d1 * 38 + d2, d3), memory_config: (1444, 728, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1444,728,bf16]> tensor<[728,1,3,3,bf16]> tensor<[1,1,361,728,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1444 + d1 * 1444 + d2, d3), memory_config: (46, 23, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (2184, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 361 + d1 * 19 + d2, d3), memory_config: (361, 728, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 728 : i32 in_channels: 728 : i32 input_height: 38 : i32 input_width: 38 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 728 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,361,728,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 361 + d1 * 19 + d2, d3), memory_config: (361, 728, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1444,728,bf16]> tensor<[728,728,1,1,bf16]> tensor<[1,1,1444,728,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1444 + d1 * 1444 + d2, d3), memory_config: (46, 23, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 728 + d1 + d2, d3), memory_config: (529984, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1444 + d1 * 38 + d2, d3), memory_config: (1444, 728, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 728 : i32 input_height: 38 : i32 input_width: 38 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 728 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,1444,728,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1444 + d1 * 38 + d2, d3), memory_config: (1444, 728, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1444,728,bf16]> tensor<[728,728,1,1,bf16]> tensor<[1,1,361,728,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1444 + d1 * 1444 + d2, d3), memory_config: (46, 23, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 728 + d1 + d2, d3), memory_config: (529984, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 361 + d1 * 19 + d2, d3), memory_config: (361, 728, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 728 : i32 input_height: 38 : i32 input_width: 38 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 728 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,361,728,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 361 + d1 * 19 + d2, d3), memory_config: (361, 728, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,72,bf16]> tensor<[128,72,1,1,bf16]> tensor<[1,1,196,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 3, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 72 + d1 + d2, d3), memory_config: (9216, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 72 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,72,bf16]> tensor<[144,72,3,3,bf16]> tensor<[1,1,49,144,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 3, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 216 + d1 * 3 + d2, d3), memory_config: (31104, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 144, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 72 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 144 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,49,144,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 144, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,72,bf16]> tensor<[18,72,1,1,bf16]> tensor<[1,1,196,18,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 3, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 72 + d1 + d2, d3), memory_config: (1296, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 18, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 72 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 18 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,18,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 18, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,72,bf16]> tensor<[36,72,1,1,bf16]> tensor<[1,1,196,36,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 3, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 72 + d1 + d2, d3), memory_config: (2592, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 36, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 72 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 36 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,36,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 36, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,72,bf16]> tensor<[512,72,1,1,bf16]> tensor<[1,1,196,512,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 3, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 72 + d1 + d2, d3), memory_config: (36864, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 512, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 72 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 512 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,512,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 512, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,72,bf16]> tensor<[72,72,3,3,bf16]> tensor<[1,1,196,72,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 3, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 216 + d1 * 3 + d2, d3), memory_config: (15552, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 72, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 72 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 72 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,72,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 72, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1,72,bf16]> tensor<[20,72,1,1,bf16]> tensor<[1,1,1,20,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 3, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 72 + d1 + d2, d3), memory_config: (1440, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 20, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 72 : i32 input_height: 1 : i32 input_width: 1 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 20 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,1,20,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 20, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1,72,bf16]> tensor<[24,72,1,1,bf16]> tensor<[1,1,1,24,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 3, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 72 + d1 + d2, d3), memory_config: (1728, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 24, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 72 : i32 input_height: 1 : i32 input_width: 1 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 24 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,1,24,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 24, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,72,bf16]> tensor<[20,72,1,1,bf16]> tensor<[1,1,784,20,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 3, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 72 + d1 + d2, d3), memory_config: (1440, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 20, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 72 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 20 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,20,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 20, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,72,bf16]> tensor<[40,72,1,1,bf16]> tensor<[1,1,784,40,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 3, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 72 + d1 + d2, d3), memory_config: (2880, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 40, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 72 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 40 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,40,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 40, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,72,bf16]> tensor<[72,1,1,5,bf16]> tensor<[1,1,784,72,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 3, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (72, 5, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 72, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 72 : i32 in_channels: 72 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 1 : i32 kernel_width: 5 : i32 out_channels: 72 : i32 padding_height: 0 : i32 padding_width: 2 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,72,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 72, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,72,bf16]> tensor<[72,1,5,1,bf16]> tensor<[1,1,784,72,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 3, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5 + d1 * 5 + d2, d3), memory_config: (360, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 72, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 72 : i32 in_channels: 72 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 5 : i32 kernel_width: 1 : i32 out_channels: 72 : i32 padding_height: 2 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,72,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 72, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1600,72,f32]> tensor<[40,72,1,1,f32]> tensor<[1,1,1600,40,f32]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1600 + d1 * 1600 + d2, d3), memory_config: (50, 3, 'tile<32x32, f32>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 72 + d1 + d2, d3), memory_config: (2880, 1, 'f32', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1600 + d1 * 40 + d2, d3), memory_config: (1600, 40, 'f32', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 72 : i32 input_height: 40 : i32 input_width: 40 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 40 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,1600,40,f32]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1600 + d1 * 40 + d2, d3), memory_config: (1600, 40, 'f32', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,3136,72,bf16]> tensor<[12,72,1,1,bf16]> tensor<[1,1,3136,12,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 3136 + d2, d3), memory_config: (98, 3, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 72 + d1 + d2, d3), memory_config: (864, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 12, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 72 : i32 input_height: 56 : i32 input_width: 56 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 12 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,3136,12,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 12, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,3136,72,bf16]> tensor<[24,72,1,1,bf16]> tensor<[1,1,3136,24,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 3136 + d2, d3), memory_config: (98, 3, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 72 + d1 + d2, d3), memory_config: (1728, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 24, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 72 : i32 input_height: 56 : i32 input_width: 56 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 24 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,3136,24,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 24, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,3136,72,bf16]> tensor<[72,1,3,3,bf16]> tensor<[1,1,3136,72,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 3136 + d2, d3), memory_config: (98, 3, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (216, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 72, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 72 : i32 in_channels: 72 : i32 input_height: 56 : i32 input_width: 56 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 72 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,3136,72,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 72, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,3136,72,bf16]> tensor<[72,1,5,5,bf16]> tensor<[1,1,784,72,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 3136 + d2, d3), memory_config: (98, 3, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5 + d1 * 5 + d2, d3), memory_config: (360, 5, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 72, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 72 : i32 in_channels: 72 : i32 input_height: 56 : i32 input_width: 56 : i32 kernel_height: 5 : i32 kernel_width: 5 : i32 out_channels: 72 : i32 padding_height: 2 : i32 padding_width: 2 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,784,72,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 72, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,6400,72,f32]> tensor<[24,72,1,1,f32]> tensor<[1,1,6400,24,f32]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 6400 + d1 * 6400 + d2, d3), memory_config: (200, 3, 'tile<32x32, f32>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 72 + d1 + d2, d3), memory_config: (1728, 1, 'f32', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 6400 + d1 * 80 + d2, d3), memory_config: (6400, 24, 'f32', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 72 : i32 input_height: 80 : i32 input_width: 80 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 24 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,6400,24,f32]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 6400 + d1 * 80 + d2, d3), memory_config: (6400, 24, 'f32', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,6400,72,f32]> tensor<[72,1,3,3,f32]> tensor<[1,1,6400,72,f32]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 6400 + d1 * 6400 + d2, d3), memory_config: (200, 3, 'tile<32x32, f32>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (216, 3, 'f32', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 6400 + d1 * 80 + d2, d3), memory_config: (6400, 72, 'f32', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 72 : i32 in_channels: 72 : i32 input_height: 80 : i32 input_width: 80 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 72 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,6400,72,f32]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 6400 + d1 * 80 + d2, d3), memory_config: (6400, 72, 'f32', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,6400,72,f32]> tensor<[72,1,5,5,f32]> tensor<[1,1,1600,72,f32]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 6400 + d1 * 6400 + d2, d3), memory_config: (200, 3, 'tile<32x32, f32>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5 + d1 * 5 + d2, d3), memory_config: (360, 5, 'f32', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1600 + d1 * 40 + d2, d3), memory_config: (1600, 72, 'f32', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 72 : i32 in_channels: 72 : i32 input_height: 80 : i32 input_width: 80 : i32 kernel_height: 5 : i32 kernel_width: 5 : i32 out_channels: 72 : i32 padding_height: 2 : i32 padding_width: 2 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,1600,72,f32]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1600 + d1 * 40 + d2, d3), memory_config: (1600, 72, 'f32', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,736,bf16]> tensor<[128,736,1,1,bf16]> tensor<[1,1,196,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 23, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 736 + d1 + d2, d3), memory_config: (94208, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 736 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,736,bf16]> tensor<[512,736,1,1,bf16]> tensor<[1,1,784,512,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 23, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 736 + d1 + d2, d3), memory_config: (376832, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 512, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 736 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 512 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,512,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 512, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,740,bf16]> tensor<[334,740,3,3,bf16]> tensor<[1,1,196,334,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 24, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 2220 + d1 * 3 + d2, d3), memory_config: (741480, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 334, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 740 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 334 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,334,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 334, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,768,bf16]> tensor<[128,768,1,1,bf16]> tensor<[1,1,196,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 24, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 768 + d1 + d2, d3), memory_config: (98304, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 768 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1,768,bf16]> tensor<[768,768,1,1,bf16]> tensor<[1,1,1,768,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 24, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 768 + d1 + d2, d3), memory_config: (589824, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 768, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 768 : i32 input_height: 1 : i32 input_width: 1 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 768 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,1,768,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 768, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,257,768,bf16]> tensor<[27,768,1,1,bf16]> tensor<[1,1,257,27,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 257 + d1 * 257 + d2, d3), memory_config: (9, 24, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 768 + d1 + d2, d3), memory_config: (20736, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 257 + d1 + d2, d3), memory_config: (257, 27, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 768 : i32 input_height: 257 : i32 input_width: 1 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 27 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,257,27,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 257 + d1 + d2, d3), memory_config: (257, 27, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,257,768,bf16]> tensor<[768,96,1,1,bf16]> tensor<[1,1,257,768,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 257 + d1 * 257 + d2, d3), memory_config: (9, 24, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 96 + d1 + d2, d3), memory_config: (73728, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 257 + d1 + d2, d3), memory_config: (257, 768, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 8 : i32 in_channels: 768 : i32 input_height: 257 : i32 input_width: 1 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 768 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,257,768,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 257 + d1 + d2, d3), memory_config: (257, 768, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,3000,768,bf16]> tensor<[768,768,3,1,bf16]> tensor<[1,1,1500,768,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3000 + d1 * 3000 + d2, d3), memory_config: (94, 24, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 2304 + d1 * 3 + d2, d3), memory_config: (1769472, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1500 + d1 + d2, d3), memory_config: (1500, 768, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 768 : i32 input_height: 3000 : i32 input_width: 1 : i32 kernel_height: 3 : i32 kernel_width: 1 : i32 out_channels: 768 : i32 padding_height: 1 : i32 padding_width: 0 : i32 stride_height: 2 : i32 stride_width: 1 : i32 | tensor<[1,1,1500,768,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1500 + d1 + d2, d3), memory_config: (1500, 768, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1024,768,bf16]> tensor<[256,768,1,1,bf16]> tensor<[1,1,1024,256,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 1024 + d2, d3), memory_config: (32, 24, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 768 + d1 + d2, d3), memory_config: (196608, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 256, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 768 : i32 input_height: 32 : i32 input_width: 32 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 256 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,1024,256,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 256, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,768,bf16]> tensor<[224,768,1,1,bf16]> tensor<[1,1,49,224,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 24, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 768 + d1 + d2, d3), memory_config: (172032, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 224, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 768 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 224 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,224,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 224, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,8,768,bf16]> tensor<[3072,192,1,1,bf16]> tensor<[1,1,8,3072,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 8 + d1 * 8 + d2, d3), memory_config: (1, 24, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 192 + d1 + d2, d3), memory_config: (589824, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 8 + d1 + d2, d3), memory_config: (8, 3072, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 4 : i32 in_channels: 768 : i32 input_height: 8 : i32 input_width: 1 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 3072 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,8,3072,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 8 + d1 + d2, d3), memory_config: (8, 3072, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,8,768,bf16]> tensor<[768,192,1,1,bf16]> tensor<[1,1,8,768,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 8 + d1 * 8 + d2, d3), memory_config: (1, 24, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 192 + d1 + d2, d3), memory_config: (147456, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 8 + d1 + d2, d3), memory_config: (8, 768, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 4 : i32 in_channels: 768 : i32 input_height: 8 : i32 input_width: 1 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 768 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,8,768,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 8 + d1 + d2, d3), memory_config: (8, 768, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,8,768,bf16]> tensor<[768,768,1,1,bf16]> tensor<[1,1,8,768,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 8 + d1 * 8 + d2, d3), memory_config: (1, 24, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 768 + d1 + d2, d3), memory_config: (589824, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 8 + d1 + d2, d3), memory_config: (8, 768, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 768 : i32 input_height: 8 : i32 input_width: 1 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 768 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,8,768,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 8 + d1 + d2, d3), memory_config: (8, 768, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,782,bf16]> tensor<[1024,782,1,1,bf16]> tensor<[1,1,49,1024,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 25, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 782 + d1 + d2, d3), memory_config: (800768, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 1024, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 782 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 1024 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,1024,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 1024, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,78,bf16]> tensor<[16,78,3,3,bf16]> tensor<[1,1,784,16,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 3, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 234 + d1 * 3 + d2, d3), memory_config: (3744, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 16, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 78 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 16 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,16,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 16, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,78,bf16]> tensor<[34,78,3,3,bf16]> tensor<[1,1,784,34,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 3, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 234 + d1 * 3 + d2, d3), memory_config: (7956, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 34, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 78 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 34 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,34,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 34, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,3136,78,bf16]> tensor<[24,78,3,3,bf16]> tensor<[1,1,3136,24,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 3136 + d2, d3), memory_config: (98, 3, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 234 + d1 * 3 + d2, d3), memory_config: (5616, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 24, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 78 : i32 input_height: 56 : i32 input_width: 56 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 24 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,3136,24,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 24, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,800,bf16]> tensor<[128,800,1,1,bf16]> tensor<[1,1,196,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 25, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 800 + d1 + d2, d3), memory_config: (102400, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 800 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,800,bf16]> tensor<[272,800,3,3,bf16]> tensor<[1,1,49,272,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 25, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 2400 + d1 * 3 + d2, d3), memory_config: (652800, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 272, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 800 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 272 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,272,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 272, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,100,80,f32]> tensor<[480,80,1,1,f32]> tensor<[1,1,100,480,f32]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 100 + d2, d3), memory_config: (4, 3, 'tile<32x32, f32>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 80 + d1 + d2, d3), memory_config: (38400, 1, 'f32', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (100, 480, 'f32', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 80 : i32 input_height: 10 : i32 input_width: 10 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 480 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,100,480,f32]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (100, 480, 'f32', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,80,bf16]> tensor<[100,80,1,1,bf16]> tensor<[1,1,196,100,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 3, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 80 + d1 + d2, d3), memory_config: (8000, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 100, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 80 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 100 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,100,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 100, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,80,bf16]> tensor<[112,80,1,1,bf16]> tensor<[1,1,196,112,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 3, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 80 + d1 + d2, d3), memory_config: (8960, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 112, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 80 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 112 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,112,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 112, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,80,bf16]> tensor<[184,80,1,1,bf16]> tensor<[1,1,196,184,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 3, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 80 + d1 + d2, d3), memory_config: (14720, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 184, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 80 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 184 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,184,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 184, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,80,bf16]> tensor<[200,80,1,1,bf16]> tensor<[1,1,196,200,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 3, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 80 + d1 + d2, d3), memory_config: (16000, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 200, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 80 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 200 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,200,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 200, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,80,bf16]> tensor<[240,80,1,1,bf16]> tensor<[1,1,196,240,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 3, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 80 + d1 + d2, d3), memory_config: (19200, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 240, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 80 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 240 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,240,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 240, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,80,bf16]> tensor<[480,80,1,1,bf16]> tensor<[1,1,196,480,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 3, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 80 + d1 + d2, d3), memory_config: (38400, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 480, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 80 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 480 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,480,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 480, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,80,bf16]> tensor<[80,1,3,3,bf16]> tensor<[1,1,196,80,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 3, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (240, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 80, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 80 : i32 in_channels: 80 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 80 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,80,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 80, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,80,bf16]> tensor<[92,80,1,1,bf16]> tensor<[1,1,196,92,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 3, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 80 + d1 + d2, d3), memory_config: (7360, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 92, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 80 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 92 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,92,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 92, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,225,80,bf16]> tensor<[480,80,1,1,bf16]> tensor<[1,1,225,480,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 225 + d1 * 225 + d2, d3), memory_config: (8, 3, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 80 + d1 + d2, d3), memory_config: (38400, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 225 + d1 * 15 + d2, d3), memory_config: (225, 480, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 80 : i32 input_height: 15 : i32 input_width: 15 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 480 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,225,480,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 225 + d1 * 15 + d2, d3), memory_config: (225, 480, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,400,80,f32]> tensor<[184,80,1,1,f32]> tensor<[1,1,400,184,f32]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 400 + d1 * 400 + d2, d3), memory_config: (13, 3, 'tile<32x32, f32>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 80 + d1 + d2, d3), memory_config: (14720, 1, 'f32', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 400 + d1 * 20 + d2, d3), memory_config: (400, 184, 'f32', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 80 : i32 input_height: 20 : i32 input_width: 20 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 184 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,400,184,f32]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 400 + d1 * 20 + d2, d3), memory_config: (400, 184, 'f32', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,400,80,f32]> tensor<[200,80,1,1,f32]> tensor<[1,1,400,200,f32]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 400 + d1 * 400 + d2, d3), memory_config: (13, 3, 'tile<32x32, f32>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 80 + d1 + d2, d3), memory_config: (16000, 1, 'f32', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 400 + d1 * 20 + d2, d3), memory_config: (400, 200, 'f32', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 80 : i32 input_height: 20 : i32 input_width: 20 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 200 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,400,200,f32]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 400 + d1 * 20 + d2, d3), memory_config: (400, 200, 'f32', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,400,80,f32]> tensor<[480,80,1,1,f32]> tensor<[1,1,400,480,f32]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 400 + d1 * 400 + d2, d3), memory_config: (13, 3, 'tile<32x32, f32>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 80 + d1 + d2, d3), memory_config: (38400, 1, 'f32', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 400 + d1 * 20 + d2, d3), memory_config: (400, 480, 'f32', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 80 : i32 input_height: 20 : i32 input_width: 20 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 480 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,400,480,f32]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 400 + d1 * 20 + d2, d3), memory_config: (400, 480, 'f32', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,3000,80,bf16]> tensor<[768,80,3,1,bf16]> tensor<[1,1,3000,768,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3000 + d1 * 3000 + d2, d3), memory_config: (94, 3, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 240 + d1 * 3 + d2, d3), memory_config: (184320, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3000 + d1 + d2, d3), memory_config: (3000, 768, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 80 : i32 input_height: 3000 : i32 input_width: 1 : i32 kernel_height: 3 : i32 kernel_width: 1 : i32 out_channels: 768 : i32 padding_height: 1 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,3000,768,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3000 + d1 + d2, d3), memory_config: (3000, 768, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,80,bf16]> tensor<[184,80,1,1,bf16]> tensor<[1,1,49,184,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 3, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 80 + d1 + d2, d3), memory_config: (14720, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 184, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 80 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 184 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,184,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 184, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,80,bf16]> tensor<[200,80,1,1,bf16]> tensor<[1,1,49,200,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 3, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 80 + d1 + d2, d3), memory_config: (16000, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 200, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 80 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 200 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,200,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 200, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,80,bf16]> tensor<[480,80,1,1,bf16]> tensor<[1,1,49,480,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 3, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 80 + d1 + d2, d3), memory_config: (38400, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 480, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 80 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 480 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,480,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 480, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,80,bf16]> tensor<[80,1,3,3,bf16]> tensor<[1,1,49,80,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 3, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (240, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 80, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 80 : i32 in_channels: 80 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 80 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,80,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 80, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,100,816,bf16]> tensor<[232,816,1,1,bf16]> tensor<[1,1,100,232,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 100 + d2, d3), memory_config: (4, 26, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 816 + d1 + d2, d3), memory_config: (189312, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (100, 232, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 816 : i32 input_height: 10 : i32 input_width: 10 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 232 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,100,232,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (100, 232, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,361,816,bf16]> tensor<[136,816,1,1,bf16]> tensor<[1,1,361,136,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 361 + d1 * 361 + d2, d3), memory_config: (12, 26, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 816 + d1 + d2, d3), memory_config: (110976, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 361 + d1 * 19 + d2, d3), memory_config: (361, 136, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 816 : i32 input_height: 19 : i32 input_width: 19 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 136 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,361,136,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 361 + d1 * 19 + d2, d3), memory_config: (361, 136, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,361,816,bf16]> tensor<[816,1,5,5,bf16]> tensor<[1,1,361,816,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 361 + d1 * 361 + d2, d3), memory_config: (12, 26, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5 + d1 * 5 + d2, d3), memory_config: (4080, 5, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 361 + d1 * 19 + d2, d3), memory_config: (361, 816, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 816 : i32 in_channels: 816 : i32 input_height: 19 : i32 input_width: 19 : i32 kernel_height: 5 : i32 kernel_width: 5 : i32 out_channels: 816 : i32 padding_height: 2 : i32 padding_width: 2 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,361,816,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 361 + d1 * 19 + d2, d3), memory_config: (361, 816, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,529,816,bf16]> tensor<[816,1,5,5,bf16]> tensor<[1,1,100,816,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 529 + d1 * 529 + d2, d3), memory_config: (17, 26, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5 + d1 * 5 + d2, d3), memory_config: (4080, 5, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (100, 816, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 816 : i32 in_channels: 816 : i32 input_height: 23 : i32 input_width: 23 : i32 kernel_height: 5 : i32 kernel_width: 5 : i32 out_channels: 816 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,100,816,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (100, 816, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,832,bf16]> tensor<[128,832,1,1,bf16]> tensor<[1,1,196,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 26, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 832 + d1 + d2, d3), memory_config: (106496, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 832 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,832,bf16]> tensor<[128,832,1,1,bf16]> tensor<[1,1,49,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 26, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 832 + d1 + d2, d3), memory_config: (106496, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 832 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,832,bf16]> tensor<[160,832,1,1,bf16]> tensor<[1,1,49,160,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 26, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 832 + d1 + d2, d3), memory_config: (133120, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 160, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 832 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 160 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,160,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 160, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,832,bf16]> tensor<[192,832,1,1,bf16]> tensor<[1,1,49,192,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 26, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 832 + d1 + d2, d3), memory_config: (159744, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 192, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 832 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 192 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,192,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 192, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,832,bf16]> tensor<[256,832,1,1,bf16]> tensor<[1,1,49,256,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 26, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 832 + d1 + d2, d3), memory_config: (212992, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 256, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 832 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 256 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,256,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 256, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,832,bf16]> tensor<[32,832,1,1,bf16]> tensor<[1,1,49,32,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 26, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 832 + d1 + d2, d3), memory_config: (26624, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 32, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 832 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 32 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,32,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 32, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,832,bf16]> tensor<[384,832,1,1,bf16]> tensor<[1,1,49,384,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 26, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 832 + d1 + d2, d3), memory_config: (319488, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 384, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 832 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 384 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,384,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 384, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,832,bf16]> tensor<[48,832,1,1,bf16]> tensor<[1,1,49,48,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 26, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 832 + d1 + d2, d3), memory_config: (39936, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 48, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 832 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 48 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,48,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 48, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,864,bf16]> tensor<[128,864,1,1,bf16]> tensor<[1,1,196,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 27, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 864 + d1 + d2, d3), memory_config: (110592, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 864 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,289,88,bf16]> tensor<[528,88,1,1,bf16]> tensor<[1,1,289,528,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 289 + d2, d3), memory_config: (10, 3, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 88 + d1 + d2, d3), memory_config: (46464, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 17 + d2, d3), memory_config: (289, 528, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 88 : i32 input_height: 17 : i32 input_width: 17 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 528 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,289,528,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 17 + d2, d3), memory_config: (289, 528, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,896,bf16]> tensor<[128,896,1,1,bf16]> tensor<[1,1,196,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 28, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 896 + d1 + d2, d3), memory_config: (114688, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 896 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,896,bf16]> tensor<[256,896,1,1,bf16]> tensor<[1,1,196,256,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 28, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 896 + d1 + d2, d3), memory_config: (229376, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 256, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 896 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 256 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,256,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 256, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,896,bf16]> tensor<[128,896,1,1,bf16]> tensor<[1,1,49,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 28, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 896 + d1 + d2, d3), memory_config: (114688, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 896 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,12544,8,bf16]> tensor<[8,1,3,3,bf16]> tensor<[1,1,12544,8,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 12544 + d2, d3), memory_config: (392, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (24, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (12544, 8, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 8 : i32 in_channels: 8 : i32 input_height: 112 : i32 input_width: 112 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 8 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,12544,8,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (12544, 8, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1,8,bf16]> tensor<[232,8,1,1,bf16]> tensor<[1,1,1,232,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 8 + d1 + d2, d3), memory_config: (1856, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 232, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 8 : i32 input_height: 1 : i32 input_width: 1 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 232 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,1,232,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 232, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,928,bf16]> tensor<[128,928,1,1,bf16]> tensor<[1,1,196,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 29, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 928 + d1 + d2, d3), memory_config: (118784, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 928 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,928,bf16]> tensor<[128,928,1,1,bf16]> tensor<[1,1,49,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 29, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 928 + d1 + d2, d3), memory_config: (118784, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 928 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,92,bf16]> tensor<[92,1,3,3,bf16]> tensor<[1,1,196,92,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 3, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (276, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 92, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 92 : i32 in_channels: 92 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 92 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,92,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 92, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,94,bf16]> tensor<[28,94,3,3,bf16]> tensor<[1,1,784,28,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 3, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 282 + d1 * 3 + d2, d3), memory_config: (7896, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 28, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 94 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 28 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,28,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 28, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,144,960,bf16]> tensor<[272,960,1,1,bf16]> tensor<[1,1,144,272,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 144 + d1 * 144 + d2, d3), memory_config: (5, 30, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 960 + d1 + d2, d3), memory_config: (261120, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 144 + d1 * 12 + d2, d3), memory_config: (144, 272, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 960 : i32 input_height: 12 : i32 input_width: 12 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 272 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,144,272,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 144 + d1 * 12 + d2, d3), memory_config: (144, 272, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,960,bf16]> tensor<[128,960,1,1,bf16]> tensor<[1,1,196,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 30, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 960 + d1 + d2, d3), memory_config: (122880, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 960 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1,960,bf16]> tensor<[1280,960,1,1,bf16]> tensor<[1,1,1,1280,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 30, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 960 + d1 + d2, d3), memory_config: (1228800, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 1280, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 960 : i32 input_height: 1 : i32 input_width: 1 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 1280 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,1,1280,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 1280, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1,960,bf16]> tensor<[240,960,1,1,bf16]> tensor<[1,1,1,240,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 30, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 960 + d1 + d2, d3), memory_config: (230400, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 240, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 960 : i32 input_height: 1 : i32 input_width: 1 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 240 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,1,240,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 240, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,576,960,bf16]> tensor<[160,960,1,1,bf16]> tensor<[1,1,576,160,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 576 + d1 * 576 + d2, d3), memory_config: (18, 30, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 960 + d1 + d2, d3), memory_config: (153600, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 576 + d1 * 24 + d2, d3), memory_config: (576, 160, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 960 : i32 input_height: 24 : i32 input_width: 24 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 160 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,576,160,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 576 + d1 * 24 + d2, d3), memory_config: (576, 160, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,576,960,bf16]> tensor<[960,1,5,5,bf16]> tensor<[1,1,576,960,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 576 + d1 * 576 + d2, d3), memory_config: (18, 30, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5 + d1 * 5 + d2, d3), memory_config: (4800, 5, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 576 + d1 * 24 + d2, d3), memory_config: (576, 960, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 960 : i32 in_channels: 960 : i32 input_height: 24 : i32 input_width: 24 : i32 kernel_height: 5 : i32 kernel_width: 5 : i32 out_channels: 960 : i32 padding_height: 2 : i32 padding_width: 2 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,576,960,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 576 + d1 * 24 + d2, d3), memory_config: (576, 960, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,729,960,bf16]> tensor<[960,1,5,5,bf16]> tensor<[1,1,144,960,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 729 + d1 * 729 + d2, d3), memory_config: (23, 30, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5 + d1 * 5 + d2, d3), memory_config: (4800, 5, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 144 + d1 * 12 + d2, d3), memory_config: (144, 960, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 960 : i32 in_channels: 960 : i32 input_height: 27 : i32 input_width: 27 : i32 kernel_height: 5 : i32 kernel_width: 5 : i32 out_channels: 960 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,144,960,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 144 + d1 * 12 + d2, d3), memory_config: (144, 960, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1024,960,bf16]> tensor<[640,960,1,1,bf16]> tensor<[1,1,1024,640,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 1024 + d2, d3), memory_config: (32, 30, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 960 + d1 + d2, d3), memory_config: (614400, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 640, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 960 : i32 input_height: 32 : i32 input_width: 32 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 640 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,1024,640,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 640, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1024,960,bf16]> tensor<[640,960,3,3,bf16]> tensor<[1,1,1024,640,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 1024 + d2, d3), memory_config: (32, 30, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 2880 + d1 * 3 + d2, d3), memory_config: (1843200, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 640, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 960 : i32 input_height: 32 : i32 input_width: 32 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 640 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,1024,640,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 640, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,9,960,bf16]> tensor<[960,1,1,5,bf16]> tensor<[1,1,9,960,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 9 + d1 * 9 + d2, d3), memory_config: (1, 30, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (960, 5, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 9 + d1 * 3 + d2, d3), memory_config: (9, 960, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 960 : i32 in_channels: 960 : i32 input_height: 3 : i32 input_width: 3 : i32 kernel_height: 1 : i32 kernel_width: 5 : i32 out_channels: 960 : i32 padding_height: 0 : i32 padding_width: 2 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,9,960,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 9 + d1 * 3 + d2, d3), memory_config: (9, 960, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,9,960,bf16]> tensor<[960,1,5,1,bf16]> tensor<[1,1,9,960,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 9 + d1 * 9 + d2, d3), memory_config: (1, 30, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5 + d1 * 5 + d2, d3), memory_config: (4800, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 9 + d1 * 3 + d2, d3), memory_config: (9, 960, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 960 : i32 in_channels: 960 : i32 input_height: 3 : i32 input_width: 3 : i32 kernel_height: 5 : i32 kernel_width: 1 : i32 out_channels: 960 : i32 padding_height: 2 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,9,960,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 9 + d1 * 3 + d2, d3), memory_config: (9, 960, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,4096,960,bf16]> tensor<[320,960,1,1,bf16]> tensor<[1,1,4096,320,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 4096 + d2, d3), memory_config: (128, 30, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 960 + d1 + d2, d3), memory_config: (307200, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (4096, 320, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 960 : i32 input_height: 64 : i32 input_width: 64 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 320 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,4096,320,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (4096, 320, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,4096,960,bf16]> tensor<[320,960,3,3,bf16]> tensor<[1,1,4096,320,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 4096 + d2, d3), memory_config: (128, 30, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 2880 + d1 * 3 + d2, d3), memory_config: (921600, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (4096, 320, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 960 : i32 input_height: 64 : i32 input_width: 64 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 320 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,4096,320,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (4096, 320, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,960,bf16]> tensor<[128,960,1,1,bf16]> tensor<[1,1,49,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 30, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 960 + d1 + d2, d3), memory_config: (122880, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 960 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,960,bf16]> tensor<[160,960,1,1,bf16]> tensor<[1,1,49,160,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 30, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 960 + d1 + d2, d3), memory_config: (153600, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 160, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 960 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 160 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,160,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 160, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,960,bf16]> tensor<[320,960,1,1,bf16]> tensor<[1,1,49,320,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 30, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 960 + d1 + d2, d3), memory_config: (307200, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 320, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 960 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 320 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,320,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 320, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,960,bf16]> tensor<[80,960,1,1,bf16]> tensor<[1,1,49,80,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 30, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 960 + d1 + d2, d3), memory_config: (76800, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 80, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 960 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 80 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,80,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 80, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,960,bf16]> tensor<[960,1,3,3,bf16]> tensor<[1,1,49,960,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 30, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (2880, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 960, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 960 : i32 in_channels: 960 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 960 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,960,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 960, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,960,bf16]> tensor<[960,1,5,5,bf16]> tensor<[1,1,49,960,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 30, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5 + d1 * 5 + d2, d3), memory_config: (4800, 5, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 960, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 960 : i32 in_channels: 960 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 5 : i32 kernel_width: 5 : i32 out_channels: 960 : i32 padding_height: 2 : i32 padding_width: 2 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,960,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 960, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,12544,96,bf16]> tensor<[96,1,3,3,bf16]> tensor<[1,1,3136,96,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 12544 + d2, d3), memory_config: (392, 3, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (288, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 96, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 96 : i32 in_channels: 96 : i32 input_height: 112 : i32 input_width: 112 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 96 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,3136,96,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 96, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,12769,96,bf16]> tensor<[96,1,3,3,bf16]> tensor<[1,1,3136,96,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12769 + d1 * 12769 + d2, d3), memory_config: (400, 3, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (288, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 96, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 96 : i32 in_channels: 96 : i32 input_height: 113 : i32 input_width: 113 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 96 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,3136,96,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 96, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,14641,96,bf16]> tensor<[96,1,3,3,bf16]> tensor<[1,1,3600,96,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 14641 + d1 * 14641 + d2, d3), memory_config: (458, 3, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (288, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3600 + d1 * 60 + d2, d3), memory_config: (3600, 96, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 96 : i32 in_channels: 96 : i32 input_height: 121 : i32 input_width: 121 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 96 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,3600,96,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3600 + d1 * 60 + d2, d3), memory_config: (3600, 96, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,17161,96,bf16]> tensor<[96,1,3,3,bf16]> tensor<[1,1,4225,96,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 17161 + d1 * 17161 + d2, d3), memory_config: (537, 3, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3 + d1 * 3 + d2, d3), memory_config: (288, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4225 + d1 * 65 + d2, d3), memory_config: (4225, 96, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 96 : i32 in_channels: 96 : i32 input_height: 131 : i32 input_width: 131 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 96 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 2 : i32 stride_width: 2 : i32 | tensor<[1,1,4225,96,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4225 + d1 * 65 + d2, d3), memory_config: (4225, 96, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,96,bf16]> tensor<[208,96,3,3,bf16]> tensor<[1,1,196,208,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 3, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 288 + d1 * 3 + d2, d3), memory_config: (59904, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 208, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 96 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 208 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,208,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 208, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,96,bf16]> tensor<[576,96,1,1,bf16]> tensor<[1,1,196,576,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 3, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 96 + d1 + d2, d3), memory_config: (55296, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 576, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 96 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 576 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,576,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 576, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,361,96,bf16]> tensor<[576,96,1,1,bf16]> tensor<[1,1,361,576,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 361 + d1 * 361 + d2, d3), memory_config: (12, 3, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 96 + d1 + d2, d3), memory_config: (55296, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 361 + d1 * 19 + d2, d3), memory_config: (361, 576, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 96 : i32 input_height: 19 : i32 input_width: 19 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 576 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,361,576,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 361 + d1 * 19 + d2, d3), memory_config: (361, 576, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,96,bf16]> tensor<[128,96,3,3,bf16]> tensor<[1,1,784,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 3, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 288 + d1 * 3 + d2, d3), memory_config: (36864, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 96 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 128 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,1225,96,bf16]> tensor<[96,96,3,3,bf16]> tensor<[1,1,1225,96,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1225 + d1 * 1225 + d2, d3), memory_config: (39, 3, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 288 + d1 * 3 + d2, d3), memory_config: (27648, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1225 + d1 * 35 + d2, d3), memory_config: (1225, 96, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 96 : i32 input_height: 35 : i32 input_width: 35 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 96 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,1225,96,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1225 + d1 * 35 + d2, d3), memory_config: (1225, 96, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,3136,96,bf16]> tensor<[128,96,1,1,bf16]> tensor<[1,1,3136,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 3136 + d2, d3), memory_config: (98, 3, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 96 + d1 + d2, d3), memory_config: (12288, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 96 : i32 input_height: 56 : i32 input_width: 56 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,3136,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,3136,96,bf16]> tensor<[24,96,1,1,bf16]> tensor<[1,1,3136,24,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 3136 + d2, d3), memory_config: (98, 3, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 96 + d1 + d2, d3), memory_config: (2304, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 24, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 96 : i32 input_height: 56 : i32 input_width: 56 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 24 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,3136,24,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 24, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,3600,96,bf16]> tensor<[24,96,1,1,bf16]> tensor<[1,1,3600,24,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3600 + d1 * 3600 + d2, d3), memory_config: (113, 3, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 96 + d1 + d2, d3), memory_config: (2304, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3600 + d1 * 60 + d2, d3), memory_config: (3600, 24, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 96 : i32 input_height: 60 : i32 input_width: 60 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 24 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,3600,24,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3600 + d1 * 60 + d2, d3), memory_config: (3600, 24, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,4225,96,bf16]> tensor<[24,96,1,1,bf16]> tensor<[1,1,4225,24,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4225 + d1 * 4225 + d2, d3), memory_config: (133, 3, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 96 + d1 + d2, d3), memory_config: (2304, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4225 + d1 * 65 + d2, d3), memory_config: (4225, 24, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 96 : i32 input_height: 65 : i32 input_width: 65 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 24 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,4225,24,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4225 + d1 * 65 + d2, d3), memory_config: (4225, 24, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,784,98,bf16]> tensor<[20,98,3,3,bf16]> tensor<[1,1,784,20,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 4, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 294 + d1 * 3 + d2, d3), memory_config: (5880, 3, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 20, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 98 : i32 input_height: 28 : i32 input_width: 28 : i32 kernel_height: 3 : i32 kernel_width: 3 : i32 out_channels: 20 : i32 padding_height: 1 : i32 padding_width: 1 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,784,20,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 20, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,196,992,bf16]> tensor<[128,992,1,1,bf16]> tensor<[1,1,196,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 31, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 992 + d1 + d2, d3), memory_config: (126976, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 992 : i32 input_height: 14 : i32 input_width: 14 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,196,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram') | nan | nan |
| ttnn.conv2d | tensor<[1,1,49,992,bf16]> tensor<[128,992,1,1,bf16]> tensor<[1,1,49,128,bf16]> !tt.device<#device> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 31, 'tile<32x32, bf16>', 'dram') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 992 + d1 + d2, d3), memory_config: (126976, 1, 'bf16', 'system_memory') mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram') | batch_size: 1 : i32 dilation_height: 1 : i32 dilation_width: 1 : i32 groups: 1 : i32 in_channels: 992 : i32 input_height: 7 : i32 input_width: 7 : i32 kernel_height: 1 : i32 kernel_width: 1 : i32 out_channels: 128 : i32 padding_height: 0 : i32 padding_width: 0 : i32 stride_height: 1 : i32 stride_width: 1 : i32 | tensor<[1,1,49,128,bf16]> | mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram') | nan | nan |