ttnn.ne

NameInput ShapesInput LayoutsAttributesOutput ShapesOutput LayoutsPCCATOL
ttnn.netensor<[1,10,ui32]>
tensor<[1,10,ui32]>
tensor<[1,10,bf16]>
mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'dram')
mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'dram')
mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')
operandSegmentSizes: array<i32: 2, 1>tensor<[1,10,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.netensor<[4,49,49,bf16]>
tensor<[4,49,49,bf16]>
tensor<[4,49,49,bf16]>
mapping_from: (d0, d1, d2), mapping_to: (d0 * 49 + d1, d2), memory_config: (7, 2, 'tile<32x32, bf16>', 'dram')
mapping_from: (d0, d1, d2), mapping_to: (d0 * 49 + d1, d2), memory_config: (7, 2, 'tile<32x32, bf16>', 'dram')
mapping_from: (d0, d1, d2), mapping_to: (d0 * 49 + d1, d2), memory_config: (7, 2, 'tile<32x32, bf16>', 'dram')
operandSegmentSizes: array<i32: 2, 1>tensor<[4,49,49,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 49 + d1, d2), memory_config: (7, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.netensor<[64,49,49,bf16]>
tensor<[64,49,49,bf16]>
tensor<[64,49,49,bf16]>
mapping_from: (d0, d1, d2), mapping_to: (d0 * 49 + d1, d2), memory_config: (98, 2, 'tile<32x32, bf16>', 'dram')
mapping_from: (d0, d1, d2), mapping_to: (d0 * 49 + d1, d2), memory_config: (98, 2, 'tile<32x32, bf16>', 'dram')
mapping_from: (d0, d1, d2), mapping_to: (d0 * 49 + d1, d2), memory_config: (98, 2, 'tile<32x32, bf16>', 'dram')
operandSegmentSizes: array<i32: 2, 1>tensor<[64,49,49,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 49 + d1, d2), memory_config: (98, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.netensor<[8,2,ui32]>
tensor<[8,2,ui32]>
tensor<[8,2,bf16]>
mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'dram')
mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'dram')
mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')
operandSegmentSizes: array<i32: 2, 1>tensor<[8,2,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan