efuse.c File Reference

#include <zephyr/kernel.h>
#include <tenstorrent/smc_msg.h>
#include <tenstorrent/msgqueue.h>
#include "timer.h"
#include "dw_apb_i2c.h"
#include "reg.h"
#include "efuse.h"

Data Structures
struct	EFUSE_CNTL_EFUSE_RD_CNTL_reg_t
union	EFUSE_CNTL_EFUSE_RD_CNTL_reg_u

Macros
#define	EFUSE_DFT0_MEM_BASE_ADDR   0x80040000
#define	EFUSE_DFT0_CNTL_REG_MAP_BASE_ADDR   0x80048000
#define	EFUSE_POWER_SWITCH0_ADDR   0x72
#define	EFUSE_POWER_SWITCH1_ADDR   0x73
#define	EFUSE_CTRL_REG_ADDR   0x5
#define	EFUSE_I2C_MST_ID   2
#define	EFUSE_CMD_BYTE_SIZE   1
#define	EFUSE_DATA_BYTE_SIZE   1
#define	VQPS_HI   1
#define	VQPS_LO   0
#define	EFUSE_BOX_ADDR_ALIGN   0x2000
#define	EFUSE_SECURITY_BOX_MEM_BASE_ADDR   0xB0040000
#define	EFUSE_SECURITY_REG_OFFSET_ADDR   0x8000
#define	EFUSE_BOX_START_ADDR(box_id)
#define	EFUSE_CTRL_REG_START_ADDR(box_id)
#define	EFUSE_ROW_SIZE   32
#define	EFUSE_BOX_SIZE_BITS   8192
#define	EFUSE_RD_CNTL_REG_OFFSET   (0x0)
#define	EFUSE_MISC_CNTL_REG_OFFSET   (0x8)
#define	EFUSE_DATA_REG_OFFSET   (0xC)
#define	GET_EFUSE_CNTL_ADDR(box_id, reg_name)
#define	EFUSE_CNTL_EFUSE_RD_CNTL_REG_DEFAULT   (0x00000001)

Functions
uint32_t	EfuseRead (EfuseAccessType acc_type, EfuseBoxId efuse_box_id, uint32_t offset)

Macro Definition Documentation

EFUSE_BOX_ADDR_ALIGN

#define EFUSE_BOX_ADDR_ALIGN   0x2000

EFUSE_BOX_SIZE_BITS

#define EFUSE_BOX_SIZE_BITS   8192

EFUSE_BOX_START_ADDR

#define EFUSE_BOX_START_ADDR

(

box_id

)

Value:

        (EFUSE_DFT0_MEM_BASE_ADDR + (box_id) * EFUSE_BOX_ADDR_ALIGN)

EFUSE_CMD_BYTE_SIZE

#define EFUSE_CMD_BYTE_SIZE   1

EFUSE_CNTL_EFUSE_RD_CNTL_REG_DEFAULT

#define EFUSE_CNTL_EFUSE_RD_CNTL_REG_DEFAULT   (0x00000001)

EFUSE_CTRL_REG_ADDR

#define EFUSE_CTRL_REG_ADDR   0x5

EFUSE_CTRL_REG_START_ADDR

#define EFUSE_CTRL_REG_START_ADDR

(

box_id

)

Value:

        (EFUSE_DFT0_CNTL_REG_MAP_BASE_ADDR + (box_id) * EFUSE_BOX_ADDR_ALIGN)

EFUSE_DATA_BYTE_SIZE

#define EFUSE_DATA_BYTE_SIZE   1

EFUSE_DATA_REG_OFFSET

#define EFUSE_DATA_REG_OFFSET   (0xC)

EFUSE_DFT0_CNTL_REG_MAP_BASE_ADDR

#define EFUSE_DFT0_CNTL_REG_MAP_BASE_ADDR   0x80048000

EFUSE_DFT0_MEM_BASE_ADDR

#define EFUSE_DFT0_MEM_BASE_ADDR   0x80040000

EFUSE_I2C_MST_ID

#define EFUSE_I2C_MST_ID   2

EFUSE_MISC_CNTL_REG_OFFSET

#define EFUSE_MISC_CNTL_REG_OFFSET   (0x8)

EFUSE_POWER_SWITCH0_ADDR

#define EFUSE_POWER_SWITCH0_ADDR   0x72

EFUSE_POWER_SWITCH1_ADDR

#define EFUSE_POWER_SWITCH1_ADDR   0x73

EFUSE_RD_CNTL_REG_OFFSET

#define EFUSE_RD_CNTL_REG_OFFSET   (0x0)

EFUSE_ROW_SIZE

#define EFUSE_ROW_SIZE   32

EFUSE_SECURITY_BOX_MEM_BASE_ADDR

#define EFUSE_SECURITY_BOX_MEM_BASE_ADDR   0xB0040000

EFUSE_SECURITY_REG_OFFSET_ADDR

#define EFUSE_SECURITY_REG_OFFSET_ADDR   0x8000

GET_EFUSE_CNTL_ADDR

#define GET_EFUSE_CNTL_ADDR	(		box_id,
			reg_name )

Value:

        (EFUSE_##reg_name##_REG_OFFSET + EFUSE_CTRL_REG_START_ADDR(box_id))

VQPS_HI

#define VQPS_HI   1

VQPS_LO

#define VQPS_LO   0

Function Documentation

EfuseRead()

uint32_t EfuseRead	(	EfuseAccessType	acc_type,
		EfuseBoxId	efuse_box_id,
		uint32_t	offset )