TT Zephyr Platforms 18.11.99
Tenstorrent Firmware
Loading...
Searching...
No Matches
gddr.h File Reference

Go to the source code of this file.

Macros

#define MIN_GDDR_SPEED   12000
#define MAX_GDDR_SPEED   20000
#define GDDR_SPEED_TO_MEMCLK_RATIO   16
#define NUM_GDDR   8
#define NUM_MRISC_NOC2AXI_PORT   3
#define GDDR_TELEMETRY_TABLE_ADDR   0x8000
#define GDDR_MSG_STRUCT_ADDR   0x6000
#define RISC_CTRL_A_SCRATCH_0__REG_ADDR   0xFFB14010
#define RISC_CTRL_A_SCRATCH_1__REG_ADDR   0xFFB14014
#define RISC_CTRL_A_SCRATCH_2__REG_ADDR   0xFFB14018
#define MRISC_INIT_STATUS   RISC_CTRL_A_SCRATCH_0__REG_ADDR
#define MRISC_POST_CODE   RISC_CTRL_A_SCRATCH_1__REG_ADDR
#define MRISC_MSG_REGISTER   RISC_CTRL_A_SCRATCH_2__REG_ADDR
#define MRISC_INIT_FINISHED   0xdeadbeef
#define MRISC_INIT_FAILED   0xfa11
#define MRISC_INIT_BEFORE   0x11111111
#define MRISC_INIT_STARTED   0x0
#define MRISC_INIT_TIMEOUT   1000 /* In ms */
#define MRISC_MEMTEST_TIMEOUT   1000 /* In ms */
#define MRISC_POWER_SETTING_TIMEOUT_MS   1000
#define MRISC_MSG_TYPE_NONE   0
 MRISC message type when no active message is signalled; acts as a completion signal from MRISC.
#define MRISC_MSG_TYPE_PHY_POWERDOWN   1
 MRISC message to set the phy to power down state.
#define MRISC_MSG_TYPE_PHY_WAKEUP   2
 MRISC message to set the phy to wake up state.
#define MRISC_MSG_TYPE_RUN_MEMTEST   8
 MRISC message to run the memory test.

Functions

int read_gddr_telemetry_table (uint8_t gddr_inst, gddr_telemetry_table_t *gddr_telemetry)
int32_t set_mrisc_power_setting (bool on)
 Sets the MRISC power setting for all active MRISCs.

Macro Definition Documentation

◆ GDDR_MSG_STRUCT_ADDR

#define GDDR_MSG_STRUCT_ADDR   0x6000

◆ GDDR_SPEED_TO_MEMCLK_RATIO

#define GDDR_SPEED_TO_MEMCLK_RATIO   16

◆ GDDR_TELEMETRY_TABLE_ADDR

#define GDDR_TELEMETRY_TABLE_ADDR   0x8000

◆ MAX_GDDR_SPEED

#define MAX_GDDR_SPEED   20000

◆ MIN_GDDR_SPEED

#define MIN_GDDR_SPEED   12000

◆ MRISC_INIT_BEFORE

#define MRISC_INIT_BEFORE   0x11111111

◆ MRISC_INIT_FAILED

#define MRISC_INIT_FAILED   0xfa11

◆ MRISC_INIT_FINISHED

#define MRISC_INIT_FINISHED   0xdeadbeef

◆ MRISC_INIT_STARTED

#define MRISC_INIT_STARTED   0x0

◆ MRISC_INIT_STATUS

#define MRISC_INIT_STATUS   RISC_CTRL_A_SCRATCH_0__REG_ADDR

◆ MRISC_INIT_TIMEOUT

#define MRISC_INIT_TIMEOUT   1000 /* In ms */

◆ MRISC_MEMTEST_TIMEOUT

#define MRISC_MEMTEST_TIMEOUT   1000 /* In ms */

◆ MRISC_MSG_REGISTER

#define MRISC_MSG_REGISTER   RISC_CTRL_A_SCRATCH_2__REG_ADDR

◆ MRISC_MSG_TYPE_NONE

#define MRISC_MSG_TYPE_NONE   0

MRISC message type when no active message is signalled; acts as a completion signal from MRISC.

◆ MRISC_MSG_TYPE_PHY_POWERDOWN

#define MRISC_MSG_TYPE_PHY_POWERDOWN   1

MRISC message to set the phy to power down state.

◆ MRISC_MSG_TYPE_PHY_WAKEUP

#define MRISC_MSG_TYPE_PHY_WAKEUP   2

MRISC message to set the phy to wake up state.

◆ MRISC_MSG_TYPE_RUN_MEMTEST

#define MRISC_MSG_TYPE_RUN_MEMTEST   8

MRISC message to run the memory test.

◆ MRISC_POST_CODE

#define MRISC_POST_CODE   RISC_CTRL_A_SCRATCH_1__REG_ADDR

◆ MRISC_POWER_SETTING_TIMEOUT_MS

#define MRISC_POWER_SETTING_TIMEOUT_MS   1000

◆ NUM_GDDR

#define NUM_GDDR   8

◆ NUM_MRISC_NOC2AXI_PORT

#define NUM_MRISC_NOC2AXI_PORT   3

◆ RISC_CTRL_A_SCRATCH_0__REG_ADDR

#define RISC_CTRL_A_SCRATCH_0__REG_ADDR   0xFFB14010

◆ RISC_CTRL_A_SCRATCH_1__REG_ADDR

#define RISC_CTRL_A_SCRATCH_1__REG_ADDR   0xFFB14014

◆ RISC_CTRL_A_SCRATCH_2__REG_ADDR

#define RISC_CTRL_A_SCRATCH_2__REG_ADDR   0xFFB14018

Function Documentation

◆ read_gddr_telemetry_table()

int read_gddr_telemetry_table ( uint8_t gddr_inst,
gddr_telemetry_table_t * gddr_telemetry )

◆ set_mrisc_power_setting()

int32_t set_mrisc_power_setting ( bool on)

Sets the MRISC power setting for all active MRISCs.

Parameters
[in]ontrue to send MRISCs the MRISC_MSG_TYPE_PHY_WAKEUP command
false to send MRISCs the MRISC_MSG_TYPE_PHY_POWERDOWN command
Returns
0 on success. Negative error code on failure.