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◆ ARC_HANG_PC
◆ ARC_START_TIME_REG_ADDR
◆ CMFW_START_TIME_REG_ADDR
◆ I2C0_TARGET_DEBUG_STATE_2_REG_ADDR
◆ I2C0_TARGET_DEBUG_STATE_REG_ADDR
◆ PCIE_INIT_CPL_TIME_REG_ADDR
◆ PERST_TO_DMFW_INIT_DONE_REG_ADDR
◆ PING_DMFW_DURATION_REG_ADDR
◆ RESET_UNIT_SCRATCH_BASE_ADDR
#define RESET_UNIT_SCRATCH_BASE_ADDR 0x80030060 |
◆ RESET_UNIT_SCRATCH_RAM_BASE_ADDR
#define RESET_UNIT_SCRATCH_RAM_BASE_ADDR 0x80030400 |
◆ RESET_UNIT_SCRATCH_RAM_REG_ADDR
#define RESET_UNIT_SCRATCH_RAM_REG_ADDR |
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Value:
#define RESET_UNIT_SCRATCH_RAM_BASE_ADDR
Definition status_reg.h:12
◆ RESET_UNIT_SCRATCH_REG_ADDR
#define RESET_UNIT_SCRATCH_REG_ADDR |
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Value:
#define RESET_UNIT_SCRATCH_BASE_ADDR
Definition status_reg.h:16
◆ SPI_BUFFER_INFO_REG_ADDR
◆ STATUS_BOOT_STATUS0_REG_ADDR
◆ STATUS_BOOT_STATUS1_REG_ADDR
◆ STATUS_ERROR_STATUS0_REG_ADDR
◆ STATUS_ERROR_STATUS1_REG_ADDR
◆ STATUS_FW_SCRATCH_REG_ADDR
◆ STATUS_FW_VERSION_REG_ADDR
◆ STATUS_FW_VUART_REG_ADDR
#define STATUS_FW_VUART_REG_ADDR |
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Value:
#define RESET_UNIT_SCRATCH_RAM_REG_ADDR(n)
Definition status_reg.h:13
◆ STATUS_INTERFACE_TABLE_BASE_REG_ADDR
◆ STATUS_MSG_Q_ERR_FLAGS_REG_ADDR
◆ STATUS_MSG_Q_INFO_REG_ADDR
◆ STATUS_MSG_Q_STATUS_REG_ADDR
◆ STATUS_POST_CODE_REG_ADDR
◆ TELEMETRY_DATA_REG_ADDR
◆ TELEMETRY_TABLE_REG_ADDR