TT Zephyr Platforms 18.11.99
Tenstorrent Firmware
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status_reg.h File Reference
#include <stdint.h>

Go to the source code of this file.

Data Structures

struct  STATUS_BOOT_STATUS0_reg_t
union  STATUS_BOOT_STATUS0_reg_u
struct  STATUS_ERROR_STATUS0_reg_t
union  STATUS_ERROR_STATUS0_reg_u

Macros

#define RESET_UNIT_SCRATCH_RAM_BASE_ADDR   0x80030400
#define RESET_UNIT_SCRATCH_RAM_REG_ADDR(n)
#define RESET_UNIT_SCRATCH_BASE_ADDR   0x80030060
#define RESET_UNIT_SCRATCH_REG_ADDR(n)
#define STATUS_POST_CODE_REG_ADDR   RESET_UNIT_SCRATCH_REG_ADDR(0)
#define STATUS_FW_VERSION_REG_ADDR   RESET_UNIT_SCRATCH_RAM_REG_ADDR(0)
#define STATUS_BOOT_STATUS0_REG_ADDR   RESET_UNIT_SCRATCH_RAM_REG_ADDR(2)
#define STATUS_BOOT_STATUS1_REG_ADDR   RESET_UNIT_SCRATCH_RAM_REG_ADDR(3)
#define STATUS_ERROR_STATUS0_REG_ADDR   RESET_UNIT_SCRATCH_RAM_REG_ADDR(4)
#define STATUS_ERROR_STATUS1_REG_ADDR   RESET_UNIT_SCRATCH_RAM_REG_ADDR(5)
#define STATUS_INTERFACE_TABLE_BASE_REG_ADDR   RESET_UNIT_SCRATCH_RAM_REG_ADDR(6)
#define STATUS_MSG_Q_STATUS_REG_ADDR   RESET_UNIT_SCRATCH_RAM_REG_ADDR(8)
#define STATUS_MSG_Q_ERR_FLAGS_REG_ADDR   RESET_UNIT_SCRATCH_RAM_REG_ADDR(9)
#define SPI_BUFFER_INFO_REG_ADDR   RESET_UNIT_SCRATCH_RAM_REG_ADDR(10)
#define STATUS_MSG_Q_INFO_REG_ADDR   RESET_UNIT_SCRATCH_RAM_REG_ADDR(11)
#define TELEMETRY_DATA_REG_ADDR   RESET_UNIT_SCRATCH_RAM_REG_ADDR(12)
#define TELEMETRY_TABLE_REG_ADDR   RESET_UNIT_SCRATCH_RAM_REG_ADDR(13)
#define PCIE_INIT_CPL_TIME_REG_ADDR   RESET_UNIT_SCRATCH_RAM_REG_ADDR(14)
#define CMFW_START_TIME_REG_ADDR   RESET_UNIT_SCRATCH_RAM_REG_ADDR(15)
#define ARC_START_TIME_REG_ADDR   RESET_UNIT_SCRATCH_RAM_REG_ADDR(16)
#define PERST_TO_DMFW_INIT_DONE_REG_ADDR   RESET_UNIT_SCRATCH_RAM_REG_ADDR(17)
#define PING_DMFW_DURATION_REG_ADDR   RESET_UNIT_SCRATCH_RAM_REG_ADDR(18)
#define I2C0_TARGET_DEBUG_STATE_REG_ADDR   RESET_UNIT_SCRATCH_RAM_REG_ADDR(19)
#define I2C0_TARGET_DEBUG_STATE_2_REG_ADDR   RESET_UNIT_SCRATCH_RAM_REG_ADDR(20)
#define ARC_HANG_PC   RESET_UNIT_SCRATCH_RAM_REG_ADDR(21)
#define STATUS_FW_VUART_REG_ADDR(n)
#define STATUS_FW_SCRATCH_REG_ADDR   RESET_UNIT_SCRATCH_RAM_REG_ADDR(63)

Macro Definition Documentation

◆ ARC_HANG_PC

#define ARC_HANG_PC   RESET_UNIT_SCRATCH_RAM_REG_ADDR(21)

◆ ARC_START_TIME_REG_ADDR

#define ARC_START_TIME_REG_ADDR   RESET_UNIT_SCRATCH_RAM_REG_ADDR(16)

◆ CMFW_START_TIME_REG_ADDR

#define CMFW_START_TIME_REG_ADDR   RESET_UNIT_SCRATCH_RAM_REG_ADDR(15)

◆ I2C0_TARGET_DEBUG_STATE_2_REG_ADDR

#define I2C0_TARGET_DEBUG_STATE_2_REG_ADDR   RESET_UNIT_SCRATCH_RAM_REG_ADDR(20)

◆ I2C0_TARGET_DEBUG_STATE_REG_ADDR

#define I2C0_TARGET_DEBUG_STATE_REG_ADDR   RESET_UNIT_SCRATCH_RAM_REG_ADDR(19)

◆ PCIE_INIT_CPL_TIME_REG_ADDR

#define PCIE_INIT_CPL_TIME_REG_ADDR   RESET_UNIT_SCRATCH_RAM_REG_ADDR(14)

◆ PERST_TO_DMFW_INIT_DONE_REG_ADDR

#define PERST_TO_DMFW_INIT_DONE_REG_ADDR   RESET_UNIT_SCRATCH_RAM_REG_ADDR(17)

◆ PING_DMFW_DURATION_REG_ADDR

#define PING_DMFW_DURATION_REG_ADDR   RESET_UNIT_SCRATCH_RAM_REG_ADDR(18)

◆ RESET_UNIT_SCRATCH_BASE_ADDR

#define RESET_UNIT_SCRATCH_BASE_ADDR   0x80030060

◆ RESET_UNIT_SCRATCH_RAM_BASE_ADDR

#define RESET_UNIT_SCRATCH_RAM_BASE_ADDR   0x80030400

◆ RESET_UNIT_SCRATCH_RAM_REG_ADDR

#define RESET_UNIT_SCRATCH_RAM_REG_ADDR ( n)
Value:
#define RESET_UNIT_SCRATCH_RAM_BASE_ADDR
Definition status_reg.h:12
__UINT32_TYPE__ uint32_t

◆ RESET_UNIT_SCRATCH_REG_ADDR

#define RESET_UNIT_SCRATCH_REG_ADDR ( n)
Value:
#define RESET_UNIT_SCRATCH_BASE_ADDR
Definition status_reg.h:16

◆ SPI_BUFFER_INFO_REG_ADDR

#define SPI_BUFFER_INFO_REG_ADDR   RESET_UNIT_SCRATCH_RAM_REG_ADDR(10)

◆ STATUS_BOOT_STATUS0_REG_ADDR

#define STATUS_BOOT_STATUS0_REG_ADDR   RESET_UNIT_SCRATCH_RAM_REG_ADDR(2)

◆ STATUS_BOOT_STATUS1_REG_ADDR

#define STATUS_BOOT_STATUS1_REG_ADDR   RESET_UNIT_SCRATCH_RAM_REG_ADDR(3)

◆ STATUS_ERROR_STATUS0_REG_ADDR

#define STATUS_ERROR_STATUS0_REG_ADDR   RESET_UNIT_SCRATCH_RAM_REG_ADDR(4)

◆ STATUS_ERROR_STATUS1_REG_ADDR

#define STATUS_ERROR_STATUS1_REG_ADDR   RESET_UNIT_SCRATCH_RAM_REG_ADDR(5)

◆ STATUS_FW_SCRATCH_REG_ADDR

#define STATUS_FW_SCRATCH_REG_ADDR   RESET_UNIT_SCRATCH_RAM_REG_ADDR(63)

◆ STATUS_FW_VERSION_REG_ADDR

#define STATUS_FW_VERSION_REG_ADDR   RESET_UNIT_SCRATCH_RAM_REG_ADDR(0)

◆ STATUS_FW_VUART_REG_ADDR

#define STATUS_FW_VUART_REG_ADDR ( n)
Value:
#define RESET_UNIT_SCRATCH_RAM_REG_ADDR(n)
Definition status_reg.h:13

◆ STATUS_INTERFACE_TABLE_BASE_REG_ADDR

#define STATUS_INTERFACE_TABLE_BASE_REG_ADDR   RESET_UNIT_SCRATCH_RAM_REG_ADDR(6)

◆ STATUS_MSG_Q_ERR_FLAGS_REG_ADDR

#define STATUS_MSG_Q_ERR_FLAGS_REG_ADDR   RESET_UNIT_SCRATCH_RAM_REG_ADDR(9)

◆ STATUS_MSG_Q_INFO_REG_ADDR

#define STATUS_MSG_Q_INFO_REG_ADDR   RESET_UNIT_SCRATCH_RAM_REG_ADDR(11)

◆ STATUS_MSG_Q_STATUS_REG_ADDR

#define STATUS_MSG_Q_STATUS_REG_ADDR   RESET_UNIT_SCRATCH_RAM_REG_ADDR(8)

◆ STATUS_POST_CODE_REG_ADDR

#define STATUS_POST_CODE_REG_ADDR   RESET_UNIT_SCRATCH_REG_ADDR(0)

◆ TELEMETRY_DATA_REG_ADDR

#define TELEMETRY_DATA_REG_ADDR   RESET_UNIT_SCRATCH_RAM_REG_ADDR(12)

◆ TELEMETRY_TABLE_REG_ADDR

#define TELEMETRY_TABLE_REG_ADDR   RESET_UNIT_SCRATCH_RAM_REG_ADDR(13)