ttnn.arange

NameInput ShapesInput LayoutsAttributesOutput ShapesOutput LayoutsPCCATOL
ttnn.arange!tt.device<#device>dtype: #tt.supportedDataTypes
end: 11 : i64
memory_config: #ttnn.memory_config<#dram, <<1x11>>, >
start: 0 : i64
step: 1 : i64
tensor<[1,1,1,11,ui32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 11, 'ui32', 'dram')nannan
ttnn.arange!tt.device<#device>dtype: #tt.supportedDataTypes
end: 12 : i64
memory_config: #ttnn.memory_config<#dram, <<1x12>>, >
start: 0 : i64
step: 1 : i64
tensor<[1,1,1,12,ui32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 12, 'ui32', 'dram')nannan
ttnn.arange!tt.device<#device>dtype: #tt.supportedDataTypes
end: 13 : i64
memory_config: #ttnn.memory_config<#dram, <<1x13>>, >
start: 0 : i64
step: 1 : i64
tensor<[1,1,1,13,ui32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 13, 'ui32', 'dram')nannan
ttnn.arange!tt.device<#device>dtype: #tt.supportedDataTypes
end: 14 : i64
memory_config: #ttnn.memory_config<#dram, <<1x14>>, >
start: 0 : i64
step: 1 : i64
tensor<[1,1,1,14,ui32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 14, 'ui32', 'dram')nannan
ttnn.arange!tt.device<#device>dtype: #tt.supportedDataTypes
end: 15 : i64
memory_config: #ttnn.memory_config<#dram, <<1x15>>, >
start: 0 : i64
step: 1 : i64
tensor<[1,1,1,15,ui32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 15, 'ui32', 'dram')nannan
ttnn.arange!tt.device<#device>dtype: #tt.supportedDataTypes
end: 16 : i64
memory_config: #ttnn.memory_config<#dram, <<1x16>>, >
start: 0 : i64
step: 1 : i64
tensor<[1,1,1,16,ui32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 16, 'ui32', 'dram')nannan
ttnn.arange!tt.device<#device>dtype: #tt.supportedDataTypes
end: 17 : i64
memory_config: #ttnn.memory_config<#dram, <<1x17>>, >
start: 0 : i64
step: 1 : i64
tensor<[1,1,1,17,ui32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 17, 'ui32', 'dram')nannan
ttnn.arange!tt.device<#device>dtype: #tt.supportedDataTypes
end: 18 : i64
memory_config: #ttnn.memory_config<#dram, <<1x18>>, >
start: 0 : i64
step: 1 : i64
tensor<[1,1,1,18,ui32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 18, 'ui32', 'dram')nannan
ttnn.arange!tt.device<#device>dtype: #tt.supportedDataTypes
end: 19 : i64
memory_config: #ttnn.memory_config<#dram, <<1x19>>, >
start: 0 : i64
step: 1 : i64
tensor<[1,1,1,19,ui32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 19, 'ui32', 'dram')nannan
ttnn.arange!tt.device<#device>dtype: #tt.supportedDataTypes
end: 20 : i64
memory_config: #ttnn.memory_config<#dram, <<1x20>>, >
start: 0 : i64
step: 1 : i64
tensor<[1,1,1,20,ui32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 20, 'ui32', 'dram')nannan
ttnn.arange!tt.device<#device>dtype: #tt.supportedDataTypes
end: 21 : i64
memory_config: #ttnn.memory_config<#dram, <<1x21>>, >
start: 0 : i64
step: 1 : i64
tensor<[1,1,1,21,ui32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 21, 'ui32', 'dram')nannan
ttnn.arange!tt.device<#device>dtype: #tt.supportedDataTypes
end: 22 : i64
memory_config: #ttnn.memory_config<#dram, <<1x22>>, >
start: 0 : i64
step: 1 : i64
tensor<[1,1,1,22,ui32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 22, 'ui32', 'dram')nannan
ttnn.arange!tt.device<#device>dtype: #tt.supportedDataTypes
end: 23 : i64
memory_config: #ttnn.memory_config<#dram, <<1x23>>, >
start: 0 : i64
step: 1 : i64
tensor<[1,1,1,23,ui32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 23, 'ui32', 'dram')nannan
ttnn.arange!tt.device<#device>dtype: #tt.supportedDataTypes
end: 24 : i64
memory_config: #ttnn.memory_config<#dram, <<1x24>>, >
start: 0 : i64
step: 1 : i64
tensor<[1,1,1,24,ui32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 24, 'ui32', 'dram')nannan
ttnn.arange!tt.device<#device>dtype: #tt.supportedDataTypes
end: 25 : i64
memory_config: #ttnn.memory_config<#dram, <<1x25>>, >
start: 0 : i64
step: 1 : i64
tensor<[1,1,1,25,ui32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 25, 'ui32', 'dram')nannan
ttnn.arange!tt.device<#device>dtype: #tt.supportedDataTypes
end: 26 : i64
memory_config: #ttnn.memory_config<#dram, <<1x26>>, >
start: 0 : i64
step: 1 : i64
tensor<[1,1,1,26,ui32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 26, 'ui32', 'dram')nannan
ttnn.arange!tt.device<#device>dtype: #tt.supportedDataTypes
end: 27 : i64
memory_config: #ttnn.memory_config<#dram, <<1x27>>, >
start: 0 : i64
step: 1 : i64
tensor<[1,1,1,27,ui32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 27, 'ui32', 'dram')nannan
ttnn.arange!tt.device<#device>dtype: #tt.supportedDataTypes
end: 28 : i64
memory_config: #ttnn.memory_config<#dram, <<1x28>>, >
start: 0 : i64
step: 1 : i64
tensor<[1,1,1,28,ui32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 28, 'ui32', 'dram')nannan
ttnn.arange!tt.device<#device>dtype: #tt.supportedDataTypes
end: 29 : i64
memory_config: #ttnn.memory_config<#dram, <<1x29>>, >
start: 0 : i64
step: 1 : i64
tensor<[1,1,1,29,ui32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 29, 'ui32', 'dram')nannan
ttnn.arange!tt.device<#device>dtype: #tt.supportedDataTypes
end: 32 : i64
memory_config: #ttnn.memory_config<#dram, <<1x32>>, >
start: 0 : i64
step: 1 : i64
tensor<[1,1,1,32,ui32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 32, 'ui32', 'dram')nannan
ttnn.arange!tt.device<#device>dtype: #tt.supportedDataTypes
end: 5 : i64
memory_config: #ttnn.memory_config<#dram, <<1x5>>, >
start: 0 : i64
step: 1 : i64
tensor<[1,1,1,5,ui32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 5, 'ui32', 'dram')nannan
ttnn.arange!tt.device<#device>dtype: #tt.supportedDataTypes
end: 6 : i64
memory_config: #ttnn.memory_config<#dram, <<1x6>>, >
start: 0 : i64
step: 1 : i64
tensor<[1,1,1,6,ui32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 6, 'ui32', 'dram')nannan
ttnn.arange!tt.device<#device>dtype: #tt.supportedDataTypes
end: 7 : i64
memory_config: #ttnn.memory_config<#dram, <<1x7>>, >
start: 0 : i64
step: 1 : i64
tensor<[1,1,1,7,ui32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 7, 'ui32', 'dram')nannan
ttnn.arange!tt.device<#device>dtype: #tt.supportedDataTypes
end: 8 : i64
memory_config: #ttnn.memory_config<#dram, <<1x8>>, >
start: 0 : i64
step: 1 : i64
tensor<[1,1,1,8,ui32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 8, 'ui32', 'dram')nannan
ttnn.arange!tt.device<#device>dtype: #tt.supportedDataTypes
end: 9 : i64
memory_config: #ttnn.memory_config<#dram, <<1x9>>, >
start: 0 : i64
step: 1 : i64
tensor<[1,1,1,9,ui32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 9, 'ui32', 'dram')nannan
ttnn.arange!tt.device<#device>dtype: #tt.supportedDataTypes
end: 32 : i64
memory_config: #ttnn.memory_config<#dram, <<1x32>>, >
start: 0 : i64
step: 1 : i64
tensor<[1,1,1,32,ui32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 32, 'ui32', 'dram')nannan
ttnn.arange!tt.device<#device>dtype: #tt.supportedDataTypes
end: 5 : i64
memory_config: #ttnn.memory_config<#dram, <<1x5>>, >
start: 0 : i64
step: 1 : i64
tensor<[1,1,1,5,ui32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 5, 'ui32', 'dram')nannan