ttnn.to_layout

NameInput ShapesInput LayoutsAttributesOutput ShapesOutput LayoutsPCCATOL
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[6,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 6, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[6,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[11,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 11, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[11,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,1,11,ui32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 11, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,1,11,ui32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[12,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 12, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[12,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,1,12,ui32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 12, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,1,12,ui32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[13,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 13, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[13,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,1,13,ui32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 13, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,1,13,ui32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[14,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 14, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[14,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,1,14,ui32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 14, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,1,14,ui32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[15,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 15, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[15,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,1,15,ui32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 15, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,1,15,ui32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[16,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 16, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[16,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,1,16,ui32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 16, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,1,16,ui32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[17,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 17, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[17,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,1,17,ui32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 17, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,1,17,ui32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[18,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 18, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[18,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,1,18,ui32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 18, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,1,18,ui32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[19,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 19, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[19,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,1,19,ui32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 19, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,1,19,ui32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[20,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 20, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[20,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,1,20,ui32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 20, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,1,20,ui32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[21,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 21, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[21,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,1,21,ui32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 21, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,1,21,ui32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[22,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 22, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[22,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,1,22,ui32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 22, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,1,22,ui32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[23,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 23, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[23,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,1,23,ui32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 23, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,1,23,ui32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[24,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 24, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[24,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,1,24,ui32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 24, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,1,24,ui32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[25,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 25, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[25,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,1,25,ui32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 25, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,1,25,ui32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[26,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 26, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[26,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,1,26,ui32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 26, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,1,26,ui32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[27,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 27, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[27,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,1,27,ui32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 27, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,1,27,ui32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[28,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 28, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[28,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,1,28,ui32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 28, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,1,28,ui32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[29,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 29, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[29,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,1,29,ui32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 29, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,1,29,ui32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[32,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 32, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[32,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,1,32,ui32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 32, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,1,32,ui32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[5,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 5, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[5,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,1,5,ui32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 5, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,1,5,ui32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[6,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 6, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[6,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,1,6,ui32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 6, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,1,6,ui32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[7,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 7, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[7,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,1,7,ui32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 7, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,1,7,ui32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[8,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 8, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[8,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,1,8,ui32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 8, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,1,8,ui32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[9,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 9, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[9,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,1,9,ui32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 9, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,1,9,ui32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[32,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 32, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[32,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,1,32,ui32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 32, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,1,32,ui32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,10,10,1024,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (100, 1024, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,10,10,1024,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (4, 32, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,10,10,1024,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (100, 1024, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,10,10,1024,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (4, 32, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,10,10,1536,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (100, 1536, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,10,10,1536,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (4, 48, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,128,128,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 128 + d2, d3), memory_config: (16384, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,128,128,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 128 + d2, d3), memory_config: (512, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,1024,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 1024, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,1024,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 32, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,1024,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 1024, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,1024,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 32, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,1024,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 1024, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,1024,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 32, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,1024,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 1024, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,1024,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 32, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,2048,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 2048, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,2048,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 64, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,2048,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 2048, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,2048,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 64, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,512,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 512, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,512,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 16, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,16,16,1024,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (256, 1024, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,16,16,1024,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (8, 32, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,16,16,255,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (256, 255, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,16,16,255,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (8, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,16,16,512,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (256, 512, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,16,16,512,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (8, 16, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,17,17,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 17 + d2, d3), memory_config: (289, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,17,17,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 17 + d2, d3), memory_config: (10, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,17,17,192,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 17 + d2, d3), memory_config: (289, 192, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,17,17,192,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 17 + d2, d3), memory_config: (10, 6, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,17,17,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 17 + d2, d3), memory_config: (289, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,17,17,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 17 + d2, d3), memory_config: (10, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,17,17,384,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 17 + d2, d3), memory_config: (289, 384, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,17,17,384,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 17 + d2, d3), memory_config: (10, 12, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,10,10,1024,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (100, 1024, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,10,10,1024,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (4, 32, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,1,1,1024,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 1024, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,1,1024,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 32, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,1024,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 1024, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,1024,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 32, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,512,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 512, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,512,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 16, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,23,40,2048,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 920 + d1 * 40 + d2, d3), memory_config: (920, 2048, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,23,40,2048,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 920 + d1 * 40 + d2, d3), memory_config: (29, 64, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,45,80,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3600 + d1 * 80 + d2, d3), memory_config: (3600, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,45,80,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3600 + d1 * 80 + d2, d3), memory_config: (113, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,45,80,512,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3600 + d1 * 80 + d2, d3), memory_config: (3600, 512, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,45,80,512,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3600 + d1 * 80 + d2, d3), memory_config: (113, 16, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[256,1024,1,1,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 + d2, d3), memory_config: (8192, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[256,1024,1,1,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 + d2, d3), memory_config: (262144, 1, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,512,1,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 512 + d1 + d2, d3), memory_config: (512, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,512,1,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 512 + d1 + d2, d3), memory_config: (16, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,1024,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 1024, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,1024,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 32, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,1024,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 1024, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,1024,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 32, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,1024,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 1024, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,1024,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 32, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,2048,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 2048, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,2048,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 64, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,2048,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 2048, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,2048,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 64, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,56,56,40,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 40, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,56,56,40,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (98, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,462,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 462, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,462,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 15, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,768,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 768, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,768,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 24, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,112,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 112, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,112,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,224,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 224, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,224,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 7, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,336,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 336, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,336,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 11, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,672,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 672, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,672,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 21, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,15,15,672,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 225 + d1 * 15 + d2, d3), memory_config: (225, 672, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,15,15,672,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 225 + d1 * 15 + d2, d3), memory_config: (8, 21, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,20,20,672,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 400 + d1 * 20 + d2, d3), memory_config: (400, 672, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,20,20,672,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 400 + d1 * 20 + d2, d3), memory_config: (13, 21, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,24,24,672,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 576 + d1 * 24 + d2, d3), memory_config: (576, 672, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,24,24,672,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 576 + d1 * 24 + d2, d3), memory_config: (18, 21, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,160,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 160, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,160,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 5, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,672,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 672, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,672,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 21, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,1152,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 1152, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,1152,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 36, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,1152,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 1152, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,1152,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 36, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,192,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 192, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,192,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 6, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,320,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 320, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,320,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 10, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,8,8,1152,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 8 + d2, d3), memory_config: (64, 1152, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,8,8,1152,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 8 + d2, d3), memory_config: (2, 36, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,8,8,1152,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 8 + d2, d3), memory_config: (64, 1152, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,8,8,1152,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 8 + d2, d3), memory_config: (2, 36, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,8,8,192,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 8 + d2, d3), memory_config: (64, 192, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,8,8,192,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 8 + d2, d3), memory_config: (2, 6, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,8,8,320,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 8 + d2, d3), memory_config: (64, 320, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,8,8,320,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 8 + d2, d3), memory_config: (2, 10, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,40,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 40, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,40,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,34,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 34, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,34,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,120,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 120, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,120,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,120,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 120, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,120,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,17,17,720,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 17 + d2, d3), memory_config: (289, 720, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,17,17,720,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 17 + d2, d3), memory_config: (10, 23, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,1,1,32,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 32, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,1,32,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,1,1,480,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 480, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,1,480,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 15, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,120,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 120, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,120,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,120,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 120, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,120,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,20,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 20, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,20,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,40,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 40, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,40,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,40,40,120,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1600 + d1 * 40 + d2, d3), memory_config: (1600, 120, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,40,40,120,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1600 + d1 * 40 + d2, d3), memory_config: (50, 4, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,40,40,40,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1600 + d1 * 40 + d2, d3), memory_config: (1600, 40, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,40,40,40,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1600 + d1 * 40 + d2, d3), memory_config: (50, 2, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,14,14,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,46,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 46, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,46,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,9,9,1248,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 81 + d1 * 9 + d2, d3), memory_config: (81, 1248, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,9,9,1248,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 81 + d1 * 9 + d2, d3), memory_config: (3, 39, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,9,9,1248,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 81 + d1 * 9 + d2, d3), memory_config: (81, 1248, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,9,9,1248,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 81 + d1 * 9 + d2, d3), memory_config: (3, 39, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,9,9,208,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 81 + d1 * 9 + d2, d3), memory_config: (81, 208, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,9,9,208,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 81 + d1 * 9 + d2, d3), memory_config: (3, 7, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,9,9,352,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 81 + d1 * 9 + d2, d3), memory_config: (81, 352, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,9,9,352,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 81 + d1 * 9 + d2, d3), memory_config: (3, 11, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,56,56,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,56,56,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (98, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,16,16,1280,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (256, 1280, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,16,16,1280,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (8, 40, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,16,16,1280,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (256, 1280, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,16,16,1280,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (8, 40, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,8,8,1280,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 8 + d2, d3), memory_config: (64, 1280, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,8,8,1280,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 8 + d2, d3), memory_config: (2, 40, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,30,40,1280,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1200 + d1 * 40 + d2, d3), memory_config: (1200, 1280, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,30,40,1280,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1200 + d1 * 40 + d2, d3), memory_config: (38, 40, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,32,32,1280,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 1280, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,32,32,1280,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (32, 40, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,32,32,640,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 640, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,32,32,640,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (32, 20, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,32,32,640,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 640, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,32,32,640,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (32, 20, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,512,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 512, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,512,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 16, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,8,8,1280,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 8 + d2, d3), memory_config: (64, 1280, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,8,8,1280,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 8 + d2, d3), memory_config: (2, 40, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,8,8,1280,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 8 + d2, d3), memory_config: (64, 1280, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,8,8,1280,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 8 + d2, d3), memory_config: (2, 40, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,112,112,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (12544, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,112,112,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (392, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,112,112,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (12544, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,112,112,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (392, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,120,160,64,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 19200 + d1 * 160 + d2, d3), memory_config: (19200, 64, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,120,160,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 19200 + d1 * 160 + d2, d3), memory_config: (600, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,128,128,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 128 + d2, d3), memory_config: (16384, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,128,128,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 128 + d2, d3), memory_config: (512, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,64,64,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (4096, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,64,64,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (128, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,128,128,64,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 128 + d2, d3), memory_config: (16384, 64, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,128,128,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 128 + d2, d3), memory_config: (512, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,128,128,64,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 128 + d2, d3), memory_config: (16384, 64, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,128,128,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 128 + d2, d3), memory_config: (512, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,32,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 32, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,32,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,512,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 512, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,512,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 16, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,150,150,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 22500 + d1 * 150 + d2, d3), memory_config: (22500, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,150,150,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 22500 + d1 * 150 + d2, d3), memory_config: (704, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,150,150,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 22500 + d1 * 150 + d2, d3), memory_config: (22500, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,150,150,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 22500 + d1 * 150 + d2, d3), memory_config: (704, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,75,75,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5625 + d1 * 75 + d2, d3), memory_config: (5625, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,75,75,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5625 + d1 * 75 + d2, d3), memory_config: (176, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,90,160,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 14400 + d1 * 160 + d2, d3), memory_config: (14400, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,90,160,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 14400 + d1 * 160 + d2, d3), memory_config: (450, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,1,1,128,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 128, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,1,1,128,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 4, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,1,24,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 24, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,1,1,24,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,1,546,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 546, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,1,1,546,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 18, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,224,224,64,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 50176 + d1 * 224 + d2, d3), memory_config: (50176, 64, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,224,224,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 50176 + d1 * 224 + d2, d3), memory_config: (1568, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,16,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,192,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 192, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,192,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 6, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,19,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 19, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,19,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,32,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 32, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,32,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,38,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 38, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,38,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,512,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 512, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,512,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 16, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,512,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 512, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,512,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 16, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,2,2,256,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4 + d1 * 2 + d2, d3), memory_config: (4, 256, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,2,2,256,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4 + d1 * 2 + d2, d3), memory_config: (1, 8, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,30,40,64,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1200 + d1 * 40 + d2, d3), memory_config: (1200, 64, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,30,40,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1200 + d1 * 40 + d2, d3), memory_config: (38, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,32,32,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,32,32,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (32, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,32,32,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,32,32,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (32, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,32,32,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,32,32,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (32, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,2,2,128,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4 + d1 * 2 + d2, d3), memory_config: (4, 128, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,2,2,128,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4 + d1 * 2 + d2, d3), memory_config: (1, 4, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3,3,256,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 9 + d1 * 3 + d2, d3), memory_config: (9, 256, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3,3,256,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 9 + d1 * 3 + d2, d3), memory_config: (1, 8, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,56,56,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,56,56,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (98, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,56,56,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,56,56,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (98, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,56,56,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,56,56,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (98, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,56,56,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,56,56,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (98, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,56,56,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,56,56,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (98, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,56,56,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,56,56,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (98, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,56,56,32,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 32, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,56,56,32,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (98, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,56,56,64,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 64, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,56,56,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (98, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,3,3,128,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 9 + d1 * 3 + d2, d3), memory_config: (9, 128, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3,3,128,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 9 + d1 * 3 + d2, d3), memory_config: (1, 4, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,15,20,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 300 + d1 * 20 + d2, d3), memory_config: (300, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,15,20,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 300 + d1 * 20 + d2, d3), memory_config: (10, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,30,40,320,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1200 + d1 * 40 + d2, d3), memory_config: (1200, 320, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,30,40,320,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1200 + d1 * 40 + d2, d3), memory_config: (38, 10, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,60,80,64,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4800 + d1 * 80 + d2, d3), memory_config: (4800, 64, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,60,80,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4800 + d1 * 80 + d2, d3), memory_config: (150, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,60,80,64,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4800 + d1 * 80 + d2, d3), memory_config: (4800, 64, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,60,80,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4800 + d1 * 80 + d2, d3), memory_config: (150, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,64,64,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (4096, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,64,64,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (128, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,64,64,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (4096, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,64,64,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (128, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,32,32,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,32,32,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (32, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,64,64,255,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (4096, 255, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,64,64,255,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (128, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,64,64,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (4096, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,64,64,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (128, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,32,32,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,32,32,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (32, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,64,64,64,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (4096, 64, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,64,64,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (128, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,75,75,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5625 + d1 * 75 + d2, d3), memory_config: (5625, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,75,75,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5625 + d1 * 75 + d2, d3), memory_config: (176, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,75,75,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5625 + d1 * 75 + d2, d3), memory_config: (5625, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,75,75,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5625 + d1 * 75 + d2, d3), memory_config: (176, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,75,75,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5625 + d1 * 75 + d2, d3), memory_config: (5625, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,75,75,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5625 + d1 * 75 + d2, d3), memory_config: (176, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,32,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 32, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,32,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,90,160,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 14400 + d1 * 160 + d2, d3), memory_config: (14400, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,90,160,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 14400 + d1 * 160 + d2, d3), memory_config: (450, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,90,160,512,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 14400 + d1 * 160 + d2, d3), memory_config: (14400, 512, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,90,160,512,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 14400 + d1 * 160 + d2, d3), memory_config: (450, 16, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,56,56,12,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 12, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,56,56,12,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (98, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,1344,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 1344, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,1344,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 42, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,1344,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 1344, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,1344,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 42, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,2520,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 2520, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,2520,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 79, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,2520,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 2520, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,2520,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 79, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,1344,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 1344, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,1344,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 42, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,19,19,816,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 361 + d1 * 19 + d2, d3), memory_config: (361, 816, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,19,19,816,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 361 + d1 * 19 + d2, d3), memory_config: (12, 26, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,10,10,1392,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (100, 1392, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,10,10,1392,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (4, 44, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,10,10,1392,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (100, 1392, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,10,10,1392,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (4, 44, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,10,10,232,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (100, 232, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,10,10,232,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (4, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,10,10,384,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (100, 384, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,10,10,384,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (4, 12, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,1392,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 1392, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,1392,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 44, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,1392,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 1392, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,1392,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 44, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,3712,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 3712, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,3712,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 116, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,3712,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 3712, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,3712,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 116, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,1,1,174,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 174, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,1,174,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 6, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,1,1,348,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 348, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,1,348,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 11, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,1392,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 1392, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,1392,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 44, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,56,56,68,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 68, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,56,56,68,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (98, 3, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,1024,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 1024, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,1024,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 32, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,288,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 288, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,288,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 9, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,75,75,144,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5625 + d1 * 75 + d2, d3), memory_config: (5625, 144, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,75,75,144,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5625 + d1 * 75 + d2, d3), memory_config: (176, 5, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,95,95,144,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 9025 + d1 * 95 + d2, d3), memory_config: (9025, 144, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,95,95,144,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 9025 + d1 * 95 + d2, d3), memory_config: (283, 5, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,28,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 28, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,28,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,32,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 32, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,32,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,40,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 40, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,40,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,30,30,40,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 900 + d1 * 30 + d2, d3), memory_config: (900, 40, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,30,30,40,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 900 + d1 * 30 + d2, d3), memory_config: (29, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,33,33,48,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1089 + d1 * 33 + d2, d3), memory_config: (1089, 48, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,33,33,48,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1089 + d1 * 33 + d2, d3), memory_config: (35, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,56,56,144,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 144, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,56,56,144,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (98, 5, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,144,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 144, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,144,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 5, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,56,56,24,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 24, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,56,56,24,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (98, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,144,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 144, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,144,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 5, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,60,60,144,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3600 + d1 * 60 + d2, d3), memory_config: (3600, 144, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,60,60,144,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3600 + d1 * 60 + d2, d3), memory_config: (113, 5, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,60,60,24,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3600 + d1 * 60 + d2, d3), memory_config: (3600, 24, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,60,60,24,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3600 + d1 * 60 + d2, d3), memory_config: (113, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,30,30,144,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 900 + d1 * 30 + d2, d3), memory_config: (900, 144, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,30,30,144,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 900 + d1 * 30 + d2, d3), memory_config: (29, 5, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,65,65,144,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4225 + d1 * 65 + d2, d3), memory_config: (4225, 144, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,65,65,144,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4225 + d1 * 65 + d2, d3), memory_config: (133, 5, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,65,65,24,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4225 + d1 * 65 + d2, d3), memory_config: (4225, 24, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,65,65,24,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4225 + d1 * 65 + d2, d3), memory_config: (133, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,33,33,144,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1089 + d1 * 33 + d2, d3), memory_config: (1089, 144, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,33,33,144,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1089 + d1 * 33 + d2, d3), memory_config: (35, 5, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,75,75,32,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5625 + d1 * 75 + d2, d3), memory_config: (5625, 32, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,75,75,32,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5625 + d1 * 75 + d2, d3), memory_config: (176, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,1024,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 1024, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,1024,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 32, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,144,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 144, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,144,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 5, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,18,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 18, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,18,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,36,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 36, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,36,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,72,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 72, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,72,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 3, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,95,95,32,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 9025 + d1 * 95 + d2, d3), memory_config: (9025, 32, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,95,95,32,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 9025 + d1 * 95 + d2, d3), memory_config: (283, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,58,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 58, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,58,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,10,10,1536,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (100, 1536, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,10,10,1536,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (4, 48, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,10,10,1536,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (100, 1536, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,10,10,1536,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (4, 48, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,10,10,2048,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (100, 2048, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,10,10,2048,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (4, 64, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,8,8,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 8 + d2, d3), memory_config: (64, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,8,8,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 8 + d2, d3), memory_config: (2, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,8,8,384,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 8 + d2, d3), memory_config: (64, 384, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,8,8,384,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 8 + d2, d3), memory_config: (2, 12, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,68,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 68, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,68,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 3, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,320,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 320, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,320,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 10, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,24,24,960,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 576 + d1 * 24 + d2, d3), memory_config: (576, 960, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,24,24,960,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 576 + d1 * 24 + d2, d3), memory_config: (18, 30, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,160,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 160, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,160,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 5, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,160,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 160, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,160,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 5, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,16,16,160,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (256, 160, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,16,16,160,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (8, 5, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,16,16,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (256, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,16,16,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (8, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,3,3,960,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 9 + d1 * 3 + d2, d3), memory_config: (9, 960, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,3,3,960,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 9 + d1 * 3 + d2, d3), memory_config: (1, 30, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,56,56,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,56,56,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (98, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,73,73,64,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5329 + d1 * 73 + d2, d3), memory_config: (5329, 64, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,73,73,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5329 + d1 * 73 + d2, d3), memory_config: (167, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,320,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 320, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,320,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 10, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,480,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 480, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,480,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 15, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,960,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 960, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,960,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 30, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,12,12,1632,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 144 + d1 * 12 + d2, d3), memory_config: (144, 1632, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,12,12,1632,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 144 + d1 * 12 + d2, d3), memory_config: (5, 51, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,12,12,1632,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 144 + d1 * 12 + d2, d3), memory_config: (144, 1632, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,12,12,1632,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 144 + d1 * 12 + d2, d3), memory_config: (5, 51, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,12,12,272,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 144 + d1 * 12 + d2, d3), memory_config: (144, 272, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,12,12,272,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 144 + d1 * 12 + d2, d3), memory_config: (5, 9, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,12,12,448,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 144 + d1 * 12 + d2, d3), memory_config: (144, 448, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,12,12,448,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 144 + d1 * 12 + d2, d3), memory_config: (5, 14, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,1,1,672,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 672, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,1,672,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 21, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,112,112,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (12544, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,112,112,16,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (392, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,112,112,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (12544, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,112,112,16,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (392, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,56,56,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,56,56,16,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (98, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,112,112,24,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (12544, 24, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,112,112,24,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (392, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,112,112,64,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (12544, 64, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,112,112,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (392, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,112,112,8,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (12544, 8, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,112,112,8,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (392, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,112,112,96,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (12544, 96, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,112,112,96,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (392, 3, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,120,120,96,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 14400 + d1 * 120 + d2, d3), memory_config: (14400, 96, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,120,120,96,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 14400 + d1 * 120 + d2, d3), memory_config: (450, 3, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,130,130,96,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16900 + d1 * 130 + d2, d3), memory_config: (16900, 96, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,130,130,96,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16900 + d1 * 130 + d2, d3), memory_config: (529, 3, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,48,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 48, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,48,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,4,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 4, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,4,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,160,160,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 25600 + d1 * 160 + d2, d3), memory_config: (25600, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,160,160,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 25600 + d1 * 160 + d2, d3), memory_config: (800, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,160,160,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 25600 + d1 * 160 + d2, d3), memory_config: (25600, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,160,160,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 25600 + d1 * 160 + d2, d3), memory_config: (800, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,160,160,64,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 25600 + d1 * 160 + d2, d3), memory_config: (25600, 64, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,160,160,64,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 25600 + d1 * 160 + d2, d3), memory_config: (800, 2, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,224,224,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 50176 + d1 * 224 + d2, d3), memory_config: (50176, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,224,224,16,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 50176 + d1 * 224 + d2, d3), memory_config: (1568, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,112,112,32,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (12544, 32, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,112,112,32,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (392, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,32,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 32, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,32,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,56,56,24,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 24, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,56,56,24,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (98, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,46,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 46, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,46,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,1,1,1392,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 1392, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,1,1392,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 44, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,1,1,696,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 696, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,1,696,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 22, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,896,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 896, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,896,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 28, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,184,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 184, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,184,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 6, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,40,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 40, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,40,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,80,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 80, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,80,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 3, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,20,20,184,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 400 + d1 * 20 + d2, d3), memory_config: (400, 184, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,20,20,184,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 400 + d1 * 20 + d2, d3), memory_config: (13, 6, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,20,20,80,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 400 + d1 * 20 + d2, d3), memory_config: (400, 80, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,20,20,80,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 400 + d1 * 20 + d2, d3), memory_config: (13, 3, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,7,7,184,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 184, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,184,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 6, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,184,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 184, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,184,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 6, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,144,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 144, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,144,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 5, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,18,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 18, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,18,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,72,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 72, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,72,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 3, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,56,56,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,56,56,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (98, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,56,56,18,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 18, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,56,56,18,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (98, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,18,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 18, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,18,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,56,56,32,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 32, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,56,56,32,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (98, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,36,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 36, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,36,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,16,16,1280,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (256, 1280, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,16,16,1280,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (8, 40, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,16,16,1280,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (256, 1280, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,16,16,1280,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (8, 40, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,32,32,640,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 640, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,32,32,640,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (32, 20, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,32,32,640,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 640, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,32,32,640,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (32, 20, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,192,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 192, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,192,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 6, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,192,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 192, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,192,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 6, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,64,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 64, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,8,8,192,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 8 + d2, d3), memory_config: (64, 192, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,8,8,192,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 8 + d2, d3), memory_config: (2, 6, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,17,17,192,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 17 + d2, d3), memory_config: (289, 192, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,17,17,192,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 17 + d2, d3), memory_config: (10, 6, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,17,17,224,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 17 + d2, d3), memory_config: (289, 224, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,17,17,224,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 17 + d2, d3), memory_config: (10, 7, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,16,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,192,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 192, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,192,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 6, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,192,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 192, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,192,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 6, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,32,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 32, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,32,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,64,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 64, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,96,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 96, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,96,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 3, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,35,35,224,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1225 + d1 * 35 + d2, d3), memory_config: (1225, 224, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,35,35,224,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1225 + d1 * 35 + d2, d3), memory_config: (39, 7, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,38,38,48,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1444 + d1 * 38 + d2, d3), memory_config: (1444, 48, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,38,38,48,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1444 + d1 * 38 + d2, d3), memory_config: (46, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,48,48,56,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 2304 + d1 * 48 + d2, d3), memory_config: (2304, 56, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,48,48,56,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 2304 + d1 * 48 + d2, d3), memory_config: (72, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,56,56,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,56,56,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (98, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,35,35,192,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1225 + d1 * 35 + d2, d3), memory_config: (1225, 192, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,35,35,192,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1225 + d1 * 35 + d2, d3), memory_config: (39, 6, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,75,75,192,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5625 + d1 * 75 + d2, d3), memory_config: (5625, 192, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,75,75,192,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5625 + d1 * 75 + d2, d3), memory_config: (176, 6, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,75,75,32,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5625 + d1 * 75 + d2, d3), memory_config: (5625, 32, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,75,75,32,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5625 + d1 * 75 + d2, d3), memory_config: (176, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,38,38,192,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1444 + d1 * 38 + d2, d3), memory_config: (1444, 192, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,38,38,192,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1444 + d1 * 38 + d2, d3), memory_config: (46, 6, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,1152,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 1152, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,1152,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 36, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,384,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 384, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,384,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 12, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,8,8,1152,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 8 + d2, d3), memory_config: (64, 1152, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,8,8,1152,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 8 + d2, d3), memory_config: (2, 36, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,95,95,192,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 9025 + d1 * 95 + d2, d3), memory_config: (9025, 192, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,95,95,192,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 9025 + d1 * 95 + d2, d3), memory_config: (283, 6, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,95,95,32,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 9025 + d1 * 95 + d2, d3), memory_config: (9025, 32, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,95,95,32,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 9025 + d1 * 95 + d2, d3), memory_config: (283, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,48,48,192,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 2304 + d1 * 48 + d2, d3), memory_config: (2304, 192, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,48,48,192,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 2304 + d1 * 48 + d2, d3), memory_config: (72, 6, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,40,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 40, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,40,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,16,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,26,26,32,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 676 + d1 * 26 + d2, d3), memory_config: (676, 32, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,26,26,32,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 676 + d1 * 26 + d2, d3), memory_config: (22, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,200,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 200, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,200,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 7, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,40,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 40, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,40,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,80,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 80, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,80,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 3, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,20,20,200,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 400 + d1 * 20 + d2, d3), memory_config: (400, 200, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,20,20,200,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 400 + d1 * 20 + d2, d3), memory_config: (13, 7, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,20,20,80,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 400 + d1 * 20 + d2, d3), memory_config: (400, 80, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,20,20,80,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 400 + d1 * 20 + d2, d3), memory_config: (13, 3, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,7,7,200,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 200, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,200,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 7, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,200,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 200, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,200,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 7, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,2048,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 2048, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,2048,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 64, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,15,20,2048,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 300 + d1 * 20 + d2, d3), memory_config: (300, 2048, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,15,20,2048,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 300 + d1 * 20 + d2, d3), memory_config: (10, 64, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,23,40,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 920 + d1 * 40 + d2, d3), memory_config: (920, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,23,40,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 920 + d1 * 40 + d2, d3), memory_config: (29, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,23,40,512,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 920 + d1 * 40 + d2, d3), memory_config: (920, 512, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,23,40,512,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 920 + d1 * 40 + d2, d3), memory_config: (29, 16, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,1024,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 1024, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,1024,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 32, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,2048,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 2048, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,2048,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 64, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,2048,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 2048, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,2048,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 64, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,512,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 512, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,512,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 16, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,9,9,1248,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 81 + d1 * 9 + d2, d3), memory_config: (81, 1248, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,9,9,1248,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 81 + d1 * 9 + d2, d3), memory_config: (3, 39, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,1,1,72,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 72, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,1,72,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 3, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,20,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 20, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,20,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,78,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 78, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,78,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 3, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,17,17,224,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 17 + d2, d3), memory_config: (289, 224, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,17,17,224,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 17 + d2, d3), memory_config: (10, 7, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,17,17,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 17 + d2, d3), memory_config: (289, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,17,17,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 17 + d2, d3), memory_config: (10, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,17,17,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 17 + d2, d3), memory_config: (289, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,17,17,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 17 + d2, d3), memory_config: (10, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,17,17,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 17 + d2, d3), memory_config: (289, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,17,17,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 17 + d2, d3), memory_config: (10, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,56,56,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,56,56,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (98, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,224,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 224, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,224,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 7, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,224,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 224, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,224,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 7, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,10,10,1392,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (100, 1392, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,10,10,1392,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (4, 44, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,56,56,232,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 232, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,56,56,232,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (98, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,1,1,58,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 58, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,1,58,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,1,1,8,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 8, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,1,8,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,56,56,232,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 232, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,56,56,232,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (98, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,56,56,232,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 232, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,56,56,232,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (98, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,56,56,696,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 696, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,56,56,696,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (98, 22, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,696,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 696, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,696,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 22, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,68,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 68, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,68,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 3, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,240,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 240, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,240,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,240,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 240, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,240,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,240,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 240, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,240,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,40,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 40, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,40,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,80,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 80, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,80,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 3, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,15,15,80,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 225 + d1 * 15 + d2, d3), memory_config: (225, 80, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,15,15,80,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 225 + d1 * 15 + d2, d3), memory_config: (8, 3, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,1,1,960,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 960, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,1,960,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 30, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,20,20,80,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 400 + d1 * 20 + d2, d3), memory_config: (400, 80, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,20,20,80,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 400 + d1 * 20 + d2, d3), memory_config: (13, 3, 'tile<32x32, f32>', 'system_memory')nannan
NameInput ShapesInput LayoutsAttributesOutput ShapesOutput LayoutsPCCATOL
ttnn.to_layouttensor<[1,14,14,240,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 240, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,240,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,240,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 240, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,240,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,40,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 40, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,40,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,240,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 240, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,240,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,30,30,240,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 900 + d1 * 30 + d2, d3), memory_config: (900, 240, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,30,30,240,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 900 + d1 * 30 + d2, d3), memory_config: (29, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,30,30,40,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 900 + d1 * 30 + d2, d3), memory_config: (900, 40, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,30,30,40,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 900 + d1 * 30 + d2, d3), memory_config: (29, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,15,15,240,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 225 + d1 * 15 + d2, d3), memory_config: (225, 240, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,15,15,240,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 225 + d1 * 15 + d2, d3), memory_config: (8, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,20,20,240,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 400 + d1 * 20 + d2, d3), memory_config: (400, 240, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,20,20,240,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 400 + d1 * 20 + d2, d3), memory_config: (13, 8, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,112,112,24,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (12544, 24, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,112,112,24,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (392, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,64,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 64, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,150,150,144,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 22500 + d1 * 150 + d2, d3), memory_config: (22500, 144, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,150,150,144,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 22500 + d1 * 150 + d2, d3), memory_config: (704, 5, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,190,190,144,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 36100 + d1 * 190 + d2, d3), memory_config: (36100, 144, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,190,190,144,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 36100 + d1 * 190 + d2, d3), memory_config: (1129, 5, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,1,1,72,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 72, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,1,72,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 3, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,40,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 40, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,40,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,72,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 72, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,72,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 3, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,56,56,144,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 144, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,56,56,144,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (98, 5, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,56,56,14,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 14, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,56,56,14,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (98, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,24,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 24, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,24,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,56,56,36,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 36, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,56,56,36,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (98, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,56,56,72,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 72, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,56,56,72,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (98, 3, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,60,60,144,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3600 + d1 * 60 + d2, d3), memory_config: (3600, 144, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,60,60,144,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3600 + d1 * 60 + d2, d3), memory_config: (113, 5, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,65,65,144,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4225 + d1 * 65 + d2, d3), memory_config: (4225, 144, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,65,65,144,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4225 + d1 * 65 + d2, d3), memory_config: (133, 5, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,80,80,72,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 6400 + d1 * 80 + d2, d3), memory_config: (6400, 72, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,80,80,72,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 6400 + d1 * 80 + d2, d3), memory_config: (200, 3, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,7,7,2520,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 2520, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,2520,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 79, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,2520,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 2520, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,2520,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 79, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,16,16,1280,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (256, 1280, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,16,16,1280,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (8, 40, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,16,16,1280,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (256, 1280, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,16,16,1280,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (8, 40, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,8,8,1280,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 8 + d2, d3), memory_config: (64, 1280, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,8,8,1280,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 8 + d2, d3), memory_config: (2, 40, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,8,8,1280,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 8 + d2, d3), memory_config: (64, 1280, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,8,8,1280,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 8 + d2, d3), memory_config: (2, 40, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,5,5,256,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 25 + d1 * 5 + d2, d3), memory_config: (25, 256, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,5,5,256,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 25 + d1 * 5 + d2, d3), memory_config: (1, 8, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,112,112,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (12544, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,112,112,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (392, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,120,160,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 19200 + d1 * 160 + d2, d3), memory_config: (19200, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,120,160,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 19200 + d1 * 160 + d2, d3), memory_config: (600, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,128,128,150,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 128 + d2, d3), memory_config: (16384, 150, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,128,128,150,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 128 + d2, d3), memory_config: (512, 5, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,1024,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 1024, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,1024,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 32, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,512,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 512, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,512,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 16, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,512,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 512, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,512,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 16, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,512,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 512, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,512,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 16, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,16,16,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (256, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,16,16,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (8, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,16,16,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (256, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,16,16,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (8, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,16,16,512,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (256, 512, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,16,16,512,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (8, 16, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,17,17,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 17 + d2, d3), memory_config: (289, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,17,17,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 17 + d2, d3), memory_config: (10, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,17,17,320,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 17 + d2, d3), memory_config: (289, 320, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,17,17,320,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 17 + d2, d3), memory_config: (10, 10, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,180,320,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 57600 + d1 * 320 + d2, d3), memory_config: (57600, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,180,320,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 57600 + d1 * 320 + d2, d3), memory_config: (1800, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,90,160,512,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 14400 + d1 * 160 + d2, d3), memory_config: (14400, 512, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,90,160,512,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 14400 + d1 * 160 + d2, d3), memory_config: (450, 16, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,180,320,64,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 57600 + d1 * 320 + d2, d3), memory_config: (57600, 64, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,180,320,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 57600 + d1 * 320 + d2, d3), memory_config: (1800, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,1,1,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,1,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,160,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 160, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,160,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 5, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,20,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 20, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,20,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,32,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 32, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,32,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,512,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 512, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,512,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 16, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,512,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 512, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,512,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 16, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,512,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 512, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,512,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 16, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,512,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 512, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,512,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 16, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,64,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 64, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,2,2,24,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4 + d1 * 2 + d2, d3), memory_config: (4, 24, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,2,2,24,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4 + d1 * 2 + d2, d3), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,2,2,256,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4 + d1 * 2 + d2, d3), memory_config: (4, 256, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,2,2,256,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4 + d1 * 2 + d2, d3), memory_config: (1, 8, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,2,2,546,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4 + d1 * 2 + d2, d3), memory_config: (4, 546, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,2,2,546,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4 + d1 * 2 + d2, d3), memory_config: (1, 18, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,2,2,64,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4 + d1 * 2 + d2, d3), memory_config: (4, 64, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,2,2,64,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4 + d1 * 2 + d2, d3), memory_config: (1, 2, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,32,32,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,32,32,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (32, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,32,32,255,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 255, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,32,32,255,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (32, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,32,32,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,32,32,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (32, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,32,32,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,32,32,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (32, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,16,16,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (256, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,16,16,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (8, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,32,32,512,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 512, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,32,32,512,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (32, 16, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,16,16,512,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (256, 512, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,16,16,512,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (8, 16, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,38,38,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1444 + d1 * 38 + d2, d3), memory_config: (1444, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,38,38,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1444 + d1 * 38 + d2, d3), memory_config: (46, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,38,38,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1444 + d1 * 38 + d2, d3), memory_config: (1444, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,38,38,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1444 + d1 * 38 + d2, d3), memory_config: (46, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,38,38,728,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1444 + d1 * 38 + d2, d3), memory_config: (1444, 728, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,38,38,728,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1444 + d1 * 38 + d2, d3), memory_config: (46, 23, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,3,3,128,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 9 + d1 * 3 + d2, d3), memory_config: (9, 128, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3,3,128,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 9 + d1 * 3 + d2, d3), memory_config: (1, 4, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3,3,24,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 9 + d1 * 3 + d2, d3), memory_config: (9, 24, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3,3,24,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 9 + d1 * 3 + d2, d3), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3,3,256,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 9 + d1 * 3 + d2, d3), memory_config: (9, 256, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3,3,256,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 9 + d1 * 3 + d2, d3), memory_config: (1, 8, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3,3,546,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 9 + d1 * 3 + d2, d3), memory_config: (9, 546, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3,3,546,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 9 + d1 * 3 + d2, d3), memory_config: (1, 18, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,45,80,1024,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3600 + d1 * 80 + d2, d3), memory_config: (3600, 1024, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,45,80,1024,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3600 + d1 * 80 + d2, d3), memory_config: (113, 32, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,45,80,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3600 + d1 * 80 + d2, d3), memory_config: (3600, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,45,80,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3600 + d1 * 80 + d2, d3), memory_config: (113, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1024,256,1,1,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 + d2, d3), memory_config: (8192, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1024,256,1,1,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 + d2, d3), memory_config: (262144, 1, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,512,1,1024,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 512 + d1 + d2, d3), memory_config: (512, 1024, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,512,1,1024,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 512 + d1 + d2, d3), memory_config: (16, 32, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,56,56,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,56,56,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (98, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,56,56,18,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 18, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,56,56,18,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (98, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,56,56,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,56,56,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (98, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,56,56,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,56,56,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (98, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,56,56,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,56,56,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (98, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,56,56,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,56,56,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (98, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,36,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 36, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,36,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,56,56,512,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 512, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,56,56,512,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (98, 16, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,512,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 512, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,512,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 16, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,56,56,64,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 64, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,56,56,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (98, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,5,5,512,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 25 + d1 * 5 + d2, d3), memory_config: (25, 512, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,5,5,512,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 25 + d1 * 5 + d2, d3), memory_config: (1, 16, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,64,64,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (4096, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,64,64,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (128, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,64,64,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (4096, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,64,64,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (128, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,64,64,255,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (4096, 255, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,64,64,255,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (128, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,64,64,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (4096, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,64,64,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (128, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,32,32,512,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 512, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,32,32,512,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (32, 16, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,64,64,64,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (4096, 64, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,64,64,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (128, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,75,75,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5625 + d1 * 75 + d2, d3), memory_config: (5625, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,75,75,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5625 + d1 * 75 + d2, d3), memory_config: (176, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,38,38,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1444 + d1 * 38 + d2, d3), memory_config: (1444, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,38,38,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1444 + d1 * 38 + d2, d3), memory_config: (46, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,75,75,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5625 + d1 * 75 + d2, d3), memory_config: (5625, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,75,75,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5625 + d1 * 75 + d2, d3), memory_config: (176, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,38,38,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1444 + d1 * 38 + d2, d3), memory_config: (1444, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,38,38,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1444 + d1 * 38 + d2, d3), memory_config: (46, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,1024,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 1024, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,1024,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 32, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,512,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 512, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,512,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 16, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,45,80,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3600 + d1 * 80 + d2, d3), memory_config: (3600, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,45,80,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3600 + d1 * 80 + d2, d3), memory_config: (113, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,12,12,1632,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 144 + d1 * 12 + d2, d3), memory_config: (144, 1632, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,12,12,1632,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 144 + d1 * 12 + d2, d3), memory_config: (5, 51, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,160,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 160, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,160,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 5, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,34,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 34, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,34,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,17,17,88,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 17 + d2, d3), memory_config: (289, 88, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,17,17,88,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 17 + d2, d3), memory_config: (10, 3, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,19,19,96,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 361 + d1 * 19 + d2, d3), memory_config: (361, 96, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,19,19,96,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 361 + d1 * 19 + d2, d3), memory_config: (12, 3, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,33,33,288,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1089 + d1 * 33 + d2, d3), memory_config: (1089, 288, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,33,33,288,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1089 + d1 * 33 + d2, d3), memory_config: (35, 9, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,33,33,48,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1089 + d1 * 33 + d2, d3), memory_config: (1089, 48, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,33,33,48,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1089 + d1 * 33 + d2, d3), memory_config: (35, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,17,17,288,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 17 + d2, d3), memory_config: (289, 288, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,17,17,288,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 17 + d2, d3), memory_config: (10, 9, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,38,38,288,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1444 + d1 * 38 + d2, d3), memory_config: (1444, 288, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,38,38,288,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1444 + d1 * 38 + d2, d3), memory_config: (46, 9, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,38,38,48,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1444 + d1 * 38 + d2, d3), memory_config: (1444, 48, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,38,38,48,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1444 + d1 * 38 + d2, d3), memory_config: (46, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,19,19,288,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 361 + d1 * 19 + d2, d3), memory_config: (361, 288, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,19,19,288,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 361 + d1 * 19 + d2, d3), memory_config: (12, 9, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,16,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,134,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 134, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,134,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 5, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,116,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 116, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,116,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[3072,1,4,1,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4 + d1 * 4 + d2, d3), memory_config: (384, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[3072,1,4,1,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4 + d1 * 4 + d2, d3), memory_config: (12288, 1, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,13,1,3072,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 13 + d1 + d2, d3), memory_config: (13, 3072, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,13,1,3072,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 13 + d1 + d2, d3), memory_config: (1, 96, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[3072,1,4,1,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4 + d1 * 4 + d2, d3), memory_config: (384, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[3072,1,4,1,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4 + d1 * 4 + d2, d3), memory_config: (12288, 1, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,14,1,3072,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 14 + d1 + d2, d3), memory_config: (14, 3072, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,1,3072,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 14 + d1 + d2, d3), memory_config: (1, 96, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[3072,1,4,1,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4 + d1 * 4 + d2, d3), memory_config: (384, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[3072,1,4,1,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4 + d1 * 4 + d2, d3), memory_config: (12288, 1, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,15,1,3072,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 15 + d1 + d2, d3), memory_config: (15, 3072, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,15,1,3072,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 15 + d1 + d2, d3), memory_config: (1, 96, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[3072,1,4,1,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4 + d1 * 4 + d2, d3), memory_config: (384, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[3072,1,4,1,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4 + d1 * 4 + d2, d3), memory_config: (12288, 1, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,16,1,3072,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16 + d1 + d2, d3), memory_config: (16, 3072, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,16,1,3072,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16 + d1 + d2, d3), memory_config: (1, 96, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[3072,1,4,1,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4 + d1 * 4 + d2, d3), memory_config: (384, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[3072,1,4,1,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4 + d1 * 4 + d2, d3), memory_config: (12288, 1, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,17,1,3072,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 17 + d1 + d2, d3), memory_config: (17, 3072, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,17,1,3072,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 17 + d1 + d2, d3), memory_config: (1, 96, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[3072,1,4,1,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4 + d1 * 4 + d2, d3), memory_config: (384, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[3072,1,4,1,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4 + d1 * 4 + d2, d3), memory_config: (12288, 1, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,18,1,3072,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 18 + d1 + d2, d3), memory_config: (18, 3072, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,18,1,3072,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 18 + d1 + d2, d3), memory_config: (1, 96, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[3072,1,4,1,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4 + d1 * 4 + d2, d3), memory_config: (384, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[3072,1,4,1,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4 + d1 * 4 + d2, d3), memory_config: (12288, 1, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,9,1,3072,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 9 + d1 + d2, d3), memory_config: (9, 3072, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,9,1,3072,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 9 + d1 + d2, d3), memory_config: (1, 96, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[3072,1,4,1,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4 + d1 * 4 + d2, d3), memory_config: (384, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[3072,1,4,1,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4 + d1 * 4 + d2, d3), memory_config: (12288, 1, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,10,1,3072,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 10 + d1 + d2, d3), memory_config: (10, 3072, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,10,1,3072,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 10 + d1 + d2, d3), memory_config: (1, 96, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[3072,1,4,1,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4 + d1 * 4 + d2, d3), memory_config: (384, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[3072,1,4,1,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4 + d1 * 4 + d2, d3), memory_config: (12288, 1, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,11,1,3072,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 11 + d1 + d2, d3), memory_config: (11, 3072, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,11,1,3072,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 11 + d1 + d2, d3), memory_config: (1, 96, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[768,768,1,1,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 768 + d1 + d2, d3), memory_config: (18432, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[768,768,1,1,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 768 + d1 + d2, d3), memory_config: (589824, 1, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,8,1,768,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 8 + d1 + d2, d3), memory_config: (8, 768, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,8,1,768,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 8 + d1 + d2, d3), memory_config: (1, 24, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[3072,1,4,1,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4 + d1 * 4 + d2, d3), memory_config: (384, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[3072,1,4,1,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4 + d1 * 4 + d2, d3), memory_config: (12288, 1, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,12,1,3072,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12 + d1 + d2, d3), memory_config: (12, 3072, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,12,1,3072,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12 + d1 + d2, d3), memory_config: (1, 96, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,58,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 58, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,58,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,40,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 40, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,40,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,8,8,320,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 8 + d2, d3), memory_config: (64, 320, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,8,8,320,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 8 + d2, d3), memory_config: (2, 10, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,15,20,320,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 300 + d1 * 20 + d2, d3), memory_config: (300, 320, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,15,20,320,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 300 + d1 * 20 + d2, d3), memory_config: (10, 10, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,15,20,512,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 300 + d1 * 20 + d2, d3), memory_config: (300, 512, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,15,20,512,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 300 + d1 * 20 + d2, d3), memory_config: (10, 16, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,30,40,64,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1200 + d1 * 40 + d2, d3), memory_config: (1200, 64, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,30,40,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1200 + d1 * 40 + d2, d3), memory_config: (38, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,32,32,640,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 640, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,32,32,640,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (32, 20, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,32,32,640,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 640, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,32,32,640,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (32, 20, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,64,64,320,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (4096, 320, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,64,64,320,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (128, 10, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,64,64,320,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (4096, 320, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,64,64,320,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (128, 10, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,32,32,320,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 320, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,32,32,320,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (32, 10, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,64,64,4,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (4096, 4, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,64,64,4,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (128, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,1280,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 1280, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,1280,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 40, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,8,8,1280,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 8 + d2, d3), memory_config: (64, 1280, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,8,8,1280,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 8 + d2, d3), memory_config: (2, 40, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,320,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 320, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,320,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 10, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,112,112,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (12544, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,112,112,16,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (392, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,112,112,232,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (12544, 232, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,112,112,232,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (392, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,56,56,232,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 232, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,56,56,232,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (98, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,112,112,32,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (12544, 32, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,112,112,32,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (392, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,112,112,336,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (12544, 336, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,112,112,336,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (392, 11, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,56,56,336,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 336, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,56,56,336,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (98, 11, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,112,112,64,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (12544, 64, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,112,112,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (392, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,112,112,64,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (12544, 64, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,112,112,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (392, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,56,56,64,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 64, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,56,56,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (98, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,120,120,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 14400 + d1 * 120 + d2, d3), memory_config: (14400, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,120,120,16,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 14400 + d1 * 120 + d2, d3), memory_config: (450, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,120,120,32,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 14400 + d1 * 120 + d2, d3), memory_config: (14400, 32, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,120,120,32,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 14400 + d1 * 120 + d2, d3), memory_config: (450, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,120,160,2,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 19200 + d1 * 160 + d2, d3), memory_config: (19200, 2, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,120,160,2,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 19200 + d1 * 160 + d2, d3), memory_config: (600, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,128,128,32,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 128 + d2, d3), memory_config: (16384, 32, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,128,128,32,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 128 + d2, d3), memory_config: (512, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,128,128,32,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 128 + d2, d3), memory_config: (16384, 32, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,128,128,32,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 128 + d2, d3), memory_config: (512, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,16,16,32,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (256, 32, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,16,16,32,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (8, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,64,64,64,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (4096, 64, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,64,64,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (128, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,128,128,64,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 128 + d2, d3), memory_config: (16384, 64, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,128,128,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 128 + d2, d3), memory_config: (512, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,130,130,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16900 + d1 * 130 + d2, d3), memory_config: (16900, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,130,130,16,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16900 + d1 * 130 + d2, d3), memory_config: (529, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,130,130,32,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16900 + d1 * 130 + d2, d3), memory_config: (16900, 32, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,130,130,32,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16900 + d1 * 130 + d2, d3), memory_config: (529, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,147,147,64,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 21609 + d1 * 147 + d2, d3), memory_config: (21609, 64, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,147,147,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 21609 + d1 * 147 + d2, d3), memory_config: (676, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,147,147,32,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 21609 + d1 * 147 + d2, d3), memory_config: (21609, 32, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,147,147,32,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 21609 + d1 * 147 + d2, d3), memory_config: (676, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,64,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 64, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,150,150,24,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 22500 + d1 * 150 + d2, d3), memory_config: (22500, 24, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,150,150,24,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 22500 + d1 * 150 + d2, d3), memory_config: (704, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,150,150,32,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 22500 + d1 * 150 + d2, d3), memory_config: (22500, 32, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,150,150,32,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 22500 + d1 * 150 + d2, d3), memory_config: (704, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,150,150,64,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 22500 + d1 * 150 + d2, d3), memory_config: (22500, 64, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,150,150,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 22500 + d1 * 150 + d2, d3), memory_config: (704, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,190,190,24,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 36100 + d1 * 190 + d2, d3), memory_config: (36100, 24, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,190,190,24,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 36100 + d1 * 190 + d2, d3), memory_config: (1129, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,190,190,32,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 36100 + d1 * 190 + d2, d3), memory_config: (36100, 32, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,190,190,32,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 36100 + d1 * 190 + d2, d3), memory_config: (1129, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,1,1,120,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 120, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,1,120,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,256,256,1,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 65536 + d1 * 256 + d2, d3), memory_config: (65536, 1, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,256,256,1,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 65536 + d1 * 256 + d2, d3), memory_config: (2048, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,256,256,32,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 65536 + d1 * 256 + d2, d3), memory_config: (65536, 32, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,256,256,32,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 65536 + d1 * 256 + d2, d3), memory_config: (2048, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,256,256,64,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 65536 + d1 * 256 + d2, d3), memory_config: (65536, 64, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,256,256,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 65536 + d1 * 256 + d2, d3), memory_config: (2048, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,128,128,64,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 128 + d2, d3), memory_config: (16384, 64, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,128,128,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 128 + d2, d3), memory_config: (512, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,24,24,64,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 576 + d1 * 24 + d2, d3), memory_config: (576, 64, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,24,24,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 576 + d1 * 24 + d2, d3), memory_config: (18, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,192,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 192, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,192,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 6, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,96,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 96, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,96,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 3, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,30,40,2,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1200 + d1 * 40 + d2, d3), memory_config: (1200, 2, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,30,40,2,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1200 + d1 * 40 + d2, d3), memory_config: (38, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,256,256,64,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 65536 + d1 * 256 + d2, d3), memory_config: (65536, 64, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,256,256,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 65536 + d1 * 256 + d2, d3), memory_config: (2048, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,56,56,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,56,56,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (98, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,56,56,32,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 32, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,56,56,32,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (98, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,56,56,64,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 64, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,56,56,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (98, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,60,80,2,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4800 + d1 * 80 + d2, d3), memory_config: (4800, 2, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,60,80,2,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4800 + d1 * 80 + d2, d3), memory_config: (150, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,75,75,192,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5625 + d1 * 75 + d2, d3), memory_config: (5625, 192, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,75,75,192,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5625 + d1 * 75 + d2, d3), memory_config: (176, 6, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,95,95,192,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 9025 + d1 * 95 + d2, d3), memory_config: (9025, 192, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,95,95,192,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 9025 + d1 * 95 + d2, d3), memory_config: (283, 6, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,56,56,336,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 336, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,56,56,336,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (98, 11, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,336,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 336, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,336,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 11, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,24,24,112,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 576 + d1 * 24 + d2, d3), memory_config: (576, 112, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,24,24,112,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 576 + d1 * 24 + d2, d3), memory_config: (18, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,48,48,336,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 2304 + d1 * 48 + d2, d3), memory_config: (2304, 336, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,48,48,336,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 2304 + d1 * 48 + d2, d3), memory_config: (72, 11, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,48,48,56,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 2304 + d1 * 48 + d2, d3), memory_config: (2304, 56, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,48,48,56,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 2304 + d1 * 48 + d2, d3), memory_config: (72, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,24,24,336,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 576 + d1 * 24 + d2, d3), memory_config: (576, 336, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,24,24,336,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 576 + d1 * 24 + d2, d3), memory_config: (18, 11, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,56,56,336,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 336, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,56,56,336,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (98, 11, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,56,56,336,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 336, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,56,56,336,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (98, 11, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,56,56,672,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 672, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,56,56,672,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (98, 21, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,672,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 672, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,672,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 21, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,1,1,1392,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 1392, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,1,1392,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 44, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,1,1,3712,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 3712, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,1,3712,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 116, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,20,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 20, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,20,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,9,9,1280,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 81 + d1 * 9 + d2, d3), memory_config: (81, 1280, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,9,9,1280,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 81 + d1 * 9 + d2, d3), memory_config: (3, 40, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,68,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 68, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,68,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 3, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,98,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 98, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,98,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,144,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 144, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,144,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 5, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,18,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 18, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,18,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,36,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 36, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,36,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,36,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 36, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,36,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,64,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 64, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,72,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 72, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,72,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 3, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,56,56,36,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 36, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,56,56,36,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (98, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,3712,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 3712, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,3712,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 116, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,1,1,348,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 348, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,1,348,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 11, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,3712,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 3712, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,3712,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 116, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,10,10,1280,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (100, 1280, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,10,10,1280,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (4, 40, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,384,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 384, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,384,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 12, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,64,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 64, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,96,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 96, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,96,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 3, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,35,35,192,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1225 + d1 * 35 + d2, d3), memory_config: (1225, 192, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,35,35,192,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1225 + d1 * 35 + d2, d3), memory_config: (39, 6, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,17,17,384,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 17 + d2, d3), memory_config: (289, 384, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,17,17,384,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 17 + d2, d3), memory_config: (10, 12, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,35,35,64,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1225 + d1 * 35 + d2, d3), memory_config: (1225, 64, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,35,35,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1225 + d1 * 35 + d2, d3), memory_config: (39, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,35,35,96,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1225 + d1 * 35 + d2, d3), memory_config: (1225, 96, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,35,35,96,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1225 + d1 * 35 + d2, d3), memory_config: (39, 3, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,64,64,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (4096, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,64,64,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (128, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,8,8,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 8 + d2, d3), memory_config: (64, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,8,8,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 8 + d2, d3), memory_config: (2, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,8,8,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 8 + d2, d3), memory_config: (64, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,8,8,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 8 + d2, d3), memory_config: (2, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,8,8,448,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 8 + d2, d3), memory_config: (64, 448, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,8,8,448,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 8 + d2, d3), memory_config: (2, 14, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,256,256,192,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 65536 + d1 * 256 + d2, d3), memory_config: (65536, 192, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,256,256,192,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 65536 + d1 * 256 + d2, d3), memory_config: (2048, 6, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,14,14,1024,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 1024, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,1024,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 32, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,56,56,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,56,56,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (98, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,112,112,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (12544, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,112,112,16,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (392, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,224,224,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 50176 + d1 * 224 + d2, d3), memory_config: (50176, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,224,224,16,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 50176 + d1 * 224 + d2, d3), memory_config: (1568, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,112,112,32,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (12544, 32, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,112,112,32,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (392, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,224,224,64,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 50176 + d1 * 224 + d2, d3), memory_config: (50176, 64, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,224,224,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 50176 + d1 * 224 + d2, d3), memory_config: (1568, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,224,224,64,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 50176 + d1 * 224 + d2, d3), memory_config: (50176, 64, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,224,224,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 50176 + d1 * 224 + d2, d3), memory_config: (1568, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,112,112,64,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (12544, 64, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,112,112,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (392, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,112,112,64,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (12544, 64, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,112,112,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (392, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,768,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 768, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,768,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 24, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,768,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 768, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,768,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 24, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,112,112,32,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (12544, 32, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,112,112,32,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (392, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,120,120,32,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 14400 + d1 * 120 + d2, d3), memory_config: (14400, 32, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,120,120,32,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 14400 + d1 * 120 + d2, d3), memory_config: (450, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,256,256,32,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 65536 + d1 * 256 + d2, d3), memory_config: (65536, 32, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,256,256,32,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 65536 + d1 * 256 + d2, d3), memory_config: (2048, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,130,130,32,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16900 + d1 * 130 + d2, d3), memory_config: (16900, 32, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,130,130,32,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16900 + d1 * 130 + d2, d3), memory_config: (529, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,149,149,32,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 22201 + d1 * 149 + d2, d3), memory_config: (22201, 32, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,149,149,32,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 22201 + d1 * 149 + d2, d3), memory_config: (694, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,150,150,32,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 22500 + d1 * 150 + d2, d3), memory_config: (22500, 32, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,150,150,32,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 22500 + d1 * 150 + d2, d3), memory_config: (704, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,150,150,32,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 22500 + d1 * 150 + d2, d3), memory_config: (22500, 32, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,150,150,32,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 22500 + d1 * 150 + d2, d3), memory_config: (704, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,160,160,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 25600 + d1 * 160 + d2, d3), memory_config: (25600, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,160,160,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 25600 + d1 * 160 + d2, d3), memory_config: (800, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,8,32,768,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 32 + d2, d3), memory_config: (256, 768, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,8,32,768,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 32 + d2, d3), memory_config: (8, 24, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,190,190,32,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 36100 + d1 * 190 + d2, d3), memory_config: (36100, 32, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,190,190,32,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 36100 + d1 * 190 + d2, d3), memory_config: (1129, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,12,16,768,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 192 + d1 * 16 + d2, d3), memory_config: (192, 768, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,12,16,768,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 192 + d1 * 16 + d2, d3), memory_config: (6, 24, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,120,160,64,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 19200 + d1 * 160 + d2, d3), memory_config: (19200, 64, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,120,160,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 19200 + d1 * 160 + d2, d3), memory_config: (600, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,128,128,192,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 128 + d2, d3), memory_config: (16384, 192, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,128,128,192,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 128 + d2, d3), memory_config: (512, 6, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,512,512,32,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 262144 + d1 * 512 + d2, d3), memory_config: (262144, 32, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,512,512,32,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 262144 + d1 * 512 + d2, d3), memory_config: (8192, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,256,256,32,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 65536 + d1 * 256 + d2, d3), memory_config: (65536, 32, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,256,256,32,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 65536 + d1 * 256 + d2, d3), memory_config: (2048, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,128,128,32,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 128 + d2, d3), memory_config: (16384, 32, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,128,128,32,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 128 + d2, d3), memory_config: (512, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,32,42,192,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1344 + d1 * 42 + d2, d3), memory_config: (1344, 192, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,32,42,192,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1344 + d1 * 42 + d2, d3), memory_config: (42, 6, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,37,37,1280,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1369 + d1 * 37 + d2, d3), memory_config: (1369, 1280, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,37,37,1280,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1369 + d1 * 37 + d2, d3), memory_config: (43, 40, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,360,640,64,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 230400 + d1 * 640 + d2, d3), memory_config: (230400, 64, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,360,640,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 230400 + d1 * 640 + d2, d3), memory_config: (7200, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,120,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 120, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,120,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,240,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 240, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,240,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,40,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 40, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,40,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,80,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 80, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,80,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 3, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,120,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 120, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,120,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,240,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 240, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,240,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,40,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 40, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,40,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,60,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 60, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,60,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,30,30,240,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 900 + d1 * 30 + d2, d3), memory_config: (900, 240, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,30,30,240,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 900 + d1 * 30 + d2, d3), memory_config: (29, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,40,40,120,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1600 + d1 * 40 + d2, d3), memory_config: (1600, 120, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,40,40,120,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1600 + d1 * 40 + d2, d3), memory_config: (50, 4, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,40,40,240,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1600 + d1 * 40 + d2, d3), memory_config: (1600, 240, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,40,40,240,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1600 + d1 * 40 + d2, d3), memory_config: (50, 8, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,56,56,14,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 14, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,56,56,14,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (98, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,116,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 116, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,116,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,12,12,1280,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 144 + d1 * 12 + d2, d3), memory_config: (144, 1280, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,12,12,1280,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 144 + d1 * 12 + d2, d3), memory_config: (5, 40, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,56,56,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,56,56,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (98, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,8,8,512,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 8 + d2, d3), memory_config: (64, 512, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,8,8,512,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 8 + d2, d3), memory_config: (2, 16, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,168,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 168, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,168,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 6, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,16,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,10,10,24,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (100, 24, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,10,10,24,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (4, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,10,10,256,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (100, 256, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,10,10,256,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (4, 8, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,10,10,480,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (100, 480, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,10,10,480,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (4, 15, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,10,10,480,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (100, 480, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,10,10,480,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (4, 15, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,10,10,546,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (100, 546, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,10,10,546,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (4, 18, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,10,10,80,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (100, 80, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,10,10,80,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (4, 3, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,14,14,112,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 112, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,112,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,16,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,192,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 192, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,192,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 6, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,480,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 480, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,480,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 15, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,480,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 480, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,480,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 15, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,56,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 56, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,56,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,64,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 64, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,80,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 80, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,80,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 3, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,96,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 96, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,96,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 3, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,15,15,112,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 225 + d1 * 15 + d2, d3), memory_config: (225, 112, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,15,15,112,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 225 + d1 * 15 + d2, d3), memory_config: (8, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,15,15,480,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 225 + d1 * 15 + d2, d3), memory_config: (225, 480, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,15,15,480,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 225 + d1 * 15 + d2, d3), memory_config: (8, 15, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,15,15,480,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 225 + d1 * 15 + d2, d3), memory_config: (225, 480, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,15,15,480,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 225 + d1 * 15 + d2, d3), memory_config: (8, 15, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,15,15,80,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 225 + d1 * 15 + d2, d3), memory_config: (225, 80, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,15,15,80,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 225 + d1 * 15 + d2, d3), memory_config: (8, 3, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,1,1,120,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 120, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,1,120,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,20,20,112,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 400 + d1 * 20 + d2, d3), memory_config: (400, 112, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,20,20,112,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 400 + d1 * 20 + d2, d3), memory_config: (13, 4, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,20,20,480,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 400 + d1 * 20 + d2, d3), memory_config: (400, 480, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,20,20,480,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 400 + d1 * 20 + d2, d3), memory_config: (13, 15, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,28,28,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,480,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 480, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,480,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 15, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,480,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 480, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,480,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 15, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,480,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 480, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,480,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 15, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,56,56,48,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 48, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,56,56,48,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (98, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,33,33,288,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1089 + d1 * 33 + d2, d3), memory_config: (1089, 288, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,33,33,288,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1089 + d1 * 33 + d2, d3), memory_config: (35, 9, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,38,38,288,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1444 + d1 * 38 + d2, d3), memory_config: (1444, 288, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,38,38,288,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1444 + d1 * 38 + d2, d3), memory_config: (46, 9, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,56,56,12,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 12, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,56,56,12,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (98, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,64,64,320,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (4096, 320, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,64,64,320,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (128, 10, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,1024,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 1024, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,1024,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 32, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,1024,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 1024, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,1024,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 32, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,1024,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 1024, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,1024,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 32, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,112,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 112, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,112,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,144,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 144, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,144,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 5, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,160,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 160, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,160,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 5, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,192,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 192, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,192,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 6, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,24,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 24, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,24,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,32,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 32, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,32,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,512,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 512, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,512,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 16, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,512,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 512, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,512,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 16, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,512,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 512, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,512,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 16, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,512,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 512, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,512,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 16, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,512,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 512, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,512,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 16, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,512,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 512, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,512,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 16, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,64,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 64, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,15,20,64,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 300 + d1 * 20 + d2, d3), memory_config: (300, 64, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,15,20,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 300 + d1 * 20 + d2, d3), memory_config: (10, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,16,16,1024,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (256, 1024, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,16,16,1024,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (8, 32, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,16,16,255,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (256, 255, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,16,16,255,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (8, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,16,16,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (256, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,16,16,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (8, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,16,16,512,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (256, 512, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,16,16,512,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (8, 16, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,16,16,512,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (256, 512, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,16,16,512,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (8, 16, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,1,1,1000,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 1000, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,1,1000,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 32, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,1,1,512,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 512, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,1,512,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 16, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,23,40,2048,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 920 + d1 * 40 + d2, d3), memory_config: (920, 2048, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,23,40,2048,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 920 + d1 * 40 + d2, d3), memory_config: (29, 64, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,23,40,512,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 920 + d1 * 40 + d2, d3), memory_config: (920, 512, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,23,40,512,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 920 + d1 * 40 + d2, d3), memory_config: (29, 16, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,1024,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 1024, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,1024,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 32, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,1024,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 1024, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,1024,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 32, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,19,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 19, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,19,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,38,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 38, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,38,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,512,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 512, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,512,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 16, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,512,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 512, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,512,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 16, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,512,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 512, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,512,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 16, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,512,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 512, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,512,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 16, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,512,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 512, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,512,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 16, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,512,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 512, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,512,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 16, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,512,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 512, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,512,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 16, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,16,16,1024,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (256, 1024, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,16,16,1024,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (8, 32, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,32,32,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,32,32,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (32, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,32,32,255,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 255, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,32,32,255,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (32, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,32,32,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,32,32,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (32, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,32,32,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,32,32,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (32, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,23,40,512,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 920 + d1 * 40 + d2, d3), memory_config: (920, 512, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,23,40,512,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 920 + d1 * 40 + d2, d3), memory_config: (29, 16, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,56,56,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,56,56,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (98, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,512,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 512, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,512,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 16, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,5,5,128,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 25 + d1 * 5 + d2, d3), memory_config: (25, 128, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,5,5,128,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 25 + d1 * 5 + d2, d3), memory_config: (1, 4, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,5,5,24,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 25 + d1 * 5 + d2, d3), memory_config: (25, 24, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,5,5,24,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 25 + d1 * 5 + d2, d3), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,5,5,512,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 25 + d1 * 5 + d2, d3), memory_config: (25, 512, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,5,5,512,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 25 + d1 * 5 + d2, d3), memory_config: (1, 16, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,5,5,546,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 25 + d1 * 5 + d2, d3), memory_config: (25, 546, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,5,5,546,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 25 + d1 * 5 + d2, d3), memory_config: (1, 18, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,60,80,512,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4800 + d1 * 80 + d2, d3), memory_config: (4800, 512, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,60,80,512,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4800 + d1 * 80 + d2, d3), memory_config: (150, 16, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,1024,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 1024, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,1024,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 32, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,2048,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 2048, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,2048,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 64, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,512,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 512, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,512,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 16, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,8,8,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 8 + d2, d3), memory_config: (64, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,8,8,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 8 + d2, d3), memory_config: (2, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,8,8,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 8 + d2, d3), memory_config: (64, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,8,8,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 8 + d2, d3), memory_config: (2, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,45,80,1024,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3600 + d1 * 80 + d2, d3), memory_config: (3600, 1024, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,45,80,1024,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3600 + d1 * 80 + d2, d3), memory_config: (113, 32, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,90,160,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 14400 + d1 * 160 + d2, d3), memory_config: (14400, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,90,160,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 14400 + d1 * 160 + d2, d3), memory_config: (450, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,90,160,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 14400 + d1 * 160 + d2, d3), memory_config: (14400, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,90,160,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 14400 + d1 * 160 + d2, d3), memory_config: (450, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,160,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 160, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,160,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 5, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,32,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 32, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,32,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,17,17,120,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 17 + d2, d3), memory_config: (289, 120, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,17,17,120,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 17 + d2, d3), memory_config: (10, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,17,17,528,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 17 + d2, d3), memory_config: (289, 528, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,17,17,528,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 17 + d2, d3), memory_config: (10, 17, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,17,17,528,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 17 + d2, d3), memory_config: (289, 528, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,17,17,528,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 17 + d2, d3), memory_config: (10, 17, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,17,17,88,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 17 + d2, d3), memory_config: (289, 88, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,17,17,88,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 17 + d2, d3), memory_config: (10, 3, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,196,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 196, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,196,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 7, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,56,56,24,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 24, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,56,56,24,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (98, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,56,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 56, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,56,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,48,48,336,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 2304 + d1 * 48 + d2, d3), memory_config: (2304, 336, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,48,48,336,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 2304 + d1 * 48 + d2, d3), memory_config: (72, 11, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,576,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 576, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,576,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 18, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,576,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 576, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,576,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 18, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,96,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 96, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,96,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 3, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,19,19,136,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 361 + d1 * 19 + d2, d3), memory_config: (361, 136, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,19,19,136,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 361 + d1 * 19 + d2, d3), memory_config: (12, 5, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,19,19,576,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 361 + d1 * 19 + d2, d3), memory_config: (361, 576, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,19,19,576,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 361 + d1 * 19 + d2, d3), memory_config: (12, 18, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,19,19,576,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 361 + d1 * 19 + d2, d3), memory_config: (361, 576, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,19,19,576,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 361 + d1 * 19 + d2, d3), memory_config: (12, 18, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,19,19,96,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 361 + d1 * 19 + d2, d3), memory_config: (361, 96, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,19,19,96,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 361 + d1 * 19 + d2, d3), memory_config: (12, 3, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,160,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 160, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,160,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 5, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,1,1,232,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 232, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,1,232,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,1,1,696,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 696, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,1,696,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 22, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,20,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 20, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,20,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,60,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 60, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,60,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,28,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 28, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,28,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,16,16,1280,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (256, 1280, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,16,16,1280,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (8, 40, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,16,16,1280,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (256, 1280, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,16,16,1280,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (8, 40, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,32,32,640,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 640, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,32,32,640,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (32, 20, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,32,32,640,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 640, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,32,32,640,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (32, 20, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,32,32,640,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 640, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,32,32,640,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (32, 20, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,16,16,640,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (256, 640, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,16,16,640,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (8, 20, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,64,64,320,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (4096, 320, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,64,64,320,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (128, 10, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,64,64,320,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (4096, 320, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,64,64,320,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (128, 10, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,64,64,640,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (4096, 640, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,64,64,640,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (128, 20, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,160,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 160, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,160,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 5, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,112,112,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (12544, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,112,112,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (392, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,112,112,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (12544, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,112,112,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (392, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,112,112,64,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (12544, 64, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,112,112,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (392, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,56,56,64,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 64, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,56,56,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (98, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,112,112,64,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (12544, 64, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,112,112,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (392, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,56,56,64,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 64, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,56,56,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (98, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,60,80,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4800 + d1 * 80 + d2, d3), memory_config: (4800, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,60,80,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4800 + d1 * 80 + d2, d3), memory_config: (150, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,120,160,32,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 19200 + d1 * 160 + d2, d3), memory_config: (19200, 32, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,120,160,32,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 19200 + d1 * 160 + d2, d3), memory_config: (600, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,15,20,64,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 300 + d1 * 20 + d2, d3), memory_config: (300, 64, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,15,20,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 300 + d1 * 20 + d2, d3), memory_config: (10, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,128,128,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 128 + d2, d3), memory_config: (16384, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,128,128,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 128 + d2, d3), memory_config: (512, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,64,64,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (4096, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,64,64,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (128, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,128,128,32,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 128 + d2, d3), memory_config: (16384, 32, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,128,128,32,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 128 + d2, d3), memory_config: (512, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,128,128,64,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 128 + d2, d3), memory_config: (16384, 64, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,128,128,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 128 + d2, d3), memory_config: (512, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,128,128,64,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 128 + d2, d3), memory_config: (16384, 64, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,128,128,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 128 + d2, d3), memory_config: (512, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,73,73,96,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5329 + d1 * 73 + d2, d3), memory_config: (5329, 96, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,73,73,96,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5329 + d1 * 73 + d2, d3), memory_config: (167, 3, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,384,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 384, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,384,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 12, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,150,150,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 22500 + d1 * 150 + d2, d3), memory_config: (22500, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,150,150,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 22500 + d1 * 150 + d2, d3), memory_config: (704, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,75,75,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5625 + d1 * 75 + d2, d3), memory_config: (5625, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,75,75,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5625 + d1 * 75 + d2, d3), memory_config: (176, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,150,150,64,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 22500 + d1 * 150 + d2, d3), memory_config: (22500, 64, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,150,150,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 22500 + d1 * 150 + d2, d3), memory_config: (704, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,80,80,64,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 6400 + d1 * 80 + d2, d3), memory_config: (6400, 64, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,80,80,64,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 6400 + d1 * 80 + d2, d3), memory_config: (200, 2, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,180,320,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 57600 + d1 * 320 + d2, d3), memory_config: (57600, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,180,320,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 57600 + d1 * 320 + d2, d3), memory_config: (1800, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,180,320,64,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 57600 + d1 * 320 + d2, d3), memory_config: (57600, 64, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,180,320,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 57600 + d1 * 320 + d2, d3), memory_config: (1800, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,180,320,64,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 57600 + d1 * 320 + d2, d3), memory_config: (57600, 64, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,180,320,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 57600 + d1 * 320 + d2, d3), memory_config: (1800, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,1,1,128,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 128, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,1,1,128,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 4, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,224,224,1,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 50176 + d1 * 224 + d2, d3), memory_config: (50176, 1, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,224,224,1,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 50176 + d1 * 224 + d2, d3), memory_config: (1568, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,224,224,64,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 50176 + d1 * 224 + d2, d3), memory_config: (50176, 64, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,224,224,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 50176 + d1 * 224 + d2, d3), memory_config: (1568, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,224,224,64,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 50176 + d1 * 224 + d2, d3), memory_config: (50176, 64, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,224,224,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 50176 + d1 * 224 + d2, d3), memory_config: (1568, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,128,128,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 128 + d2, d3), memory_config: (16384, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,128,128,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 128 + d2, d3), memory_config: (512, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,256,256,32,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 65536 + d1 * 256 + d2, d3), memory_config: (65536, 32, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,256,256,32,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 65536 + d1 * 256 + d2, d3), memory_config: (2048, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,256,256,32,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 65536 + d1 * 256 + d2, d3), memory_config: (65536, 32, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,256,256,32,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 65536 + d1 * 256 + d2, d3), memory_config: (2048, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,64,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 64, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,1,1,64,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 64, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,1,1,64,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 2, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,30,40,32,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1200 + d1 * 40 + d2, d3), memory_config: (1200, 32, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,30,40,32,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1200 + d1 * 40 + d2, d3), memory_config: (38, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,35,35,96,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1225 + d1 * 35 + d2, d3), memory_config: (1225, 96, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,35,35,96,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1225 + d1 * 35 + d2, d3), memory_config: (39, 3, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,480,640,1,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 307200 + d1 * 640 + d2, d3), memory_config: (307200, 1, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,480,640,1,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 307200 + d1 * 640 + d2, d3), memory_config: (9600, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,480,640,64,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 307200 + d1 * 640 + d2, d3), memory_config: (307200, 64, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,480,640,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 307200 + d1 * 640 + d2, d3), memory_config: (9600, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,56,56,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,56,56,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (98, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,56,56,14,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 14, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,56,56,14,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (98, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,56,56,192,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 192, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,56,56,192,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (98, 6, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,56,56,24,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 24, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,56,56,24,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (98, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,56,56,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,56,56,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (98, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,56,56,64,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 64, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,56,56,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (98, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,56,56,64,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 64, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,56,56,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (98, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,60,80,32,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4800 + d1 * 80 + d2, d3), memory_config: (4800, 32, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,60,80,32,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4800 + d1 * 80 + d2, d3), memory_config: (150, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,64,64,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (4096, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,64,64,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (128, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,32,32,160,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 160, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,32,32,160,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (32, 5, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,64,64,64,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (4096, 64, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,64,64,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (128, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,64,64,64,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (4096, 64, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,64,64,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (128, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,16,16,64,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (256, 64, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,16,16,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (8, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,73,73,64,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5329 + d1 * 73 + d2, d3), memory_config: (5329, 64, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,73,73,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5329 + d1 * 73 + d2, d3), memory_config: (167, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,73,73,64,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5329 + d1 * 73 + d2, d3), memory_config: (5329, 64, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,73,73,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5329 + d1 * 73 + d2, d3), memory_config: (167, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,71,71,96,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5041 + d1 * 71 + d2, d3), memory_config: (5041, 96, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,71,71,96,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5041 + d1 * 71 + d2, d3), memory_config: (158, 3, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,80,80,24,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 6400 + d1 * 80 + d2, d3), memory_config: (6400, 24, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,80,80,24,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 6400 + d1 * 80 + d2, d3), memory_config: (200, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,14,14,640,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 640, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,640,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 20, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,10,10,80,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (100, 80, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,10,10,80,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (4, 3, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,14,14,112,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 112, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,112,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,56,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 56, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,56,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,672,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 672, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,672,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 21, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,672,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 672, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,672,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 21, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,672,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 672, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,672,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 21, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,15,15,112,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 225 + d1 * 15 + d2, d3), memory_config: (225, 112, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,15,15,112,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 225 + d1 * 15 + d2, d3), memory_config: (8, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,15,15,672,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 225 + d1 * 15 + d2, d3), memory_config: (225, 672, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,15,15,672,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 225 + d1 * 15 + d2, d3), memory_config: (8, 21, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,672,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 672, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,672,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 21, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,8,8,672,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 8 + d2, d3), memory_config: (64, 672, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,8,8,672,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 8 + d2, d3), memory_config: (2, 21, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,1,1,168,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 168, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,1,168,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 6, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,20,20,112,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 400 + d1 * 20 + d2, d3), memory_config: (400, 112, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,20,20,112,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 400 + d1 * 20 + d2, d3), memory_config: (13, 4, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,20,20,24,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 400 + d1 * 20 + d2, d3), memory_config: (400, 24, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,20,20,24,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 400 + d1 * 20 + d2, d3), memory_config: (13, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,20,20,546,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 400 + d1 * 20 + d2, d3), memory_config: (400, 546, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,20,20,546,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 400 + d1 * 20 + d2, d3), memory_config: (13, 18, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,20,20,672,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 400 + d1 * 20 + d2, d3), memory_config: (400, 672, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,20,20,672,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 400 + d1 * 20 + d2, d3), memory_config: (13, 21, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,10,10,672,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (100, 672, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,10,10,672,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (4, 21, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,24,24,112,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 576 + d1 * 24 + d2, d3), memory_config: (576, 112, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,24,24,112,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 576 + d1 * 24 + d2, d3), memory_config: (18, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,24,24,160,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 576 + d1 * 24 + d2, d3), memory_config: (576, 160, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,24,24,160,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 576 + d1 * 24 + d2, d3), memory_config: (18, 5, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,24,24,672,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 576 + d1 * 24 + d2, d3), memory_config: (576, 672, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,24,24,672,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 576 + d1 * 24 + d2, d3), memory_config: (18, 21, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,24,24,672,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 576 + d1 * 24 + d2, d3), memory_config: (576, 672, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,24,24,672,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 576 + d1 * 24 + d2, d3), memory_config: (18, 21, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,1344,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 1344, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,1344,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 42, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,1344,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 1344, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,1344,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 42, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,672,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 672, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,672,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 21, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,672,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 672, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,672,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 21, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,672,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 672, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,672,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 21, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,160,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 160, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,160,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 5, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,192,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 192, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,192,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 6, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,672,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 672, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,672,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 21, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,672,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 672, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,672,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 21, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,80,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 80, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,80,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 3, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,8,8,192,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 8 + d2, d3), memory_config: (64, 192, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,8,8,192,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 64 + d1 * 8 + d2, d3), memory_config: (2, 6, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,40,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 40, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,40,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,1,1,174,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 174, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,1,174,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 6, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,1,1,58,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 58, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,1,58,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,1392,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 1392, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,1392,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 44, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,1392,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 1392, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,1392,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 44, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,696,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 696, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,696,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 22, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,696,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 696, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,696,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 22, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,696,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 696, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,696,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 22, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,17,17,120,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 17 + d2, d3), memory_config: (289, 120, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,17,17,120,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 17 + d2, d3), memory_config: (10, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,17,17,720,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 17 + d2, d3), memory_config: (289, 720, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,17,17,720,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 17 + d2, d3), memory_config: (10, 23, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,9,9,720,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 81 + d1 * 9 + d2, d3), memory_config: (81, 720, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,9,9,720,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 81 + d1 * 9 + d2, d3), memory_config: (3, 23, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,9,9,208,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 81 + d1 * 9 + d2, d3), memory_config: (81, 208, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,9,9,208,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 81 + d1 * 9 + d2, d3), memory_config: (3, 7, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,19,19,1024,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 361 + d1 * 19 + d2, d3), memory_config: (361, 1024, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,19,19,1024,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 361 + d1 * 19 + d2, d3), memory_config: (12, 32, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,10,10,1024,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (100, 1024, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,10,10,1024,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (4, 32, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,19,19,728,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 361 + d1 * 19 + d2, d3), memory_config: (361, 728, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,19,19,728,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 361 + d1 * 19 + d2, d3), memory_config: (12, 23, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,19,19,728,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 361 + d1 * 19 + d2, d3), memory_config: (361, 728, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,19,19,728,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 361 + d1 * 19 + d2, d3), memory_config: (12, 23, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,38,38,728,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1444 + d1 * 38 + d2, d3), memory_config: (1444, 728, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,38,38,728,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1444 + d1 * 38 + d2, d3), memory_config: (46, 23, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,19,19,728,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 361 + d1 * 19 + d2, d3), memory_config: (361, 728, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,19,19,728,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 361 + d1 * 19 + d2, d3), memory_config: (12, 23, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,38,38,728,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1444 + d1 * 38 + d2, d3), memory_config: (1444, 728, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,38,38,728,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1444 + d1 * 38 + d2, d3), memory_config: (46, 23, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,19,19,728,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 361 + d1 * 19 + d2, d3), memory_config: (361, 728, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,19,19,728,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 361 + d1 * 19 + d2, d3), memory_config: (12, 23, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,144,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 144, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,144,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 5, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,18,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 18, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,18,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,36,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 36, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,36,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,512,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 512, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,512,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 16, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,72,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 72, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,72,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 3, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,1,1,20,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 20, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,1,20,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,1,1,24,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 24, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,1,24,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,20,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 20, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,20,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,40,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 40, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,40,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,72,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 72, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,72,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 3, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,72,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 72, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,72,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 3, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,40,40,40,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1600 + d1 * 40 + d2, d3), memory_config: (1600, 40, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,40,40,40,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1600 + d1 * 40 + d2, d3), memory_config: (50, 2, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,56,56,12,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 12, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,56,56,12,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (98, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,56,56,24,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 24, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,56,56,24,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (98, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,56,56,72,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 72, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,56,56,72,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (98, 3, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,72,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 72, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,72,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 3, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,80,80,24,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 6400 + d1 * 80 + d2, d3), memory_config: (6400, 24, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,80,80,24,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 6400 + d1 * 80 + d2, d3), memory_config: (200, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,80,80,72,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 6400 + d1 * 80 + d2, d3), memory_config: (6400, 72, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,80,80,72,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 6400 + d1 * 80 + d2, d3), memory_config: (200, 3, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,40,40,72,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1600 + d1 * 40 + d2, d3), memory_config: (1600, 72, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,40,40,72,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1600 + d1 * 40 + d2, d3), memory_config: (50, 3, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,14,14,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,512,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 512, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,512,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 16, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,334,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 334, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,334,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 11, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,1,1,768,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 768, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,1,768,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 24, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,257,1,27,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 257 + d1 + d2, d3), memory_config: (257, 27, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,257,1,27,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 257 + d1 + d2, d3), memory_config: (9, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,257,1,768,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 257 + d1 + d2, d3), memory_config: (257, 768, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,257,1,768,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 257 + d1 + d2, d3), memory_config: (9, 24, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[768,768,3,1,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 2304 + d1 * 3 + d2, d3), memory_config: (55296, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[768,768,3,1,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 2304 + d1 * 3 + d2, d3), memory_config: (1769472, 1, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1500,1,768,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1500 + d1 + d2, d3), memory_config: (1500, 768, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1500,1,768,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1500 + d1 + d2, d3), memory_config: (47, 24, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,32,32,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,32,32,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (32, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,224,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 224, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,224,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 7, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[3072,192,1,1,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 192 + d1 + d2, d3), memory_config: (18432, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[3072,192,1,1,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 192 + d1 + d2, d3), memory_config: (589824, 1, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,8,1,3072,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 8 + d1 + d2, d3), memory_config: (8, 3072, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,8,1,3072,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 8 + d1 + d2, d3), memory_config: (1, 96, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[768,192,1,1,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 192 + d1 + d2, d3), memory_config: (4608, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[768,192,1,1,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 192 + d1 + d2, d3), memory_config: (147456, 1, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,8,1,768,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 8 + d1 + d2, d3), memory_config: (8, 768, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,8,1,768,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 8 + d1 + d2, d3), memory_config: (1, 24, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[768,768,1,1,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 768 + d1 + d2, d3), memory_config: (18432, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[768,768,1,1,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 768 + d1 + d2, d3), memory_config: (589824, 1, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,8,1,768,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 8 + d1 + d2, d3), memory_config: (8, 768, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,8,1,768,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 8 + d1 + d2, d3), memory_config: (1, 24, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,1024,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 1024, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,1024,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 32, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,16,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,34,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 34, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,34,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,56,56,24,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 24, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,56,56,24,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (98, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,272,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 272, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,272,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 9, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,10,10,480,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (100, 480, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,10,10,480,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (4, 15, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,14,14,100,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 100, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,100,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,112,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 112, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,112,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,184,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 184, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,184,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 6, 'tile<32x32, bf16>', 'dram')nannan
NameInput ShapesInput LayoutsAttributesOutput ShapesOutput LayoutsPCCATOL
ttnn.to_layouttensor<[1,14,14,200,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 200, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,200,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 7, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,240,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 240, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,240,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,480,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 480, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,480,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 15, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,80,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 80, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,80,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 3, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,92,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 92, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,92,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 3, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,15,15,480,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 225 + d1 * 15 + d2, d3), memory_config: (225, 480, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,15,15,480,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 225 + d1 * 15 + d2, d3), memory_config: (8, 15, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,20,20,184,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 400 + d1 * 20 + d2, d3), memory_config: (400, 184, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,20,20,184,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 400 + d1 * 20 + d2, d3), memory_config: (13, 6, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,20,20,200,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 400 + d1 * 20 + d2, d3), memory_config: (400, 200, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,20,20,200,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 400 + d1 * 20 + d2, d3), memory_config: (13, 7, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,20,20,480,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 400 + d1 * 20 + d2, d3), memory_config: (400, 480, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,20,20,480,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 400 + d1 * 20 + d2, d3), memory_config: (13, 15, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[768,80,3,1,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 240 + d1 * 3 + d2, d3), memory_config: (5760, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[768,80,3,1,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 240 + d1 * 3 + d2, d3), memory_config: (184320, 1, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,3000,1,768,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3000 + d1 + d2, d3), memory_config: (3000, 768, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,3000,1,768,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3000 + d1 + d2, d3), memory_config: (94, 24, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,184,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 184, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,184,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 6, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,200,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 200, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,200,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 7, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,480,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 480, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,480,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 15, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,80,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 80, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,80,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 3, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,10,10,232,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (100, 232, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,10,10,232,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (4, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,19,19,136,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 361 + d1 * 19 + d2, d3), memory_config: (361, 136, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,19,19,136,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 361 + d1 * 19 + d2, d3), memory_config: (12, 5, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,19,19,816,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 361 + d1 * 19 + d2, d3), memory_config: (361, 816, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,19,19,816,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 361 + d1 * 19 + d2, d3), memory_config: (12, 26, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,10,10,816,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (100, 816, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,10,10,816,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 10 + d2, d3), memory_config: (4, 26, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,160,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 160, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,160,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 5, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,192,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 192, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,192,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 6, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,32,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 32, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,32,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,384,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 384, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,384,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 12, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,48,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 48, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,48,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,17,17,528,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 17 + d2, d3), memory_config: (289, 528, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,17,17,528,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 17 + d2, d3), memory_config: (10, 17, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,112,112,8,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (12544, 8, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,112,112,8,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (392, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,1,1,232,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 232, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,1,232,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,92,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 92, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,92,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 3, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,28,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 28, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,28,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,12,12,272,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 144 + d1 * 12 + d2, d3), memory_config: (144, 272, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,12,12,272,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 144 + d1 * 12 + d2, d3), memory_config: (5, 9, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,1,1,1280,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 1280, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,1,1280,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 40, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,1,1,240,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 240, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,1,240,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,24,24,160,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 576 + d1 * 24 + d2, d3), memory_config: (576, 160, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,24,24,160,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 576 + d1 * 24 + d2, d3), memory_config: (18, 5, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,24,24,960,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 576 + d1 * 24 + d2, d3), memory_config: (576, 960, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,24,24,960,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 576 + d1 * 24 + d2, d3), memory_config: (18, 30, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,12,12,960,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 144 + d1 * 12 + d2, d3), memory_config: (144, 960, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,12,12,960,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 144 + d1 * 12 + d2, d3), memory_config: (5, 30, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,32,32,640,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 640, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,32,32,640,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (32, 20, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,32,32,640,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 640, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,32,32,640,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (32, 20, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,3,3,960,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 9 + d1 * 3 + d2, d3), memory_config: (9, 960, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,3,3,960,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 9 + d1 * 3 + d2, d3), memory_config: (1, 30, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,3,3,960,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 9 + d1 * 3 + d2, d3), memory_config: (9, 960, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,3,3,960,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 9 + d1 * 3 + d2, d3), memory_config: (1, 30, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,64,64,320,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (4096, 320, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,64,64,320,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (128, 10, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,64,64,320,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (4096, 320, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,64,64,320,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (128, 10, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,160,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 160, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,160,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 5, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,320,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 320, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,320,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 10, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,80,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 80, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,80,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 3, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,960,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 960, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,960,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 30, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,960,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 960, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,960,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 30, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,56,56,96,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 96, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,56,56,96,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (98, 3, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,56,56,96,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 96, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,56,56,96,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (98, 3, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,60,60,96,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3600 + d1 * 60 + d2, d3), memory_config: (3600, 96, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,60,60,96,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3600 + d1 * 60 + d2, d3), memory_config: (113, 3, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,65,65,96,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4225 + d1 * 65 + d2, d3), memory_config: (4225, 96, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,65,65,96,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4225 + d1 * 65 + d2, d3), memory_config: (133, 3, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,208,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 208, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,208,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 7, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,576,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 576, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,576,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 18, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,19,19,576,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 361 + d1 * 19 + d2, d3), memory_config: (361, 576, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,19,19,576,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 361 + d1 * 19 + d2, d3), memory_config: (12, 18, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,35,35,96,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1225 + d1 * 35 + d2, d3), memory_config: (1225, 96, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,35,35,96,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1225 + d1 * 35 + d2, d3), memory_config: (39, 3, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,56,56,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,56,56,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (98, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,56,56,24,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 24, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,56,56,24,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (98, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,60,60,24,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3600 + d1 * 60 + d2, d3), memory_config: (3600, 24, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,60,60,24,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3600 + d1 * 60 + d2, d3), memory_config: (113, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,65,65,24,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4225 + d1 * 65 + d2, d3), memory_config: (4225, 24, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,65,65,24,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4225 + d1 * 65 + d2, d3), memory_config: (133, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,20,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 20, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,20,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,7,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,12,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,12,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 12, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,13,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,13,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 13, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[2,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[2,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (2, 1, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,6,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,6,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 6, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,10,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,10,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 10, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,32,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,32,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 32, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,2048,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 64, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,2048,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 2048, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,256,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 8, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,256,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 256, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,12,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,12,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 12, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,14,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,14,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 14, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,9,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,9,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 9, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,193,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 7, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,193,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 193, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,8,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,8,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 8, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,12,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,12,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 12, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,14,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,14,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 14, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,9,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,9,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 9, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,256,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 8, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,256,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 256, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,16,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,16,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 16, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,25,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,25,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 25, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,8,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,8,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 8, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,8,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,8,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 8, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,32,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,32,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 32, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,10,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,10,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 10, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,10,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,10,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 10, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,15,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,15,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 15, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,10,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,10,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 10, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[2,13,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[2,13,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (2, 13, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[2,7,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[2,7,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (2, 7, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,45,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 2, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,45,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 45, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,7,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,7,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 7, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,6,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,6,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 6, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,10,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,10,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 10, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,11,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,11,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 11, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,12,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,12,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 12, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,13,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,13,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 13, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,14,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,14,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 14, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,15,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,15,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 15, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,6,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,6,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 6, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,7,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,7,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 7, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,8,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,8,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 8, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,9,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,9,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 9, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,5,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,5,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 5, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,10,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,10,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 10, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,7,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,7,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 7, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,bf16]>
!tt.device<#device>
mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,bf16]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,5,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,5,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 5, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,12544,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 12544 + d2, d3), memory_config: (392, 4, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,1,12544,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 12544 + d2, d3), memory_config: (12544, 128, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,3136,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (98, 4, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,1,3136,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 3136 + d2, d3), memory_config: (3136, 128, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,3136,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 3136 + d2, d3), memory_config: (3136, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,3136,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 3136 + d2, d3), memory_config: (98, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,1,784,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 4, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,1,784,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (784, 128, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,196,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 4, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,1,196,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (196, 128, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,196,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (196, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,196,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,1,3136,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 3136 + d2, d3), memory_config: (98, 4, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,1,3136,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 3136 + d2, d3), memory_config: (3136, 128, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,784,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 4, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,1,784,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (784, 128, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,784,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (784, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,784,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,1,4096,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 4096 + d2, d3), memory_config: (128, 4, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,1,4096,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 4096 + d2, d3), memory_config: (4096, 128, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,1024,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (32, 4, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,1,1024,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 1024 + d2, d3), memory_config: (1024, 128, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,1024,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 1024 + d2, d3), memory_config: (1024, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,1024,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 1024 + d2, d3), memory_config: (32, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,1,784,16,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,1,784,16,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (784, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,196,16,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,1,196,16,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (196, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,196,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (196, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,196,16,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,1,5041,192,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5041 + d1 * 5041 + d2, d3), memory_config: (158, 6, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,1,5041,192,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5041 + d1 * 5041 + d2, d3), memory_config: (5041, 192, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,1225,192,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1225 + d1 * 35 + d2, d3), memory_config: (39, 6, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,1,1225,192,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1225 + d1 * 1225 + d2, d3), memory_config: (1225, 192, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,1225,192,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1225 + d1 * 1225 + d2, d3), memory_config: (1225, 192, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,1225,192,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1225 + d1 * 1225 + d2, d3), memory_config: (39, 6, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,1,196,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 8, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,1,196,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (196, 256, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,49,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 8, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,1,49,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (49, 256, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,49,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (49, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,49,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,1,1024,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 1024 + d2, d3), memory_config: (32, 8, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,1,1024,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 1024 + d2, d3), memory_config: (1024, 256, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,256,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (8, 8, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,1,256,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 256 + d2, d3), memory_config: (256, 256, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,256,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 256 + d2, d3), memory_config: (256, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,256,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 256 + d2, d3), memory_config: (8, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,1,3136,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 3136 + d2, d3), memory_config: (98, 8, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,1,3136,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 3136 + d2, d3), memory_config: (3136, 256, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,784,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 8, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,1,784,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (784, 256, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,784,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (784, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,784,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,1,784,320,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 10, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,1,784,320,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (784, 320, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,196,320,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 10, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,1,196,320,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (196, 320, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,196,320,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (196, 320, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,196,320,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 10, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,1,12544,32,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 12544 + d2, d3), memory_config: (392, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,1,12544,32,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 12544 + d2, d3), memory_config: (12544, 32, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,3136,32,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (98, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,1,3136,32,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 3136 + d2, d3), memory_config: (3136, 32, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,3136,32,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 3136 + d2, d3), memory_config: (3136, 32, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,3136,32,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 3136 + d2, d3), memory_config: (98, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,1,65536,32,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 65536 + d1 * 65536 + d2, d3), memory_config: (2048, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,1,65536,32,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 65536 + d1 * 65536 + d2, d3), memory_config: (65536, 32, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16384,32,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 128 + d2, d3), memory_config: (512, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,1,16384,32,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 16384 + d2, d3), memory_config: (16384, 32, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16384,32,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 16384 + d2, d3), memory_config: (16384, 32, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16384,32,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 16384 + d2, d3), memory_config: (512, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,1,1225,384,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1225 + d1 * 1225 + d2, d3), memory_config: (39, 12, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,1,1225,384,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1225 + d1 * 1225 + d2, d3), memory_config: (1225, 384, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,289,384,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 17 + d2, d3), memory_config: (10, 12, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,1,289,384,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 289 + d2, d3), memory_config: (289, 384, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,289,384,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 289 + d2, d3), memory_config: (289, 384, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,289,384,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 289 + d1 * 289 + d2, d3), memory_config: (10, 12, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,1,196,4,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,1,196,4,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (196, 4, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,49,4,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,1,49,4,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (49, 4, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,49,4,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (49, 4, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,49,4,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,1,196,512,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 16, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,1,196,512,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (196, 512, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,49,512,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 16, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,1,49,512,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (49, 512, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,49,512,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (49, 512, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,49,512,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 16, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,1,784,512,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 16, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,1,784,512,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (784, 512, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,196,512,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 16, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,1,196,512,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (196, 512, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,196,512,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (196, 512, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,196,512,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 16, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,1,196,640,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 20, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,1,196,640,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (196, 640, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,49,640,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 20, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,1,49,640,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (49, 640, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,49,640,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (49, 640, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,49,640,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 20, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,1,12544,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 12544 + d2, d3), memory_config: (392, 2, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,1,12544,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 12544 + d2, d3), memory_config: (12544, 64, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,3136,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (98, 2, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,1,3136,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 3136 + d2, d3), memory_config: (3136, 64, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,3136,64,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 3136 + d2, d3), memory_config: (3136, 64, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,3136,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 3136 + d2, d3), memory_config: (98, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,1,16384,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 16384 + d2, d3), memory_config: (512, 2, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,1,16384,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 16384 + d2, d3), memory_config: (16384, 64, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,4096,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (128, 2, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,1,4096,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 4096 + d2, d3), memory_config: (4096, 64, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,4096,64,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 4096 + d2, d3), memory_config: (4096, 64, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,4096,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 4096 + d2, d3), memory_config: (128, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,1,21609,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 21609 + d1 * 21609 + d2, d3), memory_config: (676, 2, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,1,21609,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 21609 + d1 * 21609 + d2, d3), memory_config: (21609, 64, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,5329,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5329 + d1 * 73 + d2, d3), memory_config: (167, 2, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,1,5329,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5329 + d1 * 5329 + d2, d3), memory_config: (5329, 64, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,5329,64,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5329 + d1 * 5329 + d2, d3), memory_config: (5329, 64, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,5329,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5329 + d1 * 5329 + d2, d3), memory_config: (167, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,1,50176,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 50176 + d1 * 50176 + d2, d3), memory_config: (1568, 2, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,1,50176,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 50176 + d1 * 50176 + d2, d3), memory_config: (50176, 64, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,12544,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 112 + d2, d3), memory_config: (392, 2, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,1,12544,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 12544 + d2, d3), memory_config: (12544, 64, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,12544,64,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 12544 + d2, d3), memory_config: (12544, 64, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,12544,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12544 + d1 * 12544 + d2, d3), memory_config: (392, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,1,576,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 576 + d1 * 576 + d2, d3), memory_config: (18, 2, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,1,576,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 576 + d1 * 576 + d2, d3), memory_config: (576, 64, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,144,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 144 + d1 * 12 + d2, d3), memory_config: (5, 2, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,1,144,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 144 + d1 * 144 + d2, d3), memory_config: (144, 64, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,144,64,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 144 + d1 * 144 + d2, d3), memory_config: (144, 64, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,144,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 144 + d1 * 144 + d2, d3), memory_config: (5, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,1,230400,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 230400 + d1 * 230400 + d2, d3), memory_config: (7200, 2, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,1,230400,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 230400 + d1 * 230400 + d2, d3), memory_config: (230400, 64, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,57600,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 57600 + d1 * 320 + d2, d3), memory_config: (1800, 2, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,1,57600,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 57600 + d1 * 57600 + d2, d3), memory_config: (57600, 64, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,57600,64,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 57600 + d1 * 57600 + d2, d3), memory_config: (57600, 64, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,57600,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 57600 + d1 * 57600 + d2, d3), memory_config: (1800, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,1,3136,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 3136 + d2, d3), memory_config: (98, 2, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,1,3136,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 3136 + d2, d3), memory_config: (3136, 64, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,784,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 2, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,1,784,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (784, 64, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,784,64,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (784, 64, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,784,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 784 + d2, d3), memory_config: (25, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,1,196,832,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (7, 26, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,1,196,832,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 196 + d2, d3), memory_config: (196, 832, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,49,832,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 26, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,1,49,832,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (49, 832, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,49,832,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (49, 832, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,49,832,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 49 + d2, d3), memory_config: (2, 26, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
NameInput ShapesInput LayoutsAttributesOutput ShapesOutput LayoutsPCCATOL
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1024,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1024, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1024,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 32, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1536,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1536, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1536,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 48, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[256,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 256, 'f32', 'system_memory')layout: #ttnn.layouttensor<[256,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 8, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[2,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 2, 'f32', 'system_memory')layout: #ttnn.layouttensor<[2,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[3234,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 3234, 'f32', 'system_memory')layout: #ttnn.layouttensor<[3234,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 102, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[3584,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 3584, 'f32', 'system_memory')layout: #ttnn.layouttensor<[3584,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 112, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[4096,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 4096, 'f32', 'system_memory')layout: #ttnn.layouttensor<[4096,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 128, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[51200,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 51200, 'f32', 'system_memory')layout: #ttnn.layouttensor<[51200,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1600, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[512,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 512, 'f32', 'system_memory')layout: #ttnn.layouttensor<[512,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 16, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[12,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 12, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[12,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[45,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 45, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[45,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 2, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[5,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 5, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[5,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,132,132,192,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 17424 + d1 * 132 + d2, d3), memory_config: (545, 6, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,132,132,192,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 17424 + d1 * 132 + d2, d3), memory_config: (17424, 192, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,6,132,192,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 792 + d1 * 132 + d2, d3), memory_config: (792, 192, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,6,132,192,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 792 + d1 * 132 + d2, d3), memory_config: (25, 6, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,126,132,192,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16632 + d1 * 132 + d2, d3), memory_config: (16632, 192, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,126,132,192,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16632 + d1 * 132 + d2, d3), memory_config: (520, 6, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,132,6,192,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 792 + d1 * 6 + d2, d3), memory_config: (792, 192, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,132,6,192,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 792 + d1 * 6 + d2, d3), memory_config: (25, 6, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,132,126,192,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16632 + d1 * 126 + d2, d3), memory_config: (16632, 192, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,132,126,192,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16632 + d1 * 126 + d2, d3), memory_config: (520, 6, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,132,132,384,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 17424 + d1 * 132 + d2, d3), memory_config: (545, 12, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,132,132,384,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 17424 + d1 * 132 + d2, d3), memory_config: (17424, 384, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,126,132,384,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16632 + d1 * 132 + d2, d3), memory_config: (16632, 384, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,126,132,384,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16632 + d1 * 132 + d2, d3), memory_config: (520, 12, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,6,132,384,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 792 + d1 * 132 + d2, d3), memory_config: (792, 384, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,6,132,384,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 792 + d1 * 132 + d2, d3), memory_config: (25, 12, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,132,126,384,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16632 + d1 * 126 + d2, d3), memory_config: (16632, 384, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,132,126,384,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16632 + d1 * 126 + d2, d3), memory_config: (520, 12, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,132,6,384,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 792 + d1 * 6 + d2, d3), memory_config: (792, 384, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,132,6,384,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 792 + d1 * 6 + d2, d3), memory_config: (25, 12, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,132,132,384,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 17424 + d1 * 132 + d2, d3), memory_config: (545, 12, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,132,132,384,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 17424 + d1 * 132 + d2, d3), memory_config: (17424, 384, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,6,132,384,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 792 + d1 * 132 + d2, d3), memory_config: (792, 384, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,6,132,384,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 792 + d1 * 132 + d2, d3), memory_config: (25, 12, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,126,132,384,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16632 + d1 * 132 + d2, d3), memory_config: (16632, 384, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,126,132,384,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16632 + d1 * 132 + d2, d3), memory_config: (520, 12, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,132,6,384,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 792 + d1 * 6 + d2, d3), memory_config: (792, 384, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,132,6,384,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 792 + d1 * 6 + d2, d3), memory_config: (25, 12, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,132,126,384,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16632 + d1 * 126 + d2, d3), memory_config: (16632, 384, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,132,126,384,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16632 + d1 * 126 + d2, d3), memory_config: (520, 12, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,14,14,512,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 16, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,14,14,512,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 512, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,11,14,512,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 154 + d1 * 14 + d2, d3), memory_config: (154, 512, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,11,14,512,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 154 + d1 * 14 + d2, d3), memory_config: (5, 16, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,3,14,512,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 42 + d1 * 14 + d2, d3), memory_config: (42, 512, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,3,14,512,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 42 + d1 * 14 + d2, d3), memory_config: (2, 16, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,11,512,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 154 + d1 * 11 + d2, d3), memory_config: (154, 512, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,11,512,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 154 + d1 * 11 + d2, d3), memory_config: (5, 16, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,3,512,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 42 + d1 * 3 + d2, d3), memory_config: (42, 512, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,3,512,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 42 + d1 * 3 + d2, d3), memory_config: (2, 16, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,512,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 16, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,14,14,512,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 512, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,3,14,512,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 42 + d1 * 14 + d2, d3), memory_config: (42, 512, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,3,14,512,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 42 + d1 * 14 + d2, d3), memory_config: (2, 16, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,11,14,512,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 154 + d1 * 14 + d2, d3), memory_config: (154, 512, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,11,14,512,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 154 + d1 * 14 + d2, d3), memory_config: (5, 16, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,3,512,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 42 + d1 * 3 + d2, d3), memory_config: (42, 512, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,3,512,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 42 + d1 * 3 + d2, d3), memory_config: (2, 16, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,11,512,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 154 + d1 * 11 + d2, d3), memory_config: (154, 512, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,11,512,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 154 + d1 * 11 + d2, d3), memory_config: (5, 16, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,24,24,1536,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 576 + d1 * 24 + d2, d3), memory_config: (18, 48, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,24,24,1536,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 576 + d1 * 24 + d2, d3), memory_config: (576, 1536, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,18,24,1536,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 432 + d1 * 24 + d2, d3), memory_config: (432, 1536, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,18,24,1536,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 432 + d1 * 24 + d2, d3), memory_config: (14, 48, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,6,24,1536,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 144 + d1 * 24 + d2, d3), memory_config: (144, 1536, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,6,24,1536,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 144 + d1 * 24 + d2, d3), memory_config: (5, 48, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,24,18,1536,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 432 + d1 * 18 + d2, d3), memory_config: (432, 1536, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,24,18,1536,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 432 + d1 * 18 + d2, d3), memory_config: (14, 48, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,24,6,1536,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 144 + d1 * 6 + d2, d3), memory_config: (144, 1536, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,24,6,1536,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 144 + d1 * 6 + d2, d3), memory_config: (5, 48, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,24,24,1536,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 576 + d1 * 24 + d2, d3), memory_config: (18, 48, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,24,24,1536,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 576 + d1 * 24 + d2, d3), memory_config: (576, 1536, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,6,24,1536,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 144 + d1 * 24 + d2, d3), memory_config: (144, 1536, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,6,24,1536,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 144 + d1 * 24 + d2, d3), memory_config: (5, 48, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,18,24,1536,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 432 + d1 * 24 + d2, d3), memory_config: (432, 1536, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,18,24,1536,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 432 + d1 * 24 + d2, d3), memory_config: (14, 48, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,24,6,1536,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 144 + d1 * 6 + d2, d3), memory_config: (144, 1536, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,24,6,1536,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 144 + d1 * 6 + d2, d3), memory_config: (5, 48, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,24,18,1536,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 432 + d1 * 18 + d2, d3), memory_config: (432, 1536, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,24,18,1536,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 432 + d1 * 18 + d2, d3), memory_config: (14, 48, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,264,264,192,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 69696 + d1 * 264 + d2, d3), memory_config: (2178, 6, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,264,264,192,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 69696 + d1 * 264 + d2, d3), memory_config: (69696, 192, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,258,264,192,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 68112 + d1 * 264 + d2, d3), memory_config: (68112, 192, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,258,264,192,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 68112 + d1 * 264 + d2, d3), memory_config: (2129, 6, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,6,264,192,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1584 + d1 * 264 + d2, d3), memory_config: (1584, 192, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,6,264,192,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1584 + d1 * 264 + d2, d3), memory_config: (50, 6, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,264,258,192,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 68112 + d1 * 258 + d2, d3), memory_config: (68112, 192, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,264,258,192,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 68112 + d1 * 258 + d2, d3), memory_config: (2129, 6, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,264,6,192,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1584 + d1 * 6 + d2, d3), memory_config: (1584, 192, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,264,6,192,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1584 + d1 * 6 + d2, d3), memory_config: (50, 6, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,264,264,192,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 69696 + d1 * 264 + d2, d3), memory_config: (2178, 6, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,264,264,192,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 69696 + d1 * 264 + d2, d3), memory_config: (69696, 192, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,6,264,192,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1584 + d1 * 264 + d2, d3), memory_config: (1584, 192, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,6,264,192,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1584 + d1 * 264 + d2, d3), memory_config: (50, 6, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,258,264,192,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 68112 + d1 * 264 + d2, d3), memory_config: (68112, 192, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,258,264,192,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 68112 + d1 * 264 + d2, d3), memory_config: (2129, 6, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,264,6,192,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1584 + d1 * 6 + d2, d3), memory_config: (1584, 192, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,264,6,192,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1584 + d1 * 6 + d2, d3), memory_config: (50, 6, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,264,258,192,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 68112 + d1 * 258 + d2, d3), memory_config: (68112, 192, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,264,258,192,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 68112 + d1 * 258 + d2, d3), memory_config: (2129, 6, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,28,28,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 8, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,28,28,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 256, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,25,28,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 700 + d1 * 28 + d2, d3), memory_config: (700, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,25,28,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 700 + d1 * 28 + d2, d3), memory_config: (22, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,3,28,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 84 + d1 * 28 + d2, d3), memory_config: (84, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,3,28,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 84 + d1 * 28 + d2, d3), memory_config: (3, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,25,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 700 + d1 * 25 + d2, d3), memory_config: (700, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,25,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 700 + d1 * 25 + d2, d3), memory_config: (22, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,3,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 84 + d1 * 3 + d2, d3), memory_config: (84, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,3,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 84 + d1 * 3 + d2, d3), memory_config: (3, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 8, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,28,28,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 256, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,3,28,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 84 + d1 * 28 + d2, d3), memory_config: (84, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,3,28,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 84 + d1 * 28 + d2, d3), memory_config: (3, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,25,28,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 700 + d1 * 28 + d2, d3), memory_config: (700, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,25,28,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 700 + d1 * 28 + d2, d3), memory_config: (22, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,3,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 84 + d1 * 3 + d2, d3), memory_config: (84, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,3,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 84 + d1 * 3 + d2, d3), memory_config: (3, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,25,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 700 + d1 * 25 + d2, d3), memory_config: (700, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,25,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 700 + d1 * 25 + d2, d3), memory_config: (22, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,36,36,1536,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1296 + d1 * 36 + d2, d3), memory_config: (41, 48, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,36,36,1536,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1296 + d1 * 36 + d2, d3), memory_config: (1296, 1536, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,30,36,1536,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1080 + d1 * 36 + d2, d3), memory_config: (1080, 1536, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,30,36,1536,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1080 + d1 * 36 + d2, d3), memory_config: (34, 48, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,6,36,1536,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 216 + d1 * 36 + d2, d3), memory_config: (216, 1536, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,6,36,1536,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 216 + d1 * 36 + d2, d3), memory_config: (7, 48, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,36,30,1536,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1080 + d1 * 30 + d2, d3), memory_config: (1080, 1536, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,36,30,1536,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1080 + d1 * 30 + d2, d3), memory_config: (34, 48, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,36,6,1536,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 216 + d1 * 6 + d2, d3), memory_config: (216, 1536, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,36,6,1536,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 216 + d1 * 6 + d2, d3), memory_config: (7, 48, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,36,36,1536,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1296 + d1 * 36 + d2, d3), memory_config: (41, 48, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,36,36,1536,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1296 + d1 * 36 + d2, d3), memory_config: (1296, 1536, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,6,36,1536,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 216 + d1 * 36 + d2, d3), memory_config: (216, 1536, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,6,36,1536,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 216 + d1 * 36 + d2, d3), memory_config: (7, 48, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,30,36,1536,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1080 + d1 * 36 + d2, d3), memory_config: (1080, 1536, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,30,36,1536,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1080 + d1 * 36 + d2, d3), memory_config: (34, 48, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,36,6,1536,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 216 + d1 * 6 + d2, d3), memory_config: (216, 1536, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,36,6,1536,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 216 + d1 * 6 + d2, d3), memory_config: (7, 48, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,36,30,1536,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1080 + d1 * 30 + d2, d3), memory_config: (1080, 1536, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,36,30,1536,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1080 + d1 * 30 + d2, d3), memory_config: (34, 48, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,36,36,768,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1296 + d1 * 36 + d2, d3), memory_config: (41, 24, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,36,36,768,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1296 + d1 * 36 + d2, d3), memory_config: (1296, 768, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,30,36,768,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1080 + d1 * 36 + d2, d3), memory_config: (1080, 768, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,30,36,768,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1080 + d1 * 36 + d2, d3), memory_config: (34, 24, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,6,36,768,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 216 + d1 * 36 + d2, d3), memory_config: (216, 768, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,6,36,768,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 216 + d1 * 36 + d2, d3), memory_config: (7, 24, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,36,30,768,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1080 + d1 * 30 + d2, d3), memory_config: (1080, 768, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,36,30,768,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1080 + d1 * 30 + d2, d3), memory_config: (34, 24, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,36,6,768,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 216 + d1 * 6 + d2, d3), memory_config: (216, 768, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,36,6,768,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 216 + d1 * 6 + d2, d3), memory_config: (7, 24, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,36,36,768,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1296 + d1 * 36 + d2, d3), memory_config: (41, 24, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,36,36,768,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1296 + d1 * 36 + d2, d3), memory_config: (1296, 768, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,6,36,768,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 216 + d1 * 36 + d2, d3), memory_config: (216, 768, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,6,36,768,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 216 + d1 * 36 + d2, d3), memory_config: (7, 24, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,30,36,768,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1080 + d1 * 36 + d2, d3), memory_config: (1080, 768, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,30,36,768,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1080 + d1 * 36 + d2, d3), memory_config: (34, 24, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,36,6,768,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 216 + d1 * 6 + d2, d3), memory_config: (216, 768, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,36,6,768,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 216 + d1 * 6 + d2, d3), memory_config: (7, 24, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,36,30,768,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1080 + d1 * 30 + d2, d3), memory_config: (1080, 768, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,36,30,768,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1080 + d1 * 30 + d2, d3), memory_config: (34, 24, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,56,56,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (98, 4, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,56,56,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 128, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,53,56,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 2968 + d1 * 56 + d2, d3), memory_config: (2968, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,53,56,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 2968 + d1 * 56 + d2, d3), memory_config: (93, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,3,56,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 168 + d1 * 56 + d2, d3), memory_config: (168, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,3,56,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 168 + d1 * 56 + d2, d3), memory_config: (6, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,56,53,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 2968 + d1 * 53 + d2, d3), memory_config: (2968, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,56,53,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 2968 + d1 * 53 + d2, d3), memory_config: (93, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,56,3,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 168 + d1 * 3 + d2, d3), memory_config: (168, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,56,3,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 168 + d1 * 3 + d2, d3), memory_config: (6, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,56,56,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (98, 4, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,56,56,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 128, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,3,56,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 168 + d1 * 56 + d2, d3), memory_config: (168, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,3,56,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 168 + d1 * 56 + d2, d3), memory_config: (6, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,53,56,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 2968 + d1 * 56 + d2, d3), memory_config: (2968, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,53,56,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 2968 + d1 * 56 + d2, d3), memory_config: (93, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,56,3,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 168 + d1 * 3 + d2, d3), memory_config: (168, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,56,3,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 168 + d1 * 3 + d2, d3), memory_config: (6, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,56,53,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 2968 + d1 * 53 + d2, d3), memory_config: (2968, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,56,53,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 2968 + d1 * 53 + d2, d3), memory_config: (93, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,72,72,384,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5184 + d1 * 72 + d2, d3), memory_config: (162, 12, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,72,72,384,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5184 + d1 * 72 + d2, d3), memory_config: (5184, 384, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,66,72,384,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4752 + d1 * 72 + d2, d3), memory_config: (4752, 384, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,66,72,384,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4752 + d1 * 72 + d2, d3), memory_config: (149, 12, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,6,72,384,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 432 + d1 * 72 + d2, d3), memory_config: (432, 384, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,6,72,384,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 432 + d1 * 72 + d2, d3), memory_config: (14, 12, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,72,66,384,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4752 + d1 * 66 + d2, d3), memory_config: (4752, 384, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,72,66,384,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4752 + d1 * 66 + d2, d3), memory_config: (149, 12, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,72,6,384,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 432 + d1 * 6 + d2, d3), memory_config: (432, 384, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,72,6,384,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 432 + d1 * 6 + d2, d3), memory_config: (14, 12, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,72,72,384,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5184 + d1 * 72 + d2, d3), memory_config: (162, 12, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,72,72,384,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5184 + d1 * 72 + d2, d3), memory_config: (5184, 384, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,6,72,384,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 432 + d1 * 72 + d2, d3), memory_config: (432, 384, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,6,72,384,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 432 + d1 * 72 + d2, d3), memory_config: (14, 12, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,66,72,384,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4752 + d1 * 72 + d2, d3), memory_config: (4752, 384, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,66,72,384,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4752 + d1 * 72 + d2, d3), memory_config: (149, 12, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,72,6,384,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 432 + d1 * 6 + d2, d3), memory_config: (432, 384, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,72,6,384,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 432 + d1 * 6 + d2, d3), memory_config: (14, 12, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,72,66,384,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4752 + d1 * 66 + d2, d3), memory_config: (4752, 384, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,72,66,384,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4752 + d1 * 66 + d2, d3), memory_config: (149, 12, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,72,72,768,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5184 + d1 * 72 + d2, d3), memory_config: (162, 24, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,72,72,768,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5184 + d1 * 72 + d2, d3), memory_config: (5184, 768, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,66,72,768,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4752 + d1 * 72 + d2, d3), memory_config: (4752, 768, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,66,72,768,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4752 + d1 * 72 + d2, d3), memory_config: (149, 24, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,6,72,768,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 432 + d1 * 72 + d2, d3), memory_config: (432, 768, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,6,72,768,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 432 + d1 * 72 + d2, d3), memory_config: (14, 24, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,72,66,768,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4752 + d1 * 66 + d2, d3), memory_config: (4752, 768, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,72,66,768,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4752 + d1 * 66 + d2, d3), memory_config: (149, 24, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,72,6,768,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 432 + d1 * 6 + d2, d3), memory_config: (432, 768, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,72,6,768,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 432 + d1 * 6 + d2, d3), memory_config: (14, 24, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,72,72,768,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5184 + d1 * 72 + d2, d3), memory_config: (162, 24, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,72,72,768,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5184 + d1 * 72 + d2, d3), memory_config: (5184, 768, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,6,72,768,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 432 + d1 * 72 + d2, d3), memory_config: (432, 768, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,6,72,768,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 432 + d1 * 72 + d2, d3), memory_config: (14, 24, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,66,72,768,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4752 + d1 * 72 + d2, d3), memory_config: (4752, 768, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,66,72,768,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4752 + d1 * 72 + d2, d3), memory_config: (149, 24, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,72,6,768,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 432 + d1 * 6 + d2, d3), memory_config: (432, 768, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,72,6,768,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 432 + d1 * 6 + d2, d3), memory_config: (14, 24, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,72,66,768,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4752 + d1 * 66 + d2, d3), memory_config: (4752, 768, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,72,66,768,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4752 + d1 * 66 + d2, d3), memory_config: (149, 24, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,f32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,10,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,10,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 10, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,10,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 10 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,10,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 10 + d1, d2), memory_config: (10, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,10,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 10 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,10,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 10 + d1, d2), memory_config: (10, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,10,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 10 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,10,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 10 + d1, d2), memory_config: (10, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,10,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 10 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,10,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 10 + d1, d2), memory_config: (10, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,10,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 10 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,10,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 10 + d1, d2), memory_config: (10, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,10,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 10 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,10,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 10 + d1, d2), memory_config: (10, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,10,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 10 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,10,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 10 + d1, d2), memory_config: (10, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,10,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 10 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,10,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 10 + d1, d2), memory_config: (10, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,10,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 10 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,10,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 10 + d1, d2), memory_config: (10, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,10,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 10 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,10,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 10 + d1, d2), memory_config: (10, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,10,50280,f32]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 10 + d1, d2), memory_config: (1, 1572, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,10,50280,f32]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 10 + d1, d2), memory_config: (10, 50280, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,50280,f32]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 50280, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,1,50280,f32]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1572, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,11,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,11,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 11, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,11,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 11 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,11,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 11 + d1, d2), memory_config: (11, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,11,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 11 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,11,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 11 + d1, d2), memory_config: (11, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,11,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 11 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,11,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 11 + d1, d2), memory_config: (11, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,11,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 11 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,11,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 11 + d1, d2), memory_config: (11, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,11,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 11 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,11,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 11 + d1, d2), memory_config: (11, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,11,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 11 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,11,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 11 + d1, d2), memory_config: (11, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,11,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 11 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,11,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 11 + d1, d2), memory_config: (11, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,11,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 11 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,11,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 11 + d1, d2), memory_config: (11, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,11,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 11 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,11,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 11 + d1, d2), memory_config: (11, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,11,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 11 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,11,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 11 + d1, d2), memory_config: (11, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,11,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 11 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,11,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 11 + d1, d2), memory_config: (11, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,11,50280,f32]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 11 + d1, d2), memory_config: (1, 1572, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,11,50280,f32]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 11 + d1, d2), memory_config: (11, 50280, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,50280,f32]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 50280, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,1,50280,f32]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1572, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,12,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,12,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 12, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,12,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,12,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 12, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,12,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 12 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,12,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 12 + d1, d2), memory_config: (12, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,12,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 12 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,12,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 12 + d1, d2), memory_config: (12, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,12,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 12 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,12,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 12 + d1, d2), memory_config: (12, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,12,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 12 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,12,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 12 + d1, d2), memory_config: (12, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,12,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 12 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,12,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 12 + d1, d2), memory_config: (12, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,12,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 12 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,12,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 12 + d1, d2), memory_config: (12, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,12,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 12 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,12,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 12 + d1, d2), memory_config: (12, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,12,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 12 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,12,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 12 + d1, d2), memory_config: (12, 16, 'bf16', 'system_memory')nannan
NameInput ShapesInput LayoutsAttributesOutput ShapesOutput LayoutsPCCATOL
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,12,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 12 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,12,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 12 + d1, d2), memory_config: (12, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,12,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 12 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,12,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 12 + d1, d2), memory_config: (12, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,12,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 12 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,12,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 12 + d1, d2), memory_config: (12, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,12,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 12 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,12,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 12 + d1, d2), memory_config: (12, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,12,50280,f32]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 12 + d1, d2), memory_config: (1, 1572, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,12,50280,f32]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 12 + d1, d2), memory_config: (12, 50280, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,50280,f32]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 50280, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,1,50280,f32]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1572, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,1370,1280,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 1370 + d1, d2), memory_config: (43, 40, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,1370,1280,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 1370 + d1, d2), memory_config: (1370, 1280, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,1280,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1280, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,1280,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 40, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,13,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,13,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 13, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,13,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 13 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,13,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 13 + d1, d2), memory_config: (13, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,13,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 13 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,13,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 13 + d1, d2), memory_config: (13, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,13,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 13 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,13,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 13 + d1, d2), memory_config: (13, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,13,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 13 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,13,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 13 + d1, d2), memory_config: (13, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,13,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 13 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,13,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 13 + d1, d2), memory_config: (13, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,13,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 13 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,13,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 13 + d1, d2), memory_config: (13, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,13,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 13 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,13,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 13 + d1, d2), memory_config: (13, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,13,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 13 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,13,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 13 + d1, d2), memory_config: (13, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,13,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 13 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,13,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 13 + d1, d2), memory_config: (13, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,13,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 13 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,13,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 13 + d1, d2), memory_config: (13, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,13,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 13 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,13,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 13 + d1, d2), memory_config: (13, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,13,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 13 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,13,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 13 + d1, d2), memory_config: (13, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,13,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 13 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,13,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 13 + d1, d2), memory_config: (13, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,13,50280,f32]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 13 + d1, d2), memory_config: (1, 1572, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,13,50280,f32]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 13 + d1, d2), memory_config: (13, 50280, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,50280,f32]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 50280, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,1,50280,f32]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1572, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,14,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,14,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 14, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,14,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 14 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,14,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 14 + d1, d2), memory_config: (14, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 14 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,14,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 14 + d1, d2), memory_config: (14, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 14 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,14,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 14 + d1, d2), memory_config: (14, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 14 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,14,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 14 + d1, d2), memory_config: (14, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 14 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,14,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 14 + d1, d2), memory_config: (14, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 14 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,14,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 14 + d1, d2), memory_config: (14, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 14 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,14,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 14 + d1, d2), memory_config: (14, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 14 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,14,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 14 + d1, d2), memory_config: (14, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 14 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,14,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 14 + d1, d2), memory_config: (14, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 14 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,14,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 14 + d1, d2), memory_config: (14, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 14 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,14,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 14 + d1, d2), memory_config: (14, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 14 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,14,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 14 + d1, d2), memory_config: (14, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 14 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,14,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 14 + d1, d2), memory_config: (14, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 14 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,14,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 14 + d1, d2), memory_config: (14, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,50280,f32]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 14 + d1, d2), memory_config: (1, 1572, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,14,50280,f32]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 14 + d1, d2), memory_config: (14, 50280, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,50280,f32]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 50280, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,1,50280,f32]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1572, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,15,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,15,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 15, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,15,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 15 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,15,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 15 + d1, d2), memory_config: (15, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,15,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 15 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,15,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 15 + d1, d2), memory_config: (15, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,15,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 15 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,15,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 15 + d1, d2), memory_config: (15, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,15,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 15 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,15,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 15 + d1, d2), memory_config: (15, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,15,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 15 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,15,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 15 + d1, d2), memory_config: (15, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,15,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 15 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,15,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 15 + d1, d2), memory_config: (15, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,15,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 15 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,15,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 15 + d1, d2), memory_config: (15, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,15,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 15 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,15,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 15 + d1, d2), memory_config: (15, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,15,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 15 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,15,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 15 + d1, d2), memory_config: (15, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,15,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 15 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,15,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 15 + d1, d2), memory_config: (15, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,15,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 15 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,15,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 15 + d1, d2), memory_config: (15, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,15,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 15 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,15,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 15 + d1, d2), memory_config: (15, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,15,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 15 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,15,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 15 + d1, d2), memory_config: (15, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,15,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 15 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,15,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 15 + d1, d2), memory_config: (15, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,15,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 15 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,15,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 15 + d1, d2), memory_config: (15, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,15,50280,f32]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 15 + d1, d2), memory_config: (1, 1572, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,15,50280,f32]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 15 + d1, d2), memory_config: (15, 50280, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,50280,f32]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 50280, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,1,50280,f32]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1572, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,16,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,16,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 16, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,16,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,16,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 16, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,17,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,17,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 17, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,18,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,18,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 18, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,197,768,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 197 + d1, d2), memory_config: (7, 24, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,197,768,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 197 + d1, d2), memory_config: (197, 768, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,768,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 768, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,768,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 24, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,19,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,19,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 19, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,201,768,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 201 + d1, d2), memory_config: (7, 24, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,201,768,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 201 + d1, d2), memory_config: (201, 768, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,768,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 768, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,768,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 24, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,20,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,20,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 20, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,21,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,21,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 21, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,22,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,22,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 22, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,23,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,23,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 23, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,24,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,24,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 24, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,25,768,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 25 + d1, d2), memory_config: (1, 24, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,25,768,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 25 + d1, d2), memory_config: (25, 768, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,768,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 768, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,768,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 24, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,2,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,2,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 2, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,2,120,160,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 240 + d1 * 120 + d2, d3), memory_config: (8, 5, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,2,120,160,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 240 + d1 * 120 + d2, d3), memory_config: (240, 160, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,120,160,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 120 + d1 * 120 + d2, d3), memory_config: (120, 160, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,120,160,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 120 + d1 * 120 + d2, d3), memory_config: (4, 5, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,2,120,160,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 240 + d1 * 120 + d2, d3), memory_config: (8, 5, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,2,120,160,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 240 + d1 * 120 + d2, d3), memory_config: (240, 160, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,120,160,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 120 + d1 * 120 + d2, d3), memory_config: (120, 160, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,120,160,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 120 + d1 * 120 + d2, d3), memory_config: (4, 5, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,2,30,40,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 60 + d1 * 30 + d2, d3), memory_config: (2, 2, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,2,30,40,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 60 + d1 * 30 + d2, d3), memory_config: (60, 40, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,30,40,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 30 + d1 * 30 + d2, d3), memory_config: (30, 40, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,30,40,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 30 + d1 * 30 + d2, d3), memory_config: (1, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,2,30,40,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 60 + d1 * 30 + d2, d3), memory_config: (2, 2, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,2,30,40,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 60 + d1 * 30 + d2, d3), memory_config: (60, 40, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,30,40,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 30 + d1 * 30 + d2, d3), memory_config: (30, 40, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,30,40,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 30 + d1 * 30 + d2, d3), memory_config: (1, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,2,60,80,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 120 + d1 * 60 + d2, d3), memory_config: (4, 3, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,2,60,80,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 120 + d1 * 60 + d2, d3), memory_config: (120, 80, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,60,80,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 60 + d1 * 60 + d2, d3), memory_config: (60, 80, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,60,80,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 60 + d1 * 60 + d2, d3), memory_config: (2, 3, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,2,60,80,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 120 + d1 * 60 + d2, d3), memory_config: (4, 3, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,2,60,80,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 120 + d1 * 60 + d2, d3), memory_config: (120, 80, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,60,80,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 60 + d1 * 60 + d2, d3), memory_config: (60, 80, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,60,80,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 60 + d1 * 60 + d2, d3), memory_config: (2, 3, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,3072,10,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 30720 + d1 * 10 + d2, d3), memory_config: (960, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,10,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 30720 + d1 * 10 + d2, d3), memory_config: (30720, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,10,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 30720 + d1 * 10 + d2, d3), memory_config: (960, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,10,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 30720 + d1 * 10 + d2, d3), memory_config: (30720, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,10,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 30720 + d1 * 10 + d2, d3), memory_config: (960, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,10,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 30720 + d1 * 10 + d2, d3), memory_config: (30720, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,10,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 30720 + d1 * 10 + d2, d3), memory_config: (960, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,10,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 30720 + d1 * 10 + d2, d3), memory_config: (30720, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,10,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 30720 + d1 * 10 + d2, d3), memory_config: (960, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,10,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 30720 + d1 * 10 + d2, d3), memory_config: (30720, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,10,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 30720 + d1 * 10 + d2, d3), memory_config: (960, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,10,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 30720 + d1 * 10 + d2, d3), memory_config: (30720, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,10,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 30720 + d1 * 10 + d2, d3), memory_config: (960, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,10,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 30720 + d1 * 10 + d2, d3), memory_config: (30720, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,10,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 30720 + d1 * 10 + d2, d3), memory_config: (960, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,10,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 30720 + d1 * 10 + d2, d3), memory_config: (30720, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,10,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 30720 + d1 * 10 + d2, d3), memory_config: (960, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,10,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 30720 + d1 * 10 + d2, d3), memory_config: (30720, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,10,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 30720 + d1 * 10 + d2, d3), memory_config: (960, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,10,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 30720 + d1 * 10 + d2, d3), memory_config: (30720, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,11,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 33792 + d1 * 11 + d2, d3), memory_config: (1056, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,11,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 33792 + d1 * 11 + d2, d3), memory_config: (33792, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,11,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 33792 + d1 * 11 + d2, d3), memory_config: (1056, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,11,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 33792 + d1 * 11 + d2, d3), memory_config: (33792, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,11,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 33792 + d1 * 11 + d2, d3), memory_config: (1056, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,11,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 33792 + d1 * 11 + d2, d3), memory_config: (33792, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,11,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 33792 + d1 * 11 + d2, d3), memory_config: (1056, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,11,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 33792 + d1 * 11 + d2, d3), memory_config: (33792, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,11,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 33792 + d1 * 11 + d2, d3), memory_config: (1056, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,11,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 33792 + d1 * 11 + d2, d3), memory_config: (33792, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,11,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 33792 + d1 * 11 + d2, d3), memory_config: (1056, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,11,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 33792 + d1 * 11 + d2, d3), memory_config: (33792, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,11,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 33792 + d1 * 11 + d2, d3), memory_config: (1056, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,11,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 33792 + d1 * 11 + d2, d3), memory_config: (33792, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,11,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 33792 + d1 * 11 + d2, d3), memory_config: (1056, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,11,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 33792 + d1 * 11 + d2, d3), memory_config: (33792, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,11,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 33792 + d1 * 11 + d2, d3), memory_config: (1056, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,11,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 33792 + d1 * 11 + d2, d3), memory_config: (33792, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,11,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 33792 + d1 * 11 + d2, d3), memory_config: (1056, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,11,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 33792 + d1 * 11 + d2, d3), memory_config: (33792, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,11,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 33792 + d1 * 11 + d2, d3), memory_config: (1056, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,11,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 33792 + d1 * 11 + d2, d3), memory_config: (33792, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,12,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 36864 + d1 * 12 + d2, d3), memory_config: (1152, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,12,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 36864 + d1 * 12 + d2, d3), memory_config: (36864, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,12,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 36864 + d1 * 12 + d2, d3), memory_config: (1152, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,12,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 36864 + d1 * 12 + d2, d3), memory_config: (36864, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,12,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 36864 + d1 * 12 + d2, d3), memory_config: (1152, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,12,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 36864 + d1 * 12 + d2, d3), memory_config: (36864, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,12,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 36864 + d1 * 12 + d2, d3), memory_config: (1152, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,12,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 36864 + d1 * 12 + d2, d3), memory_config: (36864, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,12,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 36864 + d1 * 12 + d2, d3), memory_config: (1152, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,12,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 36864 + d1 * 12 + d2, d3), memory_config: (36864, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,12,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 36864 + d1 * 12 + d2, d3), memory_config: (1152, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,12,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 36864 + d1 * 12 + d2, d3), memory_config: (36864, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,12,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 36864 + d1 * 12 + d2, d3), memory_config: (1152, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,12,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 36864 + d1 * 12 + d2, d3), memory_config: (36864, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,12,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 36864 + d1 * 12 + d2, d3), memory_config: (1152, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,12,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 36864 + d1 * 12 + d2, d3), memory_config: (36864, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,12,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 36864 + d1 * 12 + d2, d3), memory_config: (1152, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,12,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 36864 + d1 * 12 + d2, d3), memory_config: (36864, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,12,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 36864 + d1 * 12 + d2, d3), memory_config: (1152, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,12,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 36864 + d1 * 12 + d2, d3), memory_config: (36864, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,12,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 36864 + d1 * 12 + d2, d3), memory_config: (1152, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,12,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 36864 + d1 * 12 + d2, d3), memory_config: (36864, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,12,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 36864 + d1 * 12 + d2, d3), memory_config: (1152, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,12,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 36864 + d1 * 12 + d2, d3), memory_config: (36864, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,13,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 39936 + d1 * 13 + d2, d3), memory_config: (1248, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,13,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 39936 + d1 * 13 + d2, d3), memory_config: (39936, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,13,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 39936 + d1 * 13 + d2, d3), memory_config: (1248, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,13,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 39936 + d1 * 13 + d2, d3), memory_config: (39936, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,13,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 39936 + d1 * 13 + d2, d3), memory_config: (1248, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,13,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 39936 + d1 * 13 + d2, d3), memory_config: (39936, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,13,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 39936 + d1 * 13 + d2, d3), memory_config: (1248, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,13,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 39936 + d1 * 13 + d2, d3), memory_config: (39936, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,13,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 39936 + d1 * 13 + d2, d3), memory_config: (1248, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,13,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 39936 + d1 * 13 + d2, d3), memory_config: (39936, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,13,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 39936 + d1 * 13 + d2, d3), memory_config: (1248, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,13,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 39936 + d1 * 13 + d2, d3), memory_config: (39936, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,13,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 39936 + d1 * 13 + d2, d3), memory_config: (1248, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,13,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 39936 + d1 * 13 + d2, d3), memory_config: (39936, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,13,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 39936 + d1 * 13 + d2, d3), memory_config: (1248, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,13,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 39936 + d1 * 13 + d2, d3), memory_config: (39936, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,13,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 39936 + d1 * 13 + d2, d3), memory_config: (1248, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,13,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 39936 + d1 * 13 + d2, d3), memory_config: (39936, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,13,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 39936 + d1 * 13 + d2, d3), memory_config: (1248, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,13,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 39936 + d1 * 13 + d2, d3), memory_config: (39936, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,13,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 39936 + d1 * 13 + d2, d3), memory_config: (1248, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,13,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 39936 + d1 * 13 + d2, d3), memory_config: (39936, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,13,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 39936 + d1 * 13 + d2, d3), memory_config: (1248, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,13,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 39936 + d1 * 13 + d2, d3), memory_config: (39936, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,13,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 39936 + d1 * 13 + d2, d3), memory_config: (1248, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,13,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 39936 + d1 * 13 + d2, d3), memory_config: (39936, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,14,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 43008 + d1 * 14 + d2, d3), memory_config: (1344, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,14,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 43008 + d1 * 14 + d2, d3), memory_config: (43008, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,14,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 43008 + d1 * 14 + d2, d3), memory_config: (1344, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,14,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 43008 + d1 * 14 + d2, d3), memory_config: (43008, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,14,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 43008 + d1 * 14 + d2, d3), memory_config: (1344, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,14,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 43008 + d1 * 14 + d2, d3), memory_config: (43008, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,14,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 43008 + d1 * 14 + d2, d3), memory_config: (1344, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,14,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 43008 + d1 * 14 + d2, d3), memory_config: (43008, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,14,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 43008 + d1 * 14 + d2, d3), memory_config: (1344, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,14,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 43008 + d1 * 14 + d2, d3), memory_config: (43008, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,14,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 43008 + d1 * 14 + d2, d3), memory_config: (1344, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,14,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 43008 + d1 * 14 + d2, d3), memory_config: (43008, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,14,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 43008 + d1 * 14 + d2, d3), memory_config: (1344, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,14,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 43008 + d1 * 14 + d2, d3), memory_config: (43008, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,14,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 43008 + d1 * 14 + d2, d3), memory_config: (1344, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,14,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 43008 + d1 * 14 + d2, d3), memory_config: (43008, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,14,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 43008 + d1 * 14 + d2, d3), memory_config: (1344, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,14,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 43008 + d1 * 14 + d2, d3), memory_config: (43008, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,14,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 43008 + d1 * 14 + d2, d3), memory_config: (1344, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,14,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 43008 + d1 * 14 + d2, d3), memory_config: (43008, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,14,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 43008 + d1 * 14 + d2, d3), memory_config: (1344, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,14,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 43008 + d1 * 14 + d2, d3), memory_config: (43008, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,14,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 43008 + d1 * 14 + d2, d3), memory_config: (1344, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,14,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 43008 + d1 * 14 + d2, d3), memory_config: (43008, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,14,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 43008 + d1 * 14 + d2, d3), memory_config: (1344, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,14,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 43008 + d1 * 14 + d2, d3), memory_config: (43008, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,14,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 43008 + d1 * 14 + d2, d3), memory_config: (1344, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,14,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 43008 + d1 * 14 + d2, d3), memory_config: (43008, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,15,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 46080 + d1 * 15 + d2, d3), memory_config: (1440, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,15,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 46080 + d1 * 15 + d2, d3), memory_config: (46080, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,15,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 46080 + d1 * 15 + d2, d3), memory_config: (1440, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,15,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 46080 + d1 * 15 + d2, d3), memory_config: (46080, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,15,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 46080 + d1 * 15 + d2, d3), memory_config: (1440, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,15,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 46080 + d1 * 15 + d2, d3), memory_config: (46080, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,15,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 46080 + d1 * 15 + d2, d3), memory_config: (1440, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,15,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 46080 + d1 * 15 + d2, d3), memory_config: (46080, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,15,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 46080 + d1 * 15 + d2, d3), memory_config: (1440, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,15,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 46080 + d1 * 15 + d2, d3), memory_config: (46080, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,15,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 46080 + d1 * 15 + d2, d3), memory_config: (1440, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,15,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 46080 + d1 * 15 + d2, d3), memory_config: (46080, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,15,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 46080 + d1 * 15 + d2, d3), memory_config: (1440, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,15,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 46080 + d1 * 15 + d2, d3), memory_config: (46080, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,15,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 46080 + d1 * 15 + d2, d3), memory_config: (1440, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,15,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 46080 + d1 * 15 + d2, d3), memory_config: (46080, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,15,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 46080 + d1 * 15 + d2, d3), memory_config: (1440, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,15,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 46080 + d1 * 15 + d2, d3), memory_config: (46080, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,15,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 46080 + d1 * 15 + d2, d3), memory_config: (1440, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,15,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 46080 + d1 * 15 + d2, d3), memory_config: (46080, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,15,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 46080 + d1 * 15 + d2, d3), memory_config: (1440, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,15,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 46080 + d1 * 15 + d2, d3), memory_config: (46080, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,15,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 46080 + d1 * 15 + d2, d3), memory_config: (1440, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,15,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 46080 + d1 * 15 + d2, d3), memory_config: (46080, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,15,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 46080 + d1 * 15 + d2, d3), memory_config: (1440, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,15,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 46080 + d1 * 15 + d2, d3), memory_config: (46080, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,15,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 46080 + d1 * 15 + d2, d3), memory_config: (1440, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,15,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 46080 + d1 * 15 + d2, d3), memory_config: (46080, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,15,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 46080 + d1 * 15 + d2, d3), memory_config: (1440, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,15,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 46080 + d1 * 15 + d2, d3), memory_config: (46080, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,6,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 18432 + d1 * 6 + d2, d3), memory_config: (576, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,6,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 18432 + d1 * 6 + d2, d3), memory_config: (18432, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,6,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 18432 + d1 * 6 + d2, d3), memory_config: (576, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,6,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 18432 + d1 * 6 + d2, d3), memory_config: (18432, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,6,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 18432 + d1 * 6 + d2, d3), memory_config: (576, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,6,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 18432 + d1 * 6 + d2, d3), memory_config: (18432, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,6,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 18432 + d1 * 6 + d2, d3), memory_config: (576, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,6,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 18432 + d1 * 6 + d2, d3), memory_config: (18432, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,6,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 18432 + d1 * 6 + d2, d3), memory_config: (576, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,6,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 18432 + d1 * 6 + d2, d3), memory_config: (18432, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,6,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 18432 + d1 * 6 + d2, d3), memory_config: (576, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,6,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 18432 + d1 * 6 + d2, d3), memory_config: (18432, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,7,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 21504 + d1 * 7 + d2, d3), memory_config: (672, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,7,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 21504 + d1 * 7 + d2, d3), memory_config: (21504, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,7,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 21504 + d1 * 7 + d2, d3), memory_config: (672, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,7,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 21504 + d1 * 7 + d2, d3), memory_config: (21504, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,7,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 21504 + d1 * 7 + d2, d3), memory_config: (672, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,7,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 21504 + d1 * 7 + d2, d3), memory_config: (21504, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,7,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 21504 + d1 * 7 + d2, d3), memory_config: (672, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,7,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 21504 + d1 * 7 + d2, d3), memory_config: (21504, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,7,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 21504 + d1 * 7 + d2, d3), memory_config: (672, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,7,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 21504 + d1 * 7 + d2, d3), memory_config: (21504, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,7,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 21504 + d1 * 7 + d2, d3), memory_config: (672, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,7,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 21504 + d1 * 7 + d2, d3), memory_config: (21504, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,7,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 21504 + d1 * 7 + d2, d3), memory_config: (672, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,7,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 21504 + d1 * 7 + d2, d3), memory_config: (21504, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,8,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 24576 + d1 * 8 + d2, d3), memory_config: (768, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,8,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 24576 + d1 * 8 + d2, d3), memory_config: (24576, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,8,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 24576 + d1 * 8 + d2, d3), memory_config: (768, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,8,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 24576 + d1 * 8 + d2, d3), memory_config: (24576, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,8,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 24576 + d1 * 8 + d2, d3), memory_config: (768, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,8,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 24576 + d1 * 8 + d2, d3), memory_config: (24576, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,8,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 24576 + d1 * 8 + d2, d3), memory_config: (768, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,8,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 24576 + d1 * 8 + d2, d3), memory_config: (24576, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,8,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 24576 + d1 * 8 + d2, d3), memory_config: (768, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,8,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 24576 + d1 * 8 + d2, d3), memory_config: (24576, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,8,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 24576 + d1 * 8 + d2, d3), memory_config: (768, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,8,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 24576 + d1 * 8 + d2, d3), memory_config: (24576, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,8,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 24576 + d1 * 8 + d2, d3), memory_config: (768, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,8,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 24576 + d1 * 8 + d2, d3), memory_config: (24576, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,8,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 24576 + d1 * 8 + d2, d3), memory_config: (768, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,8,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 24576 + d1 * 8 + d2, d3), memory_config: (24576, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,9,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 27648 + d1 * 9 + d2, d3), memory_config: (864, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,9,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 27648 + d1 * 9 + d2, d3), memory_config: (27648, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,9,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 27648 + d1 * 9 + d2, d3), memory_config: (864, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,9,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 27648 + d1 * 9 + d2, d3), memory_config: (27648, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,9,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 27648 + d1 * 9 + d2, d3), memory_config: (864, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,9,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 27648 + d1 * 9 + d2, d3), memory_config: (27648, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,9,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 27648 + d1 * 9 + d2, d3), memory_config: (864, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,9,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 27648 + d1 * 9 + d2, d3), memory_config: (27648, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,9,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 27648 + d1 * 9 + d2, d3), memory_config: (864, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,9,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 27648 + d1 * 9 + d2, d3), memory_config: (27648, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,9,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 27648 + d1 * 9 + d2, d3), memory_config: (864, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,9,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 27648 + d1 * 9 + d2, d3), memory_config: (27648, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,9,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 27648 + d1 * 9 + d2, d3), memory_config: (864, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,9,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 27648 + d1 * 9 + d2, d3), memory_config: (27648, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,9,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 27648 + d1 * 9 + d2, d3), memory_config: (864, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,9,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 27648 + d1 * 9 + d2, d3), memory_config: (27648, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,9,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 27648 + d1 * 9 + d2, d3), memory_config: (864, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,9,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 27648 + d1 * 9 + d2, d3), memory_config: (27648, 16, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (3072, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,3072,1,16,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3072 + d1 + d2, d3), memory_config: (96, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,32,16,3,96,bf16]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 1536 + d1 * 48 + d2 * 3 + d3, d4), memory_config: (48, 3, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,32,16,3,96,bf16]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 1536 + d1 * 48 + d2 * 3 + d3, d4), memory_config: (1536, 96, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,32,16,1,96,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 512 + d1 * 16 + d2 + d3, d4), memory_config: (512, 96, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,32,16,1,96,bf16]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 512 + d1 * 16 + d2 + d3, d4), memory_config: (16, 3, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,32,16,3,96,bf16]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 1536 + d1 * 48 + d2 * 3 + d3, d4), memory_config: (48, 3, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,32,16,3,96,bf16]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 1536 + d1 * 48 + d2 * 3 + d3, d4), memory_config: (1536, 96, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,32,16,1,96,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 512 + d1 * 16 + d2 + d3, d4), memory_config: (512, 96, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,32,16,1,96,bf16]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 512 + d1 * 16 + d2 + d3, d4), memory_config: (16, 3, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,32,16,3,96,bf16]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 1536 + d1 * 48 + d2 * 3 + d3, d4), memory_config: (48, 3, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,32,16,3,96,bf16]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 1536 + d1 * 48 + d2 * 3 + d3, d4), memory_config: (1536, 96, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,32,16,1,96,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 512 + d1 * 16 + d2 + d3, d4), memory_config: (512, 96, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,32,16,1,96,bf16]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 512 + d1 * 16 + d2 + d3, d4), memory_config: (16, 3, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,3,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 3, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3,224,224,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 672 + d1 * 224 + d2, d3), memory_config: (21, 7, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3,224,224,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 672 + d1 * 224 + d2, d3), memory_config: (672, 224, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,224,224,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 224 + d1 * 224 + d2, d3), memory_config: (224, 224, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,224,224,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 224 + d1 * 224 + d2, d3), memory_config: (7, 7, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,3,224,224,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 672 + d1 * 224 + d2, d3), memory_config: (21, 7, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3,224,224,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 672 + d1 * 224 + d2, d3), memory_config: (672, 224, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,224,224,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 224 + d1 * 224 + d2, d3), memory_config: (224, 224, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,224,224,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 224 + d1 * 224 + d2, d3), memory_config: (7, 7, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,3,224,224,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 672 + d1 * 224 + d2, d3), memory_config: (21, 7, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3,224,224,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 672 + d1 * 224 + d2, d3), memory_config: (672, 224, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,224,224,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 224 + d1 * 224 + d2, d3), memory_config: (224, 224, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,224,224,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 224 + d1 * 224 + d2, d3), memory_config: (7, 7, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,45,50257,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 45 + d1, d2), memory_config: (2, 1571, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,45,50257,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 45 + d1, d2), memory_config: (45, 50257, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,50257,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 50257, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,50257,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1571, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,4,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,4,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 4, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,50,f32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 2, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,50,f32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 50, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,f32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,1,f32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,50,768,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 50 + d1, d2), memory_config: (2, 24, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,50,768,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 50 + d1, d2), memory_config: (50, 768, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,768,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 768, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,768,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 24, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,5,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,5,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 5, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,5,51200,f32]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 5 + d1, d2), memory_config: (1, 1600, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,5,51200,f32]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 5 + d1, d2), memory_config: (5, 51200, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,51200,f32]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 51200, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,1,51200,f32]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1600, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,6,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,6,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 6, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,6,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 6 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,6,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 6 + d1, d2), memory_config: (6, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,6,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 6 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,6,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 6 + d1, d2), memory_config: (6, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,6,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 6 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,6,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 6 + d1, d2), memory_config: (6, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,6,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 6 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,6,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 6 + d1, d2), memory_config: (6, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,6,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 6 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,6,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 6 + d1, d2), memory_config: (6, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,6,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 6 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,6,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 6 + d1, d2), memory_config: (6, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,6,50272,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 6 + d1, d2), memory_config: (1, 1571, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,6,50272,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 6 + d1, d2), memory_config: (6, 50272, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,50272,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 50272, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,50272,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1571, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,6,50280,f32]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 6 + d1, d2), memory_config: (1, 1572, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,6,50280,f32]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 6 + d1, d2), memory_config: (6, 50280, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,50280,f32]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 50280, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,1,50280,f32]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1572, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,7,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,7,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 7, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,7,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 7 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,7,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 7 + d1, d2), memory_config: (7, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 7 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,7,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 7 + d1, d2), memory_config: (7, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 7 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,7,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 7 + d1, d2), memory_config: (7, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 7 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,7,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 7 + d1, d2), memory_config: (7, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 7 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,7,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 7 + d1, d2), memory_config: (7, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 7 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,7,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 7 + d1, d2), memory_config: (7, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 7 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,7,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 7 + d1, d2), memory_config: (7, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,50280,f32]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 7 + d1, d2), memory_config: (1, 1572, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,7,50280,f32]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 7 + d1, d2), memory_config: (7, 50280, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,50280,f32]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 50280, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,1,50280,f32]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1572, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,8,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,8,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 8, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,8,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 8 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,8,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 8 + d1, d2), memory_config: (8, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,8,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 8 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,8,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 8 + d1, d2), memory_config: (8, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,8,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 8 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,8,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 8 + d1, d2), memory_config: (8, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,8,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 8 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,8,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 8 + d1, d2), memory_config: (8, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,8,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 8 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,8,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 8 + d1, d2), memory_config: (8, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,8,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 8 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,8,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 8 + d1, d2), memory_config: (8, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,8,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 8 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,8,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 8 + d1, d2), memory_config: (8, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,8,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 8 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,8,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 8 + d1, d2), memory_config: (8, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,8,50280,f32]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 8 + d1, d2), memory_config: (1, 1572, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,8,50280,f32]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 8 + d1, d2), memory_config: (8, 50280, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,50280,f32]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 50280, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,1,50280,f32]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1572, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,8,768,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 8 + d1, d2), memory_config: (1, 24, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,8,768,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 8 + d1, d2), memory_config: (8, 768, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,768,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 768, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,768,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 24, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,9,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,9,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 9, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,9,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 9 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,9,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 9 + d1, d2), memory_config: (9, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,9,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 9 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,9,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 9 + d1, d2), memory_config: (9, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,9,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 9 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,9,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 9 + d1, d2), memory_config: (9, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,9,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 9 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,9,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 9 + d1, d2), memory_config: (9, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,9,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 9 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,9,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 9 + d1, d2), memory_config: (9, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,9,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 9 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,9,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 9 + d1, d2), memory_config: (9, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,9,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 9 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,9,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 9 + d1, d2), memory_config: (9, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,9,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 9 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,9,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 9 + d1, d2), memory_config: (9, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,9,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 9 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,9,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 9 + d1, d2), memory_config: (9, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,9,50280,f32]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 9 + d1, d2), memory_config: (1, 1572, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,9,50280,f32]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 9 + d1, d2), memory_config: (9, 50280, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,50280,f32]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 50280, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,1,50280,f32]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1572, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,9,768,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 9 + d1, d2), memory_config: (1, 24, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,9,768,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 9 + d1, d2), memory_config: (9, 768, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,768,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 768, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,768,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 24, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[3234,4,f32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (102, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[3234,4,f32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (3234, 4, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[3234,1,f32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (3234, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[3234,1,f32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (102, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[3234,4,f32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (102, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[3234,4,f32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (3234, 4, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[3234,1,f32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (3234, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[3234,1,f32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (102, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[3234,4,f32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (102, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[3234,4,f32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (3234, 4, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[3234,1,f32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (3234, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[3234,1,f32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (102, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[3234,4,f32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (102, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[3234,4,f32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (3234, 4, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[3234,1,f32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (3234, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[3234,1,f32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (102, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[3,121,12,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 209088 + d1 * 1728 + d2 * 144 + d3, d4), memory_config: (19602, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[3,121,12,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 209088 + d1 * 1728 + d2 * 144 + d3, d4), memory_config: (627264, 32, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,121,12,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 209088 + d1 * 1728 + d2 * 144 + d3, d4), memory_config: (209088, 32, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,121,12,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 209088 + d1 * 1728 + d2 * 144 + d3, d4), memory_config: (6534, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[3,121,12,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 209088 + d1 * 1728 + d2 * 144 + d3, d4), memory_config: (19602, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[3,121,12,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 209088 + d1 * 1728 + d2 * 144 + d3, d4), memory_config: (627264, 32, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,121,12,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 209088 + d1 * 1728 + d2 * 144 + d3, d4), memory_config: (209088, 32, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,121,12,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 209088 + d1 * 1728 + d2 * 144 + d3, d4), memory_config: (6534, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[3,121,12,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 209088 + d1 * 1728 + d2 * 144 + d3, d4), memory_config: (19602, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[3,121,12,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 209088 + d1 * 1728 + d2 * 144 + d3, d4), memory_config: (627264, 32, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,121,12,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 209088 + d1 * 1728 + d2 * 144 + d3, d4), memory_config: (209088, 32, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,121,12,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 209088 + d1 * 1728 + d2 * 144 + d3, d4), memory_config: (6534, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[3,121,6,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 104544 + d1 * 864 + d2 * 144 + d3, d4), memory_config: (9801, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[3,121,6,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 104544 + d1 * 864 + d2 * 144 + d3, d4), memory_config: (313632, 32, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,121,6,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 104544 + d1 * 864 + d2 * 144 + d3, d4), memory_config: (104544, 32, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,121,6,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 104544 + d1 * 864 + d2 * 144 + d3, d4), memory_config: (3267, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[3,121,6,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 104544 + d1 * 864 + d2 * 144 + d3, d4), memory_config: (9801, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[3,121,6,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 104544 + d1 * 864 + d2 * 144 + d3, d4), memory_config: (313632, 32, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,121,6,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 104544 + d1 * 864 + d2 * 144 + d3, d4), memory_config: (104544, 32, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,121,6,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 104544 + d1 * 864 + d2 * 144 + d3, d4), memory_config: (3267, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[3,121,6,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 104544 + d1 * 864 + d2 * 144 + d3, d4), memory_config: (9801, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[3,121,6,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 104544 + d1 * 864 + d2 * 144 + d3, d4), memory_config: (313632, 32, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,121,6,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 104544 + d1 * 864 + d2 * 144 + d3, d4), memory_config: (104544, 32, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,121,6,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 104544 + d1 * 864 + d2 * 144 + d3, d4), memory_config: (3267, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[3,1370,1,1280,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1370 + d1 + d2, d3), memory_config: (129, 40, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[3,1370,1,1280,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1370 + d1 + d2, d3), memory_config: (4110, 1280, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1370,1,1280,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1370 + d1 + d2, d3), memory_config: (1370, 1280, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1370,1,1280,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1370 + d1 + d2, d3), memory_config: (43, 40, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[3,1370,1,1280,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1370 + d1 + d2, d3), memory_config: (129, 40, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[3,1370,1,1280,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1370 + d1 + d2, d3), memory_config: (4110, 1280, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1370,1,1280,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1370 + d1 + d2, d3), memory_config: (1370, 1280, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1370,1,1280,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1370 + d1 + d2, d3), memory_config: (43, 40, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[3,1370,1,1280,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1370 + d1 + d2, d3), memory_config: (129, 40, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[3,1370,1,1280,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1370 + d1 + d2, d3), memory_config: (4110, 1280, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1370,1,1280,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1370 + d1 + d2, d3), memory_config: (1370, 1280, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1370,1,1280,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1370 + d1 + d2, d3), memory_config: (43, 40, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[3,16,8,49,32,bf16]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 6272 + d1 * 392 + d2 * 49 + d3, d4), memory_config: (588, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[3,16,8,49,32,bf16]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 6272 + d1 * 392 + d2 * 49 + d3, d4), memory_config: (18816, 32, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,16,8,49,32,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 6272 + d1 * 392 + d2 * 49 + d3, d4), memory_config: (6272, 32, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,16,8,49,32,bf16]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 6272 + d1 * 392 + d2 * 49 + d3, d4), memory_config: (196, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[3,16,8,49,32,bf16]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 6272 + d1 * 392 + d2 * 49 + d3, d4), memory_config: (588, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[3,16,8,49,32,bf16]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 6272 + d1 * 392 + d2 * 49 + d3, d4), memory_config: (18816, 32, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,16,8,49,32,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 6272 + d1 * 392 + d2 * 49 + d3, d4), memory_config: (6272, 32, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,16,8,49,32,bf16]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 6272 + d1 * 392 + d2 * 49 + d3, d4), memory_config: (196, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[3,16,8,49,32,bf16]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 6272 + d1 * 392 + d2 * 49 + d3, d4), memory_config: (588, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[3,16,8,49,32,bf16]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 6272 + d1 * 392 + d2 * 49 + d3, d4), memory_config: (18816, 32, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,16,8,49,32,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 6272 + d1 * 392 + d2 * 49 + d3, d4), memory_config: (6272, 32, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,16,8,49,32,bf16]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 6272 + d1 * 392 + d2 * 49 + d3, d4), memory_config: (196, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[3,1,12,257,64,bf16]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 3084 + d1 * 3084 + d2 * 257 + d3, d4), memory_config: (290, 2, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[3,1,12,257,64,bf16]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 3084 + d1 * 3084 + d2 * 257 + d3, d4), memory_config: (9252, 64, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,12,257,64,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 3084 + d1 * 3084 + d2 * 257 + d3, d4), memory_config: (3084, 64, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,12,257,64,bf16]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 3084 + d1 * 3084 + d2 * 257 + d3, d4), memory_config: (97, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[3,1,12,257,64,bf16]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 3084 + d1 * 3084 + d2 * 257 + d3, d4), memory_config: (290, 2, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[3,1,12,257,64,bf16]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 3084 + d1 * 3084 + d2 * 257 + d3, d4), memory_config: (9252, 64, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,12,257,64,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 3084 + d1 * 3084 + d2 * 257 + d3, d4), memory_config: (3084, 64, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,12,257,64,bf16]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 3084 + d1 * 3084 + d2 * 257 + d3, d4), memory_config: (97, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[3,1,12,257,64,bf16]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 3084 + d1 * 3084 + d2 * 257 + d3, d4), memory_config: (290, 2, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[3,1,12,257,64,bf16]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 3084 + d1 * 3084 + d2 * 257 + d3, d4), memory_config: (9252, 64, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,12,257,64,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 3084 + d1 * 3084 + d2 * 257 + d3, d4), memory_config: (3084, 64, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,12,257,64,bf16]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 3084 + d1 * 3084 + d2 * 257 + d3, d4), memory_config: (97, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[3,1,32,49,32,bf16]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 1568 + d1 * 1568 + d2 * 49 + d3, d4), memory_config: (147, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[3,1,32,49,32,bf16]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 1568 + d1 * 1568 + d2 * 49 + d3, d4), memory_config: (4704, 32, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,32,49,32,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 1568 + d1 * 1568 + d2 * 49 + d3, d4), memory_config: (1568, 32, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,32,49,32,bf16]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 1568 + d1 * 1568 + d2 * 49 + d3, d4), memory_config: (49, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[3,1,32,49,32,bf16]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 1568 + d1 * 1568 + d2 * 49 + d3, d4), memory_config: (147, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[3,1,32,49,32,bf16]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 1568 + d1 * 1568 + d2 * 49 + d3, d4), memory_config: (4704, 32, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,32,49,32,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 1568 + d1 * 1568 + d2 * 49 + d3, d4), memory_config: (1568, 32, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,32,49,32,bf16]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 1568 + d1 * 1568 + d2 * 49 + d3, d4), memory_config: (49, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[3,1,32,49,32,bf16]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 1568 + d1 * 1568 + d2 * 49 + d3, d4), memory_config: (147, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[3,1,32,49,32,bf16]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 1568 + d1 * 1568 + d2 * 49 + d3, d4), memory_config: (4704, 32, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,32,49,32,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 1568 + d1 * 1568 + d2 * 49 + d3, d4), memory_config: (1568, 32, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,32,49,32,bf16]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 1568 + d1 * 1568 + d2 * 49 + d3, d4), memory_config: (49, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[3,36,12,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 62208 + d1 * 1728 + d2 * 144 + d3, d4), memory_config: (5832, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[3,36,12,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 62208 + d1 * 1728 + d2 * 144 + d3, d4), memory_config: (186624, 32, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,36,12,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 62208 + d1 * 1728 + d2 * 144 + d3, d4), memory_config: (62208, 32, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,36,12,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 62208 + d1 * 1728 + d2 * 144 + d3, d4), memory_config: (1944, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[3,36,12,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 62208 + d1 * 1728 + d2 * 144 + d3, d4), memory_config: (5832, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[3,36,12,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 62208 + d1 * 1728 + d2 * 144 + d3, d4), memory_config: (186624, 32, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,36,12,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 62208 + d1 * 1728 + d2 * 144 + d3, d4), memory_config: (62208, 32, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,36,12,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 62208 + d1 * 1728 + d2 * 144 + d3, d4), memory_config: (1944, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[3,36,12,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 62208 + d1 * 1728 + d2 * 144 + d3, d4), memory_config: (5832, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[3,36,12,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 62208 + d1 * 1728 + d2 * 144 + d3, d4), memory_config: (186624, 32, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,36,12,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 62208 + d1 * 1728 + d2 * 144 + d3, d4), memory_config: (62208, 32, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,36,12,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 62208 + d1 * 1728 + d2 * 144 + d3, d4), memory_config: (1944, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[3,36,24,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 124416 + d1 * 3456 + d2 * 144 + d3, d4), memory_config: (11664, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[3,36,24,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 124416 + d1 * 3456 + d2 * 144 + d3, d4), memory_config: (373248, 32, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,36,24,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 124416 + d1 * 3456 + d2 * 144 + d3, d4), memory_config: (124416, 32, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,36,24,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 124416 + d1 * 3456 + d2 * 144 + d3, d4), memory_config: (3888, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[3,36,24,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 124416 + d1 * 3456 + d2 * 144 + d3, d4), memory_config: (11664, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[3,36,24,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 124416 + d1 * 3456 + d2 * 144 + d3, d4), memory_config: (373248, 32, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,36,24,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 124416 + d1 * 3456 + d2 * 144 + d3, d4), memory_config: (124416, 32, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,36,24,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 124416 + d1 * 3456 + d2 * 144 + d3, d4), memory_config: (3888, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[3,36,24,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 124416 + d1 * 3456 + d2 * 144 + d3, d4), memory_config: (11664, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[3,36,24,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 124416 + d1 * 3456 + d2 * 144 + d3, d4), memory_config: (373248, 32, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,36,24,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 124416 + d1 * 3456 + d2 * 144 + d3, d4), memory_config: (124416, 32, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,36,24,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 124416 + d1 * 3456 + d2 * 144 + d3, d4), memory_config: (3888, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[3,484,6,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 418176 + d1 * 864 + d2 * 144 + d3, d4), memory_config: (39204, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[3,484,6,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 418176 + d1 * 864 + d2 * 144 + d3, d4), memory_config: (1254528, 32, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,484,6,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 418176 + d1 * 864 + d2 * 144 + d3, d4), memory_config: (418176, 32, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,484,6,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 418176 + d1 * 864 + d2 * 144 + d3, d4), memory_config: (13068, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[3,484,6,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 418176 + d1 * 864 + d2 * 144 + d3, d4), memory_config: (39204, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[3,484,6,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 418176 + d1 * 864 + d2 * 144 + d3, d4), memory_config: (1254528, 32, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,484,6,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 418176 + d1 * 864 + d2 * 144 + d3, d4), memory_config: (418176, 32, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,484,6,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 418176 + d1 * 864 + d2 * 144 + d3, d4), memory_config: (13068, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[3,484,6,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 418176 + d1 * 864 + d2 * 144 + d3, d4), memory_config: (39204, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[3,484,6,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 418176 + d1 * 864 + d2 * 144 + d3, d4), memory_config: (1254528, 32, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,484,6,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 418176 + d1 * 864 + d2 * 144 + d3, d4), memory_config: (418176, 32, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,484,6,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 418176 + d1 * 864 + d2 * 144 + d3, d4), memory_config: (13068, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[3,4,16,49,32,bf16]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 3136 + d1 * 784 + d2 * 49 + d3, d4), memory_config: (294, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[3,4,16,49,32,bf16]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 3136 + d1 * 784 + d2 * 49 + d3, d4), memory_config: (9408, 32, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,4,16,49,32,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 3136 + d1 * 784 + d2 * 49 + d3, d4), memory_config: (3136, 32, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,4,16,49,32,bf16]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 3136 + d1 * 784 + d2 * 49 + d3, d4), memory_config: (98, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[3,4,16,49,32,bf16]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 3136 + d1 * 784 + d2 * 49 + d3, d4), memory_config: (294, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[3,4,16,49,32,bf16]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 3136 + d1 * 784 + d2 * 49 + d3, d4), memory_config: (9408, 32, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,4,16,49,32,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 3136 + d1 * 784 + d2 * 49 + d3, d4), memory_config: (3136, 32, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,4,16,49,32,bf16]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 3136 + d1 * 784 + d2 * 49 + d3, d4), memory_config: (98, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[3,4,16,49,32,bf16]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 3136 + d1 * 784 + d2 * 49 + d3, d4), memory_config: (294, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[3,4,16,49,32,bf16]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 3136 + d1 * 784 + d2 * 49 + d3, d4), memory_config: (9408, 32, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,4,16,49,32,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 3136 + d1 * 784 + d2 * 49 + d3, d4), memory_config: (3136, 32, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,4,16,49,32,bf16]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 3136 + d1 * 784 + d2 * 49 + d3, d4), memory_config: (98, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[3,4,48,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 27648 + d1 * 6912 + d2 * 144 + d3, d4), memory_config: (2592, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[3,4,48,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 27648 + d1 * 6912 + d2 * 144 + d3, d4), memory_config: (82944, 32, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,4,48,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 27648 + d1 * 6912 + d2 * 144 + d3, d4), memory_config: (27648, 32, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,4,48,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 27648 + d1 * 6912 + d2 * 144 + d3, d4), memory_config: (864, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[3,4,48,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 27648 + d1 * 6912 + d2 * 144 + d3, d4), memory_config: (2592, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[3,4,48,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 27648 + d1 * 6912 + d2 * 144 + d3, d4), memory_config: (82944, 32, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,4,48,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 27648 + d1 * 6912 + d2 * 144 + d3, d4), memory_config: (27648, 32, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,4,48,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 27648 + d1 * 6912 + d2 * 144 + d3, d4), memory_config: (864, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[3,4,48,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 27648 + d1 * 6912 + d2 * 144 + d3, d4), memory_config: (2592, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[3,4,48,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 27648 + d1 * 6912 + d2 * 144 + d3, d4), memory_config: (82944, 32, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,4,48,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 27648 + d1 * 6912 + d2 * 144 + d3, d4), memory_config: (27648, 32, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,4,48,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 27648 + d1 * 6912 + d2 * 144 + d3, d4), memory_config: (864, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[3,64,4,49,32,bf16]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 12544 + d1 * 196 + d2 * 49 + d3, d4), memory_config: (1176, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[3,64,4,49,32,bf16]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 12544 + d1 * 196 + d2 * 49 + d3, d4), memory_config: (37632, 32, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,64,4,49,32,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 12544 + d1 * 196 + d2 * 49 + d3, d4), memory_config: (12544, 32, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,64,4,49,32,bf16]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 12544 + d1 * 196 + d2 * 49 + d3, d4), memory_config: (392, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[3,64,4,49,32,bf16]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 12544 + d1 * 196 + d2 * 49 + d3, d4), memory_config: (1176, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[3,64,4,49,32,bf16]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 12544 + d1 * 196 + d2 * 49 + d3, d4), memory_config: (37632, 32, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,64,4,49,32,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 12544 + d1 * 196 + d2 * 49 + d3, d4), memory_config: (12544, 32, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,64,4,49,32,bf16]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 12544 + d1 * 196 + d2 * 49 + d3, d4), memory_config: (392, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[3,64,4,49,32,bf16]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 12544 + d1 * 196 + d2 * 49 + d3, d4), memory_config: (1176, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[3,64,4,49,32,bf16]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 12544 + d1 * 196 + d2 * 49 + d3, d4), memory_config: (37632, 32, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,64,4,49,32,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 12544 + d1 * 196 + d2 * 49 + d3, d4), memory_config: (12544, 32, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,64,4,49,32,bf16]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 12544 + d1 * 196 + d2 * 49 + d3, d4), memory_config: (392, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[3,9,24,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 31104 + d1 * 3456 + d2 * 144 + d3, d4), memory_config: (2916, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[3,9,24,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 31104 + d1 * 3456 + d2 * 144 + d3, d4), memory_config: (93312, 32, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,9,24,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 31104 + d1 * 3456 + d2 * 144 + d3, d4), memory_config: (31104, 32, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,9,24,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 31104 + d1 * 3456 + d2 * 144 + d3, d4), memory_config: (972, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[3,9,24,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 31104 + d1 * 3456 + d2 * 144 + d3, d4), memory_config: (2916, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[3,9,24,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 31104 + d1 * 3456 + d2 * 144 + d3, d4), memory_config: (93312, 32, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,9,24,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 31104 + d1 * 3456 + d2 * 144 + d3, d4), memory_config: (31104, 32, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,9,24,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 31104 + d1 * 3456 + d2 * 144 + d3, d4), memory_config: (972, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[3,9,24,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 31104 + d1 * 3456 + d2 * 144 + d3, d4), memory_config: (2916, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[3,9,24,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 31104 + d1 * 3456 + d2 * 144 + d3, d4), memory_config: (93312, 32, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,9,24,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 31104 + d1 * 3456 + d2 * 144 + d3, d4), memory_config: (31104, 32, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,9,24,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 31104 + d1 * 3456 + d2 * 144 + d3, d4), memory_config: (972, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[3,9,48,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 62208 + d1 * 6912 + d2 * 144 + d3, d4), memory_config: (5832, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[3,9,48,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 62208 + d1 * 6912 + d2 * 144 + d3, d4), memory_config: (186624, 32, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,9,48,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 62208 + d1 * 6912 + d2 * 144 + d3, d4), memory_config: (62208, 32, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,9,48,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 62208 + d1 * 6912 + d2 * 144 + d3, d4), memory_config: (1944, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[3,9,48,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 62208 + d1 * 6912 + d2 * 144 + d3, d4), memory_config: (5832, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[3,9,48,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 62208 + d1 * 6912 + d2 * 144 + d3, d4), memory_config: (186624, 32, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,9,48,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 62208 + d1 * 6912 + d2 * 144 + d3, d4), memory_config: (62208, 32, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,9,48,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 62208 + d1 * 6912 + d2 * 144 + d3, d4), memory_config: (1944, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[3,9,48,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 62208 + d1 * 6912 + d2 * 144 + d3, d4), memory_config: (5832, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[3,9,48,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 62208 + d1 * 6912 + d2 * 144 + d3, d4), memory_config: (186624, 32, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,9,48,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 62208 + d1 * 6912 + d2 * 144 + d3, d4), memory_config: (62208, 32, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,9,48,144,32,f32]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 62208 + d1 * 6912 + d2 * 144 + d3, d4), memory_config: (1944, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[4,2,1,ui32]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 2 + d1, d2), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[4,2,1,ui32]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 2 + d1, d2), memory_config: (8, 1, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,2,1,ui32]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 2 + d1, d2), memory_config: (2, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,2,1,ui32]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 2 + d1, d2), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[4,2,1,ui32]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 2 + d1, d2), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[4,2,1,ui32]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 2 + d1, d2), memory_config: (8, 1, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,2,1,ui32]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 2 + d1, d2), memory_config: (2, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,2,1,ui32]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 2 + d1, d2), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[4,2,1,ui32]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 2 + d1, d2), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[4,2,1,ui32]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 2 + d1, d2), memory_config: (8, 1, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,2,1,ui32]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 2 + d1, d2), memory_config: (2, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,2,1,ui32]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 2 + d1, d2), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[4,2,1,ui32]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 2 + d1, d2), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[4,2,1,ui32]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 2 + d1, d2), memory_config: (8, 1, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,2,1,ui32]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 2 + d1, d2), memory_config: (2, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,2,1,ui32]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 2 + d1, d2), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[6,1,100,4,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 100 + d2, d3), memory_config: (19, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[6,1,100,4,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 100 + d2, d3), memory_config: (600, 4, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,100,4,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 100 + d2, d3), memory_config: (100, 4, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,100,4,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 100 + d2, d3), memory_config: (4, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[6,1,100,92,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 100 + d2, d3), memory_config: (19, 3, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[6,1,100,92,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 100 + d2, d3), memory_config: (600, 92, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,100,92,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 100 + d2, d3), memory_config: (100, 92, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,100,92,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 100 + d1 * 100 + d2, d3), memory_config: (4, 3, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[8,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[8,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (8, 1, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[8,50,f32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 2, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[8,50,f32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (8, 50, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[8,1,f32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (8, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[8,1,f32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[14,14,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[14,14,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (14, 14, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[3,14,bf16]>
!tt.device<#device>
mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (3, 14, 'bf16', 'dram')layout: #ttnn.layouttensor<[3,14,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[14,14,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[14,14,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (14, 14, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[4,14,bf16]>
!tt.device<#device>
mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (4, 14, 'bf16', 'dram')layout: #ttnn.layouttensor<[4,14,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[14,14,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[14,14,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (14, 14, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[7,14,bf16]>
!tt.device<#device>
mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (7, 14, 'bf16', 'dram')layout: #ttnn.layouttensor<[7,14,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[16,2048,f32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 64, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[16,2048,f32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (16, 2048, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[8,2048,f32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (8, 2048, 'f32', 'system_memory')layout: #ttnn.layouttensor<[8,2048,f32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 64, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[16,2048,f32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 64, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[16,2048,f32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (16, 2048, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[8,2048,f32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (8, 2048, 'f32', 'system_memory')layout: #ttnn.layouttensor<[8,2048,f32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 64, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,1024,5120,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 1024 + d1, d2), memory_config: (32, 160, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,1024,5120,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 1024 + d1, d2), memory_config: (1024, 5120, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1024,2560,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 * 1024 + d1, d2), memory_config: (1024, 2560, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1024,2560,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 1024 + d1, d2), memory_config: (32, 80, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,1024,5120,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 1024 + d1, d2), memory_config: (32, 160, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,1024,5120,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 1024 + d1, d2), memory_config: (1024, 5120, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1024,2560,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 * 1024 + d1, d2), memory_config: (1024, 2560, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1024,2560,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 1024 + d1, d2), memory_config: (32, 80, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,10,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,10,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 10, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,10,128,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 10 + d1, d2), memory_config: (1, 4, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,10,128,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 10 + d1, d2), memory_config: (10, 128, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,10,96,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 * 10 + d1, d2), memory_config: (10, 96, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,10,96,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 10 + d1, d2), memory_config: (1, 3, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,10,128,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 10 + d1, d2), memory_config: (1, 4, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,10,128,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 10 + d1, d2), memory_config: (10, 128, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,10,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 * 10 + d1, d2), memory_config: (10, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,10,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 10 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,10,128,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 10 + d1, d2), memory_config: (1, 4, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,10,128,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 10 + d1, d2), memory_config: (10, 128, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,10,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 * 10 + d1, d2), memory_config: (10, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,10,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 10 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,11,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,11,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 11, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,11,128,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 11 + d1, d2), memory_config: (1, 4, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,11,128,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 11 + d1, d2), memory_config: (11, 128, 'bf16', 'system_memory')nannan
NameInput ShapesInput LayoutsAttributesOutput ShapesOutput LayoutsPCCATOL
ttnn.to_layouttensor<[1,11,96,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 * 11 + d1, d2), memory_config: (11, 96, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,11,96,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 11 + d1, d2), memory_config: (1, 3, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,11,128,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 11 + d1, d2), memory_config: (1, 4, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,11,128,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 11 + d1, d2), memory_config: (11, 128, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,11,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 * 11 + d1, d2), memory_config: (11, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,11,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 11 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,11,128,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 11 + d1, d2), memory_config: (1, 4, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,11,128,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 11 + d1, d2), memory_config: (11, 128, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,11,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 * 11 + d1, d2), memory_config: (11, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,11,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 11 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,128,128,192,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 128 + d2, d3), memory_config: (512, 6, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,128,128,192,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 128 + d2, d3), memory_config: (16384, 192, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,64,128,192,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 8192 + d1 * 128 + d2, d3), memory_config: (8192, 192, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,64,128,192,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 8192 + d1 * 128 + d2, d3), memory_config: (256, 6, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,128,128,192,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 128 + d2, d3), memory_config: (512, 6, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,128,128,192,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 128 + d2, d3), memory_config: (16384, 192, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,64,128,192,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 8192 + d1 * 128 + d2, d3), memory_config: (8192, 192, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,64,128,192,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 8192 + d1 * 128 + d2, d3), memory_config: (256, 6, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,128,128,384,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 128 + d2, d3), memory_config: (512, 12, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,128,128,384,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 128 + d2, d3), memory_config: (16384, 384, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,64,128,384,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 8192 + d1 * 128 + d2, d3), memory_config: (8192, 384, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,64,128,384,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 8192 + d1 * 128 + d2, d3), memory_config: (256, 12, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,128,128,384,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 128 + d2, d3), memory_config: (512, 12, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,128,128,384,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 128 + d2, d3), memory_config: (16384, 384, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,64,128,384,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 8192 + d1 * 128 + d2, d3), memory_config: (8192, 384, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,64,128,384,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 8192 + d1 * 128 + d2, d3), memory_config: (256, 12, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,128,132,192,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16896 + d1 * 132 + d2, d3), memory_config: (528, 6, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,128,132,192,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16896 + d1 * 132 + d2, d3), memory_config: (16896, 192, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,128,128,192,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 128 + d2, d3), memory_config: (16384, 192, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,128,128,192,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 128 + d2, d3), memory_config: (512, 6, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,128,132,384,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16896 + d1 * 132 + d2, d3), memory_config: (528, 12, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,128,132,384,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16896 + d1 * 132 + d2, d3), memory_config: (16896, 384, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,128,128,384,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 128 + d2, d3), memory_config: (16384, 384, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,128,128,384,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 128 + d2, d3), memory_config: (512, 12, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,128,256,192,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 32768 + d1 * 256 + d2, d3), memory_config: (1024, 6, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,128,256,192,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 32768 + d1 * 256 + d2, d3), memory_config: (32768, 192, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,128,128,192,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 128 + d2, d3), memory_config: (16384, 192, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,128,128,192,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 128 + d2, d3), memory_config: (512, 6, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,128,256,192,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 32768 + d1 * 256 + d2, d3), memory_config: (1024, 6, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,128,256,192,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 32768 + d1 * 256 + d2, d3), memory_config: (32768, 192, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,128,128,192,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 128 + d2, d3), memory_config: (16384, 192, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,128,128,192,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16384 + d1 * 128 + d2, d3), memory_config: (512, 6, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,12,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,12,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 12, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,12,128,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 12 + d1, d2), memory_config: (1, 4, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,12,128,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 12 + d1, d2), memory_config: (12, 128, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,12,96,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 * 12 + d1, d2), memory_config: (12, 96, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,12,96,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 12 + d1, d2), memory_config: (1, 3, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,12,128,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 12 + d1, d2), memory_config: (1, 4, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,12,128,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 12 + d1, d2), memory_config: (12, 128, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,12,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 * 12 + d1, d2), memory_config: (12, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,12,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 12 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,12,128,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 12 + d1, d2), memory_config: (1, 4, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,12,128,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 12 + d1, d2), memory_config: (12, 128, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,12,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 * 12 + d1, d2), memory_config: (12, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,12,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 12 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,12,12,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 144 + d1 * 12 + d2, d3), memory_config: (5, 4, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,12,12,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 144 + d1 * 12 + d2, d3), memory_config: (144, 128, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,12,12,64,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 144 + d1 * 12 + d2, d3), memory_config: (144, 64, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,12,12,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 144 + d1 * 12 + d2, d3), memory_config: (5, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,12,12,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 144 + d1 * 12 + d2, d3), memory_config: (5, 4, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,12,12,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 144 + d1 * 12 + d2, d3), memory_config: (144, 128, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,12,12,64,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 144 + d1 * 12 + d2, d3), memory_config: (144, 64, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,12,12,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 144 + d1 * 12 + d2, d3), memory_config: (5, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,12,1536,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 12 + d1, d2), memory_config: (1, 48, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,12,1536,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 12 + d1, d2), memory_config: (12, 1536, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,1536,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1536, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,1536,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 48, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,12,1,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12 + d1 + d2, d3), memory_config: (1, 4, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,12,1,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12 + d1 + d2, d3), memory_config: (12, 128, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,12,1,64,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12 + d1 + d2, d3), memory_config: (12, 64, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,12,1,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12 + d1 + d2, d3), memory_config: (1, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,12,1,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12 + d1 + d2, d3), memory_config: (1, 4, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,12,1,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12 + d1 + d2, d3), memory_config: (12, 128, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,12,1,64,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12 + d1 + d2, d3), memory_config: (12, 64, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,12,1,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 12 + d1 + d2, d3), memory_config: (1, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,132,132,192,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 17424 + d1 * 132 + d2, d3), memory_config: (545, 6, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,132,132,192,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 17424 + d1 * 132 + d2, d3), memory_config: (17424, 192, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,128,132,192,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16896 + d1 * 132 + d2, d3), memory_config: (16896, 192, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,128,132,192,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16896 + d1 * 132 + d2, d3), memory_config: (528, 6, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,132,132,384,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 17424 + d1 * 132 + d2, d3), memory_config: (545, 12, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,132,132,384,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 17424 + d1 * 132 + d2, d3), memory_config: (17424, 384, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,128,132,384,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16896 + d1 * 132 + d2, d3), memory_config: (16896, 384, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,128,132,384,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16896 + d1 * 132 + d2, d3), memory_config: (528, 12, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,13,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,13,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 13, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,13,128,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 13 + d1, d2), memory_config: (1, 4, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,13,128,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 13 + d1, d2), memory_config: (13, 128, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,13,96,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 * 13 + d1, d2), memory_config: (13, 96, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,13,96,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 13 + d1, d2), memory_config: (1, 3, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,13,128,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 13 + d1, d2), memory_config: (1, 4, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,13,128,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 13 + d1, d2), memory_config: (13, 128, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,13,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 * 13 + d1, d2), memory_config: (13, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,13,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 13 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,13,128,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 13 + d1, d2), memory_config: (1, 4, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,13,128,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 13 + d1, d2), memory_config: (13, 128, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,13,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 * 13 + d1, d2), memory_config: (13, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,13,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 13 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,1445,192,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 1445 + d1, d2), memory_config: (46, 6, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,1445,192,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 1445 + d1, d2), memory_config: (1445, 192, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,100,192,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 * 100 + d1, d2), memory_config: (100, 192, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,100,192,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 100 + d1, d2), memory_config: (4, 6, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,14,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 14, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,14,128,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 14 + d1, d2), memory_config: (1, 4, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,14,128,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 14 + d1, d2), memory_config: (14, 128, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,14,96,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 * 14 + d1, d2), memory_config: (14, 96, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,96,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 14 + d1, d2), memory_config: (1, 3, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,128,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 14 + d1, d2), memory_config: (1, 4, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,14,128,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 14 + d1, d2), memory_config: (14, 128, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,14,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 * 14 + d1, d2), memory_config: (14, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 14 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,128,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 14 + d1, d2), memory_config: (1, 4, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,14,128,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 14 + d1, d2), memory_config: (14, 128, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,14,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 * 14 + d1, d2), memory_config: (14, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 14 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,512,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 16, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,14,14,512,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 512, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,7,14,512,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 98 + d1 * 14 + d2, d3), memory_config: (98, 512, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,14,512,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 98 + d1 * 14 + d2, d3), memory_config: (4, 16, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,14,512,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 16, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,14,14,512,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 512, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,7,14,512,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 98 + d1 * 14 + d2, d3), memory_config: (98, 512, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,14,512,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 98 + d1 * 14 + d2, d3), memory_config: (4, 16, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,28,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 392 + d1 * 28 + d2, d3), memory_config: (13, 8, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,14,28,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 392 + d1 * 28 + d2, d3), memory_config: (392, 256, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,14,14,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,28,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 392 + d1 * 28 + d2, d3), memory_config: (13, 8, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,14,28,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 392 + d1 * 28 + d2, d3), memory_config: (392, 256, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,14,14,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (196, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,14,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 196 + d1 * 14 + d2, d3), memory_config: (7, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,2,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 14 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,14,2,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 14 + d1, d2), memory_config: (14, 2, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,14,1,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 * 14 + d1, d2), memory_config: (14, 1, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,1,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 14 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,14,2,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 14 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,14,2,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 14 + d1, d2), memory_config: (14, 2, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,14,1,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 * 14 + d1, d2), memory_config: (14, 1, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,1,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 14 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,15,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,15,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 15, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,15,128,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 15 + d1, d2), memory_config: (1, 4, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,15,128,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 15 + d1, d2), memory_config: (15, 128, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,15,96,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 * 15 + d1, d2), memory_config: (15, 96, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,15,96,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 15 + d1, d2), memory_config: (1, 3, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,15,128,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 15 + d1, d2), memory_config: (1, 4, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,15,128,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 15 + d1, d2), memory_config: (15, 128, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,15,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 * 15 + d1, d2), memory_config: (15, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,15,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 15 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,15,128,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 15 + d1, d2), memory_config: (1, 4, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,15,128,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 15 + d1, d2), memory_config: (15, 128, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,15,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 * 15 + d1, d2), memory_config: (15, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,15,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 15 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,16,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,16,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 16, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,16,24,1536,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 384 + d1 * 24 + d2, d3), memory_config: (12, 48, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,16,24,1536,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 384 + d1 * 24 + d2, d3), memory_config: (384, 1536, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,16,16,1536,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (256, 1536, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,16,16,1536,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (8, 48, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,16,32,768,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 512 + d1 * 32 + d2, d3), memory_config: (16, 24, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,16,32,768,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 512 + d1 * 32 + d2, d3), memory_config: (512, 768, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,16,16,768,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (256, 768, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,16,16,768,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (8, 24, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,16,32,768,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 512 + d1 * 32 + d2, d3), memory_config: (16, 24, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,16,32,768,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 512 + d1 * 32 + d2, d3), memory_config: (512, 768, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,16,16,768,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (256, 768, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,16,16,768,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 16 + d2, d3), memory_config: (8, 24, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,17,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,17,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 17, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,185,28,28,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5180 + d1 * 28 + d2, d3), memory_config: (162, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,185,28,28,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5180 + d1 * 28 + d2, d3), memory_config: (5180, 28, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,57,28,28,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1596 + d1 * 28 + d2, d3), memory_config: (1596, 28, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,57,28,28,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1596 + d1 * 28 + d2, d3), memory_config: (50, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,185,28,28,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5180 + d1 * 28 + d2, d3), memory_config: (162, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,185,28,28,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5180 + d1 * 28 + d2, d3), memory_config: (5180, 28, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,128,28,28,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3584 + d1 * 28 + d2, d3), memory_config: (3584, 28, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,128,28,28,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3584 + d1 * 28 + d2, d3), memory_config: (112, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,18,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,18,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 18, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,197,1024,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 197 + d1, d2), memory_config: (7, 32, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,197,1024,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 197 + d1, d2), memory_config: (197, 1024, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,196,1024,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 * 196 + d1, d2), memory_config: (196, 1024, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,196,1024,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 196 + d1, d2), memory_config: (7, 32, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,197,768,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 197 + d1, d2), memory_config: (7, 24, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,197,768,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 197 + d1, d2), memory_config: (197, 768, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,196,768,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 * 196 + d1, d2), memory_config: (196, 768, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,196,768,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 196 + d1, d2), memory_config: (7, 24, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,19,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,19,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 19, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,32,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16 + d1 * 16 + d2, d3), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,1,16,32,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16 + d1 * 16 + d2, d3), memory_config: (16, 32, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16 + d1 * 16 + d2, d3), memory_config: (16, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,16,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16 + d1 * 16 + d2, d3), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,1,16,32,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16 + d1 * 16 + d2, d3), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,1,16,32,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16 + d1 * 16 + d2, d3), memory_config: (16, 32, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16 + d1 * 16 + d2, d3), memory_config: (16, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,16,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16 + d1 * 16 + d2, d3), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,1,16,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16 + d1 * 16 + d2, d3), memory_config: (1, 2, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,1,16,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16 + d1 * 16 + d2, d3), memory_config: (16, 64, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,32,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16 + d1 * 16 + d2, d3), memory_config: (16, 32, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,32,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16 + d1 * 16 + d2, d3), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,1,16,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16 + d1 * 16 + d2, d3), memory_config: (1, 2, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,1,16,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16 + d1 * 16 + d2, d3), memory_config: (16, 64, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,32,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16 + d1 * 16 + d2, d3), memory_config: (16, 32, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,16,32,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 16 + d1 * 16 + d2, d3), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,1,32,f32]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,1,32,f32]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 32, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,f32]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,1,16,f32]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,32,f32]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,1,32,f32]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 32, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,16,f32]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,1,16,f32]>mapping_from: (d0, d1, d2), mapping_to: (d0 + d1, d2), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,4,768,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4 + d1 * 4 + d2, d3), memory_config: (1, 24, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,1,4,768,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4 + d1 * 4 + d2, d3), memory_config: (4, 768, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,4,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4 + d1 * 4 + d2, d3), memory_config: (4, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,4,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4 + d1 * 4 + d2, d3), memory_config: (1, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,1,4,768,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4 + d1 * 4 + d2, d3), memory_config: (1, 24, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,1,4,768,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4 + d1 * 4 + d2, d3), memory_config: (4, 768, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,4,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4 + d1 * 4 + d2, d3), memory_config: (4, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,4,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4 + d1 * 4 + d2, d3), memory_config: (1, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,1,4,768,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4 + d1 * 4 + d2, d3), memory_config: (1, 24, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,1,4,768,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4 + d1 * 4 + d2, d3), memory_config: (4, 768, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,4,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4 + d1 * 4 + d2, d3), memory_config: (4, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,4,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4 + d1 * 4 + d2, d3), memory_config: (1, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,1,7,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 7 + d1 * 7 + d2, d3), memory_config: (1, 2, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,1,7,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 7 + d1 * 7 + d2, d3), memory_config: (7, 64, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,7,32,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 7 + d1 * 7 + d2, d3), memory_config: (7, 32, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,7,32,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 7 + d1 * 7 + d2, d3), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,1,7,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 7 + d1 * 7 + d2, d3), memory_config: (1, 2, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,1,7,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 7 + d1 * 7 + d2, d3), memory_config: (7, 64, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,7,32,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 7 + d1 * 7 + d2, d3), memory_config: (7, 32, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,1,7,32,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 7 + d1 * 7 + d2, d3), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,20,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,20,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 20, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,21,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,21,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 21, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,22,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,22,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 22, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,23,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,23,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 23, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,24,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,24,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 24, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,24,24,1536,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 576 + d1 * 24 + d2, d3), memory_config: (18, 48, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,24,24,1536,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 576 + d1 * 24 + d2, d3), memory_config: (576, 1536, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,16,24,1536,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 384 + d1 * 24 + d2, d3), memory_config: (384, 1536, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,16,24,1536,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 384 + d1 * 24 + d2, d3), memory_config: (12, 48, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,24,32,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 768 + d1 * 32 + d2, d3), memory_config: (24, 4, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,24,32,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 768 + d1 * 32 + d2, d3), memory_config: (768, 128, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,24,32,64,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 768 + d1 * 32 + d2, d3), memory_config: (768, 64, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,24,32,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 768 + d1 * 32 + d2, d3), memory_config: (24, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,24,32,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 768 + d1 * 32 + d2, d3), memory_config: (24, 4, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,24,32,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 768 + d1 * 32 + d2, d3), memory_config: (768, 128, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,24,32,64,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 768 + d1 * 32 + d2, d3), memory_config: (768, 64, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,24,32,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 768 + d1 * 32 + d2, d3), memory_config: (24, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,256,10240,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 256 + d1, d2), memory_config: (8, 320, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,256,10240,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 256 + d1, d2), memory_config: (256, 10240, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,256,5120,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 * 256 + d1, d2), memory_config: (256, 5120, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,256,5120,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 256 + d1, d2), memory_config: (8, 160, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,256,10240,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 256 + d1, d2), memory_config: (8, 320, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,256,10240,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 256 + d1, d2), memory_config: (256, 10240, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,256,5120,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 * 256 + d1, d2), memory_config: (256, 5120, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,256,5120,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 256 + d1, d2), memory_config: (8, 160, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,256,256,192,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 65536 + d1 * 256 + d2, d3), memory_config: (2048, 6, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,256,256,192,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 65536 + d1 * 256 + d2, d3), memory_config: (65536, 192, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,128,256,192,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 32768 + d1 * 256 + d2, d3), memory_config: (32768, 192, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,128,256,192,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 32768 + d1 * 256 + d2, d3), memory_config: (1024, 6, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,256,256,192,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 65536 + d1 * 256 + d2, d3), memory_config: (2048, 6, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,256,256,192,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 65536 + d1 * 256 + d2, d3), memory_config: (65536, 192, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,128,256,192,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 32768 + d1 * 256 + d2, d3), memory_config: (32768, 192, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,128,256,192,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 32768 + d1 * 256 + d2, d3), memory_config: (1024, 6, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,256,264,192,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 67584 + d1 * 264 + d2, d3), memory_config: (2112, 6, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,256,264,192,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 67584 + d1 * 264 + d2, d3), memory_config: (67584, 192, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,256,256,192,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 65536 + d1 * 256 + d2, d3), memory_config: (65536, 192, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,256,256,192,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 65536 + d1 * 256 + d2, d3), memory_config: (2048, 6, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,256,2,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 256 + d1, d2), memory_config: (8, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,256,2,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 256 + d1, d2), memory_config: (256, 2, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,256,1,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 * 256 + d1, d2), memory_config: (256, 1, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,256,1,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 256 + d1, d2), memory_config: (8, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,256,2,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 256 + d1, d2), memory_config: (8, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,256,2,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 256 + d1, d2), memory_config: (256, 2, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,256,1,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 * 256 + d1, d2), memory_config: (256, 1, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,256,1,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 256 + d1, d2), memory_config: (8, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,25,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,25,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 25, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,25,2,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 25 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,25,2,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 25 + d1, d2), memory_config: (25, 2, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,25,1,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 * 25 + d1, d2), memory_config: (25, 1, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,25,1,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 25 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,25,2,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 25 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,25,2,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 25 + d1, d2), memory_config: (25, 2, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,25,1,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 * 25 + d1, d2), memory_config: (25, 1, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,25,1,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 25 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,264,264,192,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 69696 + d1 * 264 + d2, d3), memory_config: (2178, 6, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,264,264,192,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 69696 + d1 * 264 + d2, d3), memory_config: (69696, 192, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,256,264,192,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 67584 + d1 * 264 + d2, d3), memory_config: (67584, 192, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,256,264,192,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 67584 + d1 * 264 + d2, d3), memory_config: (2112, 6, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,26,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,26,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 26, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,27,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,27,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 27, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,28,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,28,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 28, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,28,13,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 364 + d1 * 13 + d2, d3), memory_config: (12, 4, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,28,13,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 364 + d1 * 13 + d2, d3), memory_config: (364, 128, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,28,13,64,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 364 + d1 * 13 + d2, d3), memory_config: (364, 64, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,13,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 364 + d1 * 13 + d2, d3), memory_config: (12, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,13,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 364 + d1 * 13 + d2, d3), memory_config: (12, 4, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,28,13,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 364 + d1 * 13 + d2, d3), memory_config: (364, 128, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,28,13,64,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 364 + d1 * 13 + d2, d3), memory_config: (364, 64, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,13,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 364 + d1 * 13 + d2, d3), memory_config: (12, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 8, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,28,28,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 256, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,14,28,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 392 + d1 * 28 + d2, d3), memory_config: (392, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,28,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 392 + d1 * 28 + d2, d3), memory_config: (13, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,28,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 8, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,28,28,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 256, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,14,28,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 392 + d1 * 28 + d2, d3), memory_config: (392, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,14,28,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 392 + d1 * 28 + d2, d3), memory_config: (13, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,56,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1568 + d1 * 56 + d2, d3), memory_config: (49, 4, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,28,56,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1568 + d1 * 56 + d2, d3), memory_config: (1568, 128, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,28,28,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,28,56,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1568 + d1 * 56 + d2, d3), memory_config: (49, 4, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,28,56,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1568 + d1 * 56 + d2, d3), memory_config: (1568, 128, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,28,28,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (784, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,28,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 784 + d1 * 28 + d2, d3), memory_config: (25, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,29,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,29,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 29, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,2,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,2,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 2, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,2,12,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 24 + d1 * 12 + d2, d3), memory_config: (1, 4, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,2,12,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 24 + d1 * 12 + d2, d3), memory_config: (24, 128, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,2,12,64,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 24 + d1 * 12 + d2, d3), memory_config: (24, 64, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,2,12,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 24 + d1 * 12 + d2, d3), memory_config: (1, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,2,12,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 24 + d1 * 12 + d2, d3), memory_config: (1, 4, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,2,12,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 24 + d1 * 12 + d2, d3), memory_config: (24, 128, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,2,12,64,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 24 + d1 * 12 + d2, d3), memory_config: (24, 64, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,2,12,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 24 + d1 * 12 + d2, d3), memory_config: (1, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,2,1,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 2 + d1 + d2, d3), memory_config: (1, 4, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,2,1,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 2 + d1 + d2, d3), memory_config: (2, 128, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,2,1,64,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 2 + d1 + d2, d3), memory_config: (2, 64, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,2,1,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 2 + d1 + d2, d3), memory_config: (1, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,2,1,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 2 + d1 + d2, d3), memory_config: (1, 4, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,2,1,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 2 + d1 + d2, d3), memory_config: (2, 128, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,2,1,64,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 2 + d1 + d2, d3), memory_config: (2, 64, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,2,1,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 2 + d1 + d2, d3), memory_config: (1, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,3072,10,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 3072 + d1, d2), memory_config: (96, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,10,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 3072 + d1, d2), memory_config: (3072, 10, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,7,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 * 3072 + d1, d2), memory_config: (3072, 7, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,3072,7,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 3072 + d1, d2), memory_config: (96, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,3072,11,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 3072 + d1, d2), memory_config: (96, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,11,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 3072 + d1, d2), memory_config: (3072, 11, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,8,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 * 3072 + d1, d2), memory_config: (3072, 8, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,3072,8,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 3072 + d1, d2), memory_config: (96, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,3072,12,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 3072 + d1, d2), memory_config: (96, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,12,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 3072 + d1, d2), memory_config: (3072, 12, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,9,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 * 3072 + d1, d2), memory_config: (3072, 9, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,3072,9,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 3072 + d1, d2), memory_config: (96, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,3072,13,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 3072 + d1, d2), memory_config: (96, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,13,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 3072 + d1, d2), memory_config: (3072, 13, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,10,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 * 3072 + d1, d2), memory_config: (3072, 10, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,3072,10,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 3072 + d1, d2), memory_config: (96, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,3072,14,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 3072 + d1, d2), memory_config: (96, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,14,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 3072 + d1, d2), memory_config: (3072, 14, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,11,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 * 3072 + d1, d2), memory_config: (3072, 11, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,3072,11,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 3072 + d1, d2), memory_config: (96, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,3072,15,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 3072 + d1, d2), memory_config: (96, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,15,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 3072 + d1, d2), memory_config: (3072, 15, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,12,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 * 3072 + d1, d2), memory_config: (3072, 12, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,3072,12,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 3072 + d1, d2), memory_config: (96, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,3072,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 3072 + d1, d2), memory_config: (96, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 3072 + d1, d2), memory_config: (3072, 16, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,13,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 * 3072 + d1, d2), memory_config: (3072, 13, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,3072,13,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 3072 + d1, d2), memory_config: (96, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,3072,17,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 3072 + d1, d2), memory_config: (96, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,17,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 3072 + d1, d2), memory_config: (3072, 17, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,14,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 * 3072 + d1, d2), memory_config: (3072, 14, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,3072,14,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 3072 + d1, d2), memory_config: (96, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,3072,18,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 3072 + d1, d2), memory_config: (96, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,18,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 3072 + d1, d2), memory_config: (3072, 18, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,15,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 * 3072 + d1, d2), memory_config: (3072, 15, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,3072,15,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 3072 + d1, d2), memory_config: (96, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,3072,9,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 3072 + d1, d2), memory_config: (96, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3072,9,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 3072 + d1, d2), memory_config: (3072, 9, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,6,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 * 3072 + d1, d2), memory_config: (3072, 6, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,3072,6,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 3072 + d1, d2), memory_config: (96, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,32,32,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (32, 4, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,32,32,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 128, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,32,32,64,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 64, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,32,32,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (32, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,32,32,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (32, 4, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,32,32,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 128, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,32,32,64,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 64, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,32,32,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (32, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,32,32,768,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (32, 24, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,32,32,768,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 768, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,16,32,768,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 512 + d1 * 32 + d2, d3), memory_config: (512, 768, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,16,32,768,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 512 + d1 * 32 + d2, d3), memory_config: (16, 24, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,32,32,768,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (32, 24, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,32,32,768,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 768, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,16,32,768,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 512 + d1 * 32 + d2, d3), memory_config: (512, 768, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,16,32,768,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 512 + d1 * 32 + d2, d3), memory_config: (16, 24, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,32,36,1536,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1152 + d1 * 36 + d2, d3), memory_config: (36, 48, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,32,36,1536,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1152 + d1 * 36 + d2, d3), memory_config: (1152, 1536, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,32,32,1536,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 1536, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,32,32,1536,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (32, 48, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,32,36,768,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1152 + d1 * 36 + d2, d3), memory_config: (36, 24, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,32,36,768,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1152 + d1 * 36 + d2, d3), memory_config: (1152, 768, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,32,32,768,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 768, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,32,32,768,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (32, 24, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,32,64,384,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 2048 + d1 * 64 + d2, d3), memory_config: (64, 12, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,32,64,384,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 2048 + d1 * 64 + d2, d3), memory_config: (2048, 384, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,32,32,384,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 384, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,32,32,384,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (32, 12, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,32,64,384,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 2048 + d1 * 64 + d2, d3), memory_config: (64, 12, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,32,64,384,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 2048 + d1 * 64 + d2, d3), memory_config: (2048, 384, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,32,32,384,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 384, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,32,32,384,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (32, 12, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,32,64,768,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 2048 + d1 * 64 + d2, d3), memory_config: (64, 24, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,32,64,768,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 2048 + d1 * 64 + d2, d3), memory_config: (2048, 768, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,32,32,768,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 768, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,32,32,768,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (32, 24, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,32,64,768,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 2048 + d1 * 64 + d2, d3), memory_config: (64, 24, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,32,64,768,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 2048 + d1 * 64 + d2, d3), memory_config: (2048, 768, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,32,32,768,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (1024, 768, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,32,32,768,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1024 + d1 * 32 + d2, d3), memory_config: (32, 24, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,36,36,1536,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1296 + d1 * 36 + d2, d3), memory_config: (41, 48, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,36,36,1536,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1296 + d1 * 36 + d2, d3), memory_config: (1296, 1536, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,32,36,1536,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1152 + d1 * 36 + d2, d3), memory_config: (1152, 1536, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,32,36,1536,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1152 + d1 * 36 + d2, d3), memory_config: (36, 48, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,36,36,768,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1296 + d1 * 36 + d2, d3), memory_config: (41, 24, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,36,36,768,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1296 + d1 * 36 + d2, d3), memory_config: (1296, 768, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,32,36,768,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1152 + d1 * 36 + d2, d3), memory_config: (1152, 768, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,32,36,768,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1152 + d1 * 36 + d2, d3), memory_config: (36, 24, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 3, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,3,16,16,85,bf16]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 768 + d1 * 256 + d2 * 16 + d3, d4), memory_config: (24, 3, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3,16,16,85,bf16]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 768 + d1 * 256 + d2 * 16 + d3, d4), memory_config: (768, 85, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,3,16,16,2,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 768 + d1 * 256 + d2 * 16 + d3, d4), memory_config: (768, 2, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,3,16,16,2,bf16]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 768 + d1 * 256 + d2 * 16 + d3, d4), memory_config: (24, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,3,16,16,85,bf16]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 768 + d1 * 256 + d2 * 16 + d3, d4), memory_config: (24, 3, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3,16,16,85,bf16]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 768 + d1 * 256 + d2 * 16 + d3, d4), memory_config: (768, 85, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,3,16,16,2,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 768 + d1 * 256 + d2 * 16 + d3, d4), memory_config: (768, 2, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,3,16,16,2,bf16]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 768 + d1 * 256 + d2 * 16 + d3, d4), memory_config: (24, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,3,16,16,85,bf16]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 768 + d1 * 256 + d2 * 16 + d3, d4), memory_config: (24, 3, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3,16,16,85,bf16]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 768 + d1 * 256 + d2 * 16 + d3, d4), memory_config: (768, 85, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,3,16,16,81,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 768 + d1 * 256 + d2 * 16 + d3, d4), memory_config: (768, 81, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,3,16,16,81,bf16]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 768 + d1 * 256 + d2 * 16 + d3, d4), memory_config: (24, 3, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,3,32,32,85,bf16]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 3072 + d1 * 1024 + d2 * 32 + d3, d4), memory_config: (96, 3, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3,32,32,85,bf16]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 3072 + d1 * 1024 + d2 * 32 + d3, d4), memory_config: (3072, 85, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,3,32,32,2,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 3072 + d1 * 1024 + d2 * 32 + d3, d4), memory_config: (3072, 2, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,3,32,32,2,bf16]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 3072 + d1 * 1024 + d2 * 32 + d3, d4), memory_config: (96, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,3,32,32,85,bf16]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 3072 + d1 * 1024 + d2 * 32 + d3, d4), memory_config: (96, 3, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3,32,32,85,bf16]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 3072 + d1 * 1024 + d2 * 32 + d3, d4), memory_config: (3072, 85, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,3,32,32,2,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 3072 + d1 * 1024 + d2 * 32 + d3, d4), memory_config: (3072, 2, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,3,32,32,2,bf16]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 3072 + d1 * 1024 + d2 * 32 + d3, d4), memory_config: (96, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,3,32,32,85,bf16]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 3072 + d1 * 1024 + d2 * 32 + d3, d4), memory_config: (96, 3, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3,32,32,85,bf16]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 3072 + d1 * 1024 + d2 * 32 + d3, d4), memory_config: (3072, 85, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,3,32,32,81,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 3072 + d1 * 1024 + d2 * 32 + d3, d4), memory_config: (3072, 81, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,3,32,32,81,bf16]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 3072 + d1 * 1024 + d2 * 32 + d3, d4), memory_config: (96, 3, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,3,64,64,85,bf16]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 12288 + d1 * 4096 + d2 * 64 + d3, d4), memory_config: (384, 3, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3,64,64,85,bf16]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 12288 + d1 * 4096 + d2 * 64 + d3, d4), memory_config: (12288, 85, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,3,64,64,2,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 12288 + d1 * 4096 + d2 * 64 + d3, d4), memory_config: (12288, 2, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,3,64,64,2,bf16]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 12288 + d1 * 4096 + d2 * 64 + d3, d4), memory_config: (384, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,3,64,64,85,bf16]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 12288 + d1 * 4096 + d2 * 64 + d3, d4), memory_config: (384, 3, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3,64,64,85,bf16]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 12288 + d1 * 4096 + d2 * 64 + d3, d4), memory_config: (12288, 85, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,3,64,64,2,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 12288 + d1 * 4096 + d2 * 64 + d3, d4), memory_config: (12288, 2, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,3,64,64,2,bf16]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 12288 + d1 * 4096 + d2 * 64 + d3, d4), memory_config: (384, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,3,64,64,85,bf16]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 12288 + d1 * 4096 + d2 * 64 + d3, d4), memory_config: (384, 3, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,3,64,64,85,bf16]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 12288 + d1 * 4096 + d2 * 64 + d3, d4), memory_config: (12288, 85, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,3,64,64,81,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 12288 + d1 * 4096 + d2 * 64 + d3, d4), memory_config: (12288, 81, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,3,64,64,81,bf16]>mapping_from: (d0, d1, d2, d3, d4), mapping_to: (d0 * 12288 + d1 * 4096 + d2 * 64 + d3, d4), memory_config: (384, 3, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,4096,2560,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 4096 + d1, d2), memory_config: (128, 80, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,4096,2560,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 4096 + d1, d2), memory_config: (4096, 2560, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,4096,1280,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 * 4096 + d1, d2), memory_config: (4096, 1280, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,4096,1280,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 4096 + d1, d2), memory_config: (128, 40, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,4096,2560,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 4096 + d1, d2), memory_config: (128, 80, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,4096,2560,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 4096 + d1, d2), memory_config: (4096, 2560, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,4096,1280,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 * 4096 + d1, d2), memory_config: (4096, 1280, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,4096,1280,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 4096 + d1, d2), memory_config: (128, 40, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,46,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 2, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,46,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 46, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,47,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 2, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,47,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 47, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,48,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 2, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,48,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 48, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,49,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 2, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,49,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 49, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,4,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,4,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 4, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,4,13,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 52 + d1 * 13 + d2, d3), memory_config: (2, 4, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,4,13,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 52 + d1 * 13 + d2, d3), memory_config: (52, 128, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,4,13,64,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 52 + d1 * 13 + d2, d3), memory_config: (52, 64, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,4,13,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 52 + d1 * 13 + d2, d3), memory_config: (2, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,4,13,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 52 + d1 * 13 + d2, d3), memory_config: (2, 4, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,4,13,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 52 + d1 * 13 + d2, d3), memory_config: (52, 128, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,4,13,64,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 52 + d1 * 13 + d2, d3), memory_config: (52, 64, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,4,13,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 52 + d1 * 13 + d2, d3), memory_config: (2, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,50,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 2, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,50,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 50, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,51,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 2, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,51,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 51, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,52,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 2, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,52,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 52, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,53,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 2, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,53,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 53, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,54,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 2, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,54,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 54, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,55,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 2, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,55,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 55, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,56,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 2, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,56,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 56, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,56,56,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (98, 4, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,56,56,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 128, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,28,56,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1568 + d1 * 56 + d2, d3), memory_config: (1568, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,56,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1568 + d1 * 56 + d2, d3), memory_config: (49, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,56,56,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (98, 4, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,56,56,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 3136 + d1 * 56 + d2, d3), memory_config: (3136, 128, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,28,56,128,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1568 + d1 * 56 + d2, d3), memory_config: (1568, 128, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,28,56,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 1568 + d1 * 56 + d2, d3), memory_config: (49, 4, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,57,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 2, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,57,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 57, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,58,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 2, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,58,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 58, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,59,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 2, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,59,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 59, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,5,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,5,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 5, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,5,16,32,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 80 + d1 * 16 + d2, d3), memory_config: (3, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,5,16,32,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 80 + d1 * 16 + d2, d3), memory_config: (80, 32, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,5,16,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 80 + d1 * 16 + d2, d3), memory_config: (80, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,5,16,16,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 80 + d1 * 16 + d2, d3), memory_config: (3, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,5,16,32,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 80 + d1 * 16 + d2, d3), memory_config: (3, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,5,16,32,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 80 + d1 * 16 + d2, d3), memory_config: (80, 32, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,5,16,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 80 + d1 * 16 + d2, d3), memory_config: (80, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,5,16,16,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 80 + d1 * 16 + d2, d3), memory_config: (3, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,5,16,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 80 + d1 * 16 + d2, d3), memory_config: (3, 2, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,5,16,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 80 + d1 * 16 + d2, d3), memory_config: (80, 64, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,5,16,32,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 80 + d1 * 16 + d2, d3), memory_config: (80, 32, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,5,16,32,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 80 + d1 * 16 + d2, d3), memory_config: (3, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,5,16,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 80 + d1 * 16 + d2, d3), memory_config: (3, 2, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,5,16,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 80 + d1 * 16 + d2, d3), memory_config: (80, 64, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,5,16,32,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 80 + d1 * 16 + d2, d3), memory_config: (80, 32, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,5,16,32,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 80 + d1 * 16 + d2, d3), memory_config: (3, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,5,32,f32]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 5 + d1, d2), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,5,32,f32]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 5 + d1, d2), memory_config: (5, 32, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,5,16,f32]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 5 + d1, d2), memory_config: (5, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,5,16,f32]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 5 + d1, d2), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,5,32,f32]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 5 + d1, d2), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,5,32,f32]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 5 + d1, d2), memory_config: (5, 32, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,5,16,f32]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 5 + d1, d2), memory_config: (5, 16, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,5,16,f32]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 5 + d1, d2), memory_config: (1, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,5,4,768,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 20 + d1 * 4 + d2, d3), memory_config: (1, 24, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,5,4,768,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 20 + d1 * 4 + d2, d3), memory_config: (20, 768, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,5,4,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 20 + d1 * 4 + d2, d3), memory_config: (20, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,5,4,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 20 + d1 * 4 + d2, d3), memory_config: (1, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,5,4,768,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 20 + d1 * 4 + d2, d3), memory_config: (1, 24, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,5,4,768,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 20 + d1 * 4 + d2, d3), memory_config: (20, 768, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,5,4,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 20 + d1 * 4 + d2, d3), memory_config: (20, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,5,4,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 20 + d1 * 4 + d2, d3), memory_config: (1, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,5,4,768,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 20 + d1 * 4 + d2, d3), memory_config: (1, 24, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,5,4,768,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 20 + d1 * 4 + d2, d3), memory_config: (20, 768, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,5,4,256,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 20 + d1 * 4 + d2, d3), memory_config: (20, 256, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,5,4,256,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 20 + d1 * 4 + d2, d3), memory_config: (1, 8, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,60,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 2, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,60,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 60, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,6144,10,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 6144 + d1, d2), memory_config: (192, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,6144,10,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 6144 + d1, d2), memory_config: (6144, 10, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,10,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 * 3072 + d1, d2), memory_config: (3072, 10, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,3072,10,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 3072 + d1, d2), memory_config: (96, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,6144,10,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 6144 + d1, d2), memory_config: (192, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,6144,10,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 6144 + d1, d2), memory_config: (6144, 10, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,10,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 * 3072 + d1, d2), memory_config: (3072, 10, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,3072,10,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 3072 + d1, d2), memory_config: (96, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,6144,11,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 6144 + d1, d2), memory_config: (192, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,6144,11,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 6144 + d1, d2), memory_config: (6144, 11, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,11,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 * 3072 + d1, d2), memory_config: (3072, 11, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,3072,11,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 3072 + d1, d2), memory_config: (96, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,6144,11,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 6144 + d1, d2), memory_config: (192, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,6144,11,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 6144 + d1, d2), memory_config: (6144, 11, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,11,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 * 3072 + d1, d2), memory_config: (3072, 11, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,3072,11,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 3072 + d1, d2), memory_config: (96, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,6144,12,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 6144 + d1, d2), memory_config: (192, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,6144,12,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 6144 + d1, d2), memory_config: (6144, 12, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,12,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 * 3072 + d1, d2), memory_config: (3072, 12, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,3072,12,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 3072 + d1, d2), memory_config: (96, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,6144,12,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 6144 + d1, d2), memory_config: (192, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,6144,12,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 6144 + d1, d2), memory_config: (6144, 12, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,12,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 * 3072 + d1, d2), memory_config: (3072, 12, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,3072,12,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 3072 + d1, d2), memory_config: (96, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,6144,13,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 6144 + d1, d2), memory_config: (192, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,6144,13,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 6144 + d1, d2), memory_config: (6144, 13, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,13,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 * 3072 + d1, d2), memory_config: (3072, 13, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,3072,13,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 3072 + d1, d2), memory_config: (96, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,6144,13,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 6144 + d1, d2), memory_config: (192, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,6144,13,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 6144 + d1, d2), memory_config: (6144, 13, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,13,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 * 3072 + d1, d2), memory_config: (3072, 13, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,3072,13,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 3072 + d1, d2), memory_config: (96, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,6144,14,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 6144 + d1, d2), memory_config: (192, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,6144,14,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 6144 + d1, d2), memory_config: (6144, 14, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,14,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 * 3072 + d1, d2), memory_config: (3072, 14, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,3072,14,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 3072 + d1, d2), memory_config: (96, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,6144,14,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 6144 + d1, d2), memory_config: (192, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,6144,14,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 6144 + d1, d2), memory_config: (6144, 14, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,14,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 * 3072 + d1, d2), memory_config: (3072, 14, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,3072,14,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 3072 + d1, d2), memory_config: (96, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,6144,15,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 6144 + d1, d2), memory_config: (192, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,6144,15,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 6144 + d1, d2), memory_config: (6144, 15, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,15,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 * 3072 + d1, d2), memory_config: (3072, 15, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,3072,15,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 3072 + d1, d2), memory_config: (96, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,6144,15,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 6144 + d1, d2), memory_config: (192, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,6144,15,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 6144 + d1, d2), memory_config: (6144, 15, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,15,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 * 3072 + d1, d2), memory_config: (3072, 15, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,3072,15,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 3072 + d1, d2), memory_config: (96, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,6144,6,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 6144 + d1, d2), memory_config: (192, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,6144,6,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 6144 + d1, d2), memory_config: (6144, 6, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,6,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 * 3072 + d1, d2), memory_config: (3072, 6, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,3072,6,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 3072 + d1, d2), memory_config: (96, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,6144,6,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 6144 + d1, d2), memory_config: (192, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,6144,6,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 6144 + d1, d2), memory_config: (6144, 6, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,6,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 * 3072 + d1, d2), memory_config: (3072, 6, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,3072,6,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 3072 + d1, d2), memory_config: (96, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,6144,7,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 6144 + d1, d2), memory_config: (192, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,6144,7,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 6144 + d1, d2), memory_config: (6144, 7, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,7,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 * 3072 + d1, d2), memory_config: (3072, 7, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,3072,7,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 3072 + d1, d2), memory_config: (96, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,6144,7,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 6144 + d1, d2), memory_config: (192, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,6144,7,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 6144 + d1, d2), memory_config: (6144, 7, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,7,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 * 3072 + d1, d2), memory_config: (3072, 7, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,3072,7,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 3072 + d1, d2), memory_config: (96, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,6144,8,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 6144 + d1, d2), memory_config: (192, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,6144,8,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 6144 + d1, d2), memory_config: (6144, 8, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,8,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 * 3072 + d1, d2), memory_config: (3072, 8, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,3072,8,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 3072 + d1, d2), memory_config: (96, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,6144,8,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 6144 + d1, d2), memory_config: (192, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,6144,8,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 6144 + d1, d2), memory_config: (6144, 8, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,8,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 * 3072 + d1, d2), memory_config: (3072, 8, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,3072,8,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 3072 + d1, d2), memory_config: (96, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,6144,9,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 6144 + d1, d2), memory_config: (192, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,6144,9,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 6144 + d1, d2), memory_config: (6144, 9, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,9,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 * 3072 + d1, d2), memory_config: (3072, 9, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,3072,9,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 3072 + d1, d2), memory_config: (96, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,6144,9,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 6144 + d1, d2), memory_config: (192, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,6144,9,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 6144 + d1, d2), memory_config: (6144, 9, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,3072,9,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 * 3072 + d1, d2), memory_config: (3072, 9, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,3072,9,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 3072 + d1, d2), memory_config: (96, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,61,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 2, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,61,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 61, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,62,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 2, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,62,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 62, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,63,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 2, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,63,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 63, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,64,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 2, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,64,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 64, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,64,10240,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 64 + d1, d2), memory_config: (2, 320, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,64,10240,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 64 + d1, d2), memory_config: (64, 10240, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,64,5120,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 * 64 + d1, d2), memory_config: (64, 5120, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,64,5120,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 64 + d1, d2), memory_config: (2, 160, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,64,10240,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 64 + d1, d2), memory_config: (2, 320, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,64,10240,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 64 + d1, d2), memory_config: (64, 10240, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,64,5120,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 * 64 + d1, d2), memory_config: (64, 5120, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,64,5120,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 64 + d1, d2), memory_config: (2, 160, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,64,128,192,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 8192 + d1 * 128 + d2, d3), memory_config: (256, 6, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,64,128,192,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 8192 + d1 * 128 + d2, d3), memory_config: (8192, 192, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,64,64,192,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (4096, 192, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,64,64,192,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (128, 6, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,64,128,192,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 8192 + d1 * 128 + d2, d3), memory_config: (256, 6, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,64,128,192,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 8192 + d1 * 128 + d2, d3), memory_config: (8192, 192, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,64,64,192,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (4096, 192, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,64,64,192,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (128, 6, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,64,128,384,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 8192 + d1 * 128 + d2, d3), memory_config: (256, 12, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,64,128,384,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 8192 + d1 * 128 + d2, d3), memory_config: (8192, 384, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,64,64,384,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (4096, 384, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,64,64,384,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (128, 12, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,64,128,384,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 8192 + d1 * 128 + d2, d3), memory_config: (256, 12, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,64,128,384,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 8192 + d1 * 128 + d2, d3), memory_config: (8192, 384, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,64,64,384,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (4096, 384, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,64,64,384,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (128, 12, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,64,64,384,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (128, 12, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,64,64,384,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (4096, 384, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,32,64,384,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 2048 + d1 * 64 + d2, d3), memory_config: (2048, 384, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,32,64,384,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 2048 + d1 * 64 + d2, d3), memory_config: (64, 12, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,64,64,384,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (128, 12, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,64,64,384,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (4096, 384, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,32,64,384,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 2048 + d1 * 64 + d2, d3), memory_config: (2048, 384, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,32,64,384,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 2048 + d1 * 64 + d2, d3), memory_config: (64, 12, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,64,64,768,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (128, 24, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,64,64,768,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (4096, 768, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,32,64,768,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 2048 + d1 * 64 + d2, d3), memory_config: (2048, 768, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,32,64,768,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 2048 + d1 * 64 + d2, d3), memory_config: (64, 24, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,64,64,768,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (128, 24, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,64,64,768,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (4096, 768, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,32,64,768,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 2048 + d1 * 64 + d2, d3), memory_config: (2048, 768, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,32,64,768,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 2048 + d1 * 64 + d2, d3), memory_config: (64, 24, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,64,72,384,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4608 + d1 * 72 + d2, d3), memory_config: (144, 12, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,64,72,384,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4608 + d1 * 72 + d2, d3), memory_config: (4608, 384, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,64,64,384,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (4096, 384, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,64,64,384,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (128, 12, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,64,72,768,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4608 + d1 * 72 + d2, d3), memory_config: (144, 24, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,64,72,768,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4608 + d1 * 72 + d2, d3), memory_config: (4608, 768, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,64,64,768,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (4096, 768, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,64,64,768,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4096 + d1 * 64 + d2, d3), memory_config: (128, 24, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,65,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 3, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,65,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 65, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,66,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 3, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,66,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 66, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,67,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 3, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,67,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 67, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,68,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 3, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,68,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 68, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,69,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 3, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,69,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 69, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,6,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,6,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 6, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,6,128,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 6 + d1, d2), memory_config: (1, 4, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,6,128,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 6 + d1, d2), memory_config: (6, 128, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,6,96,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 * 6 + d1, d2), memory_config: (6, 96, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,6,96,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 6 + d1, d2), memory_config: (1, 3, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,6,128,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 6 + d1, d2), memory_config: (1, 4, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,6,128,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 6 + d1, d2), memory_config: (6, 128, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,6,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 * 6 + d1, d2), memory_config: (6, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,6,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 6 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,6,128,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 6 + d1, d2), memory_config: (1, 4, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,6,128,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 6 + d1, d2), memory_config: (6, 128, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,6,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 * 6 + d1, d2), memory_config: (6, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,6,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 6 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,70,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 3, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,70,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 70, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,71,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 3, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,71,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 71, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,71,7,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 497 + d1 * 7 + d2, d3), memory_config: (16, 2, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,71,7,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 497 + d1 * 7 + d2, d3), memory_config: (497, 64, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,71,7,32,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 497 + d1 * 7 + d2, d3), memory_config: (497, 32, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,71,7,32,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 497 + d1 * 7 + d2, d3), memory_config: (16, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,71,7,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 497 + d1 * 7 + d2, d3), memory_config: (16, 2, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,71,7,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 497 + d1 * 7 + d2, d3), memory_config: (497, 64, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,71,7,32,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 497 + d1 * 7 + d2, d3), memory_config: (497, 32, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,71,7,32,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 497 + d1 * 7 + d2, d3), memory_config: (16, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,72,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 3, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,72,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 72, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,72,72,384,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5184 + d1 * 72 + d2, d3), memory_config: (162, 12, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,72,72,384,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5184 + d1 * 72 + d2, d3), memory_config: (5184, 384, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,64,72,384,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4608 + d1 * 72 + d2, d3), memory_config: (4608, 384, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,64,72,384,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4608 + d1 * 72 + d2, d3), memory_config: (144, 12, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,72,72,768,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5184 + d1 * 72 + d2, d3), memory_config: (162, 24, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,72,72,768,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 5184 + d1 * 72 + d2, d3), memory_config: (5184, 768, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[1,64,72,768,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4608 + d1 * 72 + d2, d3), memory_config: (4608, 768, 'f32', 'system_memory')layout: #ttnn.layouttensor<[1,64,72,768,f32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 4608 + d1 * 72 + d2, d3), memory_config: (144, 24, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,73,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 3, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,73,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 73, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,74,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 3, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,74,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 74, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,75,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 3, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,75,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 75, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,76,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 3, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,76,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 76, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,77,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 3, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,77,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 77, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,78,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 3, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,78,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 78, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,79,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 3, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,79,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 79, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,7,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,7,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 7, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,7,128,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 7 + d1, d2), memory_config: (1, 4, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,7,128,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 7 + d1, d2), memory_config: (7, 128, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,7,96,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 * 7 + d1, d2), memory_config: (7, 96, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,96,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 7 + d1, d2), memory_config: (1, 3, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,128,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 7 + d1, d2), memory_config: (1, 4, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,7,128,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 7 + d1, d2), memory_config: (7, 128, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,7,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 * 7 + d1, d2), memory_config: (7, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 7 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,128,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 7 + d1, d2), memory_config: (1, 4, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,7,128,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 7 + d1, d2), memory_config: (7, 128, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,7,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 * 7 + d1, d2), memory_config: (7, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 7 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,14,512,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 98 + d1 * 14 + d2, d3), memory_config: (4, 16, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,7,14,512,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 98 + d1 * 14 + d2, d3), memory_config: (98, 512, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,7,7,512,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 512, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,512,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 16, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,14,512,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 98 + d1 * 14 + d2, d3), memory_config: (4, 16, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,7,14,512,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 98 + d1 * 14 + d2, d3), memory_config: (98, 512, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,7,7,512,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (49, 512, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,7,512,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 49 + d1 * 7 + d2, d3), memory_config: (2, 16, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,2304,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 7 + d1, d2), memory_config: (1, 72, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,7,2304,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 7 + d1, d2), memory_config: (7, 2304, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,7,768,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 * 7 + d1, d2), memory_config: (7, 768, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,768,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 7 + d1, d2), memory_config: (1, 24, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,2304,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 7 + d1, d2), memory_config: (1, 72, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,7,2304,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 7 + d1, d2), memory_config: (7, 2304, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,7,768,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 * 7 + d1, d2), memory_config: (7, 768, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,768,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 7 + d1, d2), memory_config: (1, 24, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,2304,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 7 + d1, d2), memory_config: (1, 72, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,7,2304,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 7 + d1, d2), memory_config: (7, 2304, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,7,768,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 * 7 + d1, d2), memory_config: (7, 768, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,768,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 7 + d1, d2), memory_config: (1, 24, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,7,73,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 511 + d1 * 73 + d2, d3), memory_config: (16, 2, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,7,73,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 511 + d1 * 73 + d2, d3), memory_config: (511, 64, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,7,71,64,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 497 + d1 * 71 + d2, d3), memory_config: (497, 64, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,7,71,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 497 + d1 * 71 + d2, d3), memory_config: (16, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,80,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 3, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,80,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 80, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,81,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 3, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,81,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 81, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,82,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 3, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,82,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 82, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,83,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 3, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,83,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 83, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,84,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 3, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,84,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 84, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,85,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 3, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,85,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 85, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,86,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 3, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,86,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 86, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,87,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 3, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,87,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 87, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,88,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 3, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,88,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 88, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,89,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 3, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,89,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 89, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,8,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,8,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 8, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,8,128,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 8 + d1, d2), memory_config: (1, 4, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,8,128,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 8 + d1, d2), memory_config: (8, 128, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,8,96,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 * 8 + d1, d2), memory_config: (8, 96, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,8,96,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 8 + d1, d2), memory_config: (1, 3, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,8,128,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 8 + d1, d2), memory_config: (1, 4, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,8,128,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 8 + d1, d2), memory_config: (8, 128, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,8,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 * 8 + d1, d2), memory_config: (8, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,8,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 8 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,8,128,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 8 + d1, d2), memory_config: (1, 4, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,8,128,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 8 + d1, d2), memory_config: (8, 128, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,8,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 * 8 + d1, d2), memory_config: (8, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,8,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 8 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,8,32,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 32 + d2, d3), memory_config: (8, 4, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,8,32,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 32 + d2, d3), memory_config: (256, 128, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,8,32,64,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 32 + d2, d3), memory_config: (256, 64, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,8,32,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 32 + d2, d3), memory_config: (8, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,8,32,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 32 + d2, d3), memory_config: (8, 4, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,8,32,128,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 32 + d2, d3), memory_config: (256, 128, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,8,32,64,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 32 + d2, d3), memory_config: (256, 64, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,8,32,64,bf16]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 * 256 + d1 * 32 + d2, d3), memory_config: (8, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,90,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 3, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,90,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 90, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,91,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 3, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,91,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 91, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,92,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 3, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,92,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 92, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,93,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 3, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,93,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 93, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,94,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 3, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,94,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 94, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,95,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 3, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,95,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 95, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,96,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 3, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,96,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 96, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,97,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 4, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,97,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 97, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,98,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 4, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,98,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 98, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,99,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 4, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,99,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 99, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,9,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,9,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 9, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,9,128,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 9 + d1, d2), memory_config: (1, 4, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,9,128,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 9 + d1, d2), memory_config: (9, 128, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,9,96,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 * 9 + d1, d2), memory_config: (9, 96, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,9,96,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 9 + d1, d2), memory_config: (1, 3, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,9,128,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 9 + d1, d2), memory_config: (1, 4, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,9,128,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 9 + d1, d2), memory_config: (9, 128, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,9,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 * 9 + d1, d2), memory_config: (9, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,9,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 9 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[1,9,128,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 9 + d1, d2), memory_config: (1, 4, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[1,9,128,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 9 + d1, d2), memory_config: (9, 128, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[1,9,16,bf16]>
!tt.device<#device>
mapping_from: (d0, d1, d2), mapping_to: (d0 * 9 + d1, d2), memory_config: (9, 16, 'bf16', 'dram')layout: #ttnn.layouttensor<[1,9,16,bf16]>mapping_from: (d0, d1, d2), mapping_to: (d0 * 9 + d1, d2), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[21,28,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[21,28,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (21, 28, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[21,3,bf16]>
!tt.device<#device>
mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (21, 3, 'bf16', 'dram')layout: #ttnn.layouttensor<[21,3,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[21,28,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[21,28,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (21, 28, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[21,4,bf16]>
!tt.device<#device>
mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (21, 4, 'bf16', 'dram')layout: #ttnn.layouttensor<[21,4,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[21,28,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[21,28,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (21, 28, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[21,21,bf16]>
!tt.device<#device>
mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (21, 21, 'bf16', 'dram')layout: #ttnn.layouttensor<[21,21,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[28,28,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[28,28,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (28, 28, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[3,28,bf16]>
!tt.device<#device>
mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (3, 28, 'bf16', 'dram')layout: #ttnn.layouttensor<[3,28,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[28,28,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[28,28,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (28, 28, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[4,28,bf16]>
!tt.device<#device>
mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (4, 28, 'bf16', 'dram')layout: #ttnn.layouttensor<[4,28,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[28,28,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[28,28,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (28, 28, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[21,28,bf16]>
!tt.device<#device>
mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (21, 28, 'bf16', 'dram')layout: #ttnn.layouttensor<[21,28,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[3234,4,f32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (102, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[3234,4,f32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (3234, 4, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[3234,2,f32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (3234, 2, 'f32', 'system_memory')layout: #ttnn.layouttensor<[3234,2,f32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (102, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[3234,4,f32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (102, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[3234,4,f32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (3234, 4, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[3234,1,f32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (3234, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[3234,1,f32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (102, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[3234,4,f32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (102, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[3234,4,f32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (3234, 4, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[3234,2,f32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (3234, 2, 'f32', 'system_memory')layout: #ttnn.layouttensor<[3234,2,f32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (102, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[3234,4,f32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (102, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[3234,4,f32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (3234, 4, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[3234,1,f32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (3234, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[3234,1,f32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (102, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[3234,4,f32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (102, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[3234,4,f32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (3234, 4, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[3234,1,f32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (3234, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[3234,1,f32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (102, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[3234,4,f32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (102, 1, 'tile<32x32, f32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[3234,4,f32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (3234, 4, 'f32', 'system_memory')nannan
ttnn.to_layouttensor<[3234,1,f32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (3234, 1, 'f32', 'system_memory')layout: #ttnn.layouttensor<[3234,1,f32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (102, 1, 'tile<32x32, f32>', 'system_memory')nannan
ttnn.to_layouttensor<[3,14,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[3,14,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (3, 14, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[3,3,bf16]>
!tt.device<#device>
mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (3, 3, 'bf16', 'dram')layout: #ttnn.layouttensor<[3,3,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[3,14,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[3,14,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (3, 14, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[3,4,bf16]>
!tt.device<#device>
mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (3, 4, 'bf16', 'dram')layout: #ttnn.layouttensor<[3,4,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[3,14,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[3,14,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (3, 14, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[3,7,bf16]>
!tt.device<#device>
mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (3, 7, 'bf16', 'dram')layout: #ttnn.layouttensor<[3,7,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[3,28,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[3,28,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (3, 28, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[3,3,bf16]>
!tt.device<#device>
mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (3, 3, 'bf16', 'dram')layout: #ttnn.layouttensor<[3,3,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[3,28,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[3,28,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (3, 28, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[3,4,bf16]>
!tt.device<#device>
mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (3, 4, 'bf16', 'dram')layout: #ttnn.layouttensor<[3,4,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[3,28,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[3,28,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (3, 28, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[3,21,bf16]>
!tt.device<#device>
mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (3, 21, 'bf16', 'dram')layout: #ttnn.layouttensor<[3,21,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[3,56,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 2, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[3,56,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (3, 56, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[3,3,bf16]>
!tt.device<#device>
mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (3, 3, 'bf16', 'dram')layout: #ttnn.layouttensor<[3,3,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[3,56,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 2, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[3,56,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (3, 56, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[3,4,bf16]>
!tt.device<#device>
mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (3, 4, 'bf16', 'dram')layout: #ttnn.layouttensor<[3,4,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[3,56,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 2, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[3,56,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (3, 56, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[3,49,bf16]>
!tt.device<#device>
mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (3, 49, 'bf16', 'dram')layout: #ttnn.layouttensor<[3,49,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[45,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 2, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[45,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 45, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[49,56,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (2, 2, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[49,56,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (49, 56, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[49,3,bf16]>
!tt.device<#device>
mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (49, 3, 'bf16', 'dram')layout: #ttnn.layouttensor<[49,3,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (2, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[49,56,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (2, 2, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[49,56,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (49, 56, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[49,4,bf16]>
!tt.device<#device>
mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (49, 4, 'bf16', 'dram')layout: #ttnn.layouttensor<[49,4,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (2, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[49,56,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (2, 2, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[49,56,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (49, 56, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[49,49,bf16]>
!tt.device<#device>
mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (49, 49, 'bf16', 'dram')layout: #ttnn.layouttensor<[49,49,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (2, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[4,14,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[4,14,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (4, 14, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[4,3,bf16]>
!tt.device<#device>
mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (4, 3, 'bf16', 'dram')layout: #ttnn.layouttensor<[4,3,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[4,14,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[4,14,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (4, 14, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[4,4,bf16]>
!tt.device<#device>
mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (4, 4, 'bf16', 'dram')layout: #ttnn.layouttensor<[4,4,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[4,14,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[4,14,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (4, 14, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[4,7,bf16]>
!tt.device<#device>
mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (4, 7, 'bf16', 'dram')layout: #ttnn.layouttensor<[4,7,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[4,28,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[4,28,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (4, 28, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[4,3,bf16]>
!tt.device<#device>
mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (4, 3, 'bf16', 'dram')layout: #ttnn.layouttensor<[4,3,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[4,28,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[4,28,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (4, 28, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[4,4,bf16]>
!tt.device<#device>
mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (4, 4, 'bf16', 'dram')layout: #ttnn.layouttensor<[4,4,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[4,28,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[4,28,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (4, 28, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[4,21,bf16]>
!tt.device<#device>
mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (4, 21, 'bf16', 'dram')layout: #ttnn.layouttensor<[4,21,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[4,56,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 2, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[4,56,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (4, 56, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[4,3,bf16]>
!tt.device<#device>
mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (4, 3, 'bf16', 'dram')layout: #ttnn.layouttensor<[4,3,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[4,56,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 2, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[4,56,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (4, 56, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[4,4,bf16]>
!tt.device<#device>
mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (4, 4, 'bf16', 'dram')layout: #ttnn.layouttensor<[4,4,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[4,56,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 2, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[4,56,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (4, 56, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[4,49,bf16]>
!tt.device<#device>
mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (4, 49, 'bf16', 'dram')layout: #ttnn.layouttensor<[4,49,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[56,56,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (2, 2, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[56,56,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (56, 56, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[3,56,bf16]>
!tt.device<#device>
mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (3, 56, 'bf16', 'dram')layout: #ttnn.layouttensor<[3,56,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[56,56,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (2, 2, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[56,56,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (56, 56, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[4,56,bf16]>
!tt.device<#device>
mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (4, 56, 'bf16', 'dram')layout: #ttnn.layouttensor<[4,56,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[56,56,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (2, 2, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[56,56,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (56, 56, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[49,56,bf16]>
!tt.device<#device>
mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (49, 56, 'bf16', 'dram')layout: #ttnn.layouttensor<[49,56,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (2, 2, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[5,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[5,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 5, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[7,14,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[7,14,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (7, 14, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[7,3,bf16]>
!tt.device<#device>
mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (7, 3, 'bf16', 'dram')layout: #ttnn.layouttensor<[7,3,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[7,14,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[7,14,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (7, 14, 'bf16', 'system_memory')nannan
ttnn.to_layouttensor<[7,4,bf16]>
!tt.device<#device>
mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (7, 4, 'bf16', 'dram')layout: #ttnn.layouttensor<[7,4,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[7,14,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, bf16>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[7,14,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (7, 14, 'bf16', 'system_memory')nannan
NameInput ShapesInput LayoutsAttributesOutput ShapesOutput LayoutsPCCATOL
ttnn.to_layouttensor<[7,7,bf16]>
!tt.device<#device>
mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (7, 7, 'bf16', 'dram')layout: #ttnn.layouttensor<[7,7,bf16]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, bf16>', 'dram')nannan
ttnn.to_layouttensor<[8,2,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')layout: #ttnn.layout<row_major>tensor<[8,2,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (8, 2, 'ui32', 'system_memory')nannan
ttnn.to_layouttensor<[8,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (8, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[8,1,ui32]>mapping_from: (d0, d1), mapping_to: (d0, d1), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[12,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 12, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[12,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[45,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 45, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[45,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 2, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[5,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 5, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[5,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[5,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 5, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[5,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,1,1,5,ui32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 5, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,1,1,5,ui32]>mapping_from: (d0, d1, d2, d3), mapping_to: (d0 + d1 + d2, d3), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan
ttnn.to_layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'ui32', 'system_memory')layout: #ttnn.layouttensor<[1,ui32]>mapping_from: (d0), mapping_to: (0, d0), memory_config: (1, 1, 'tile<32x32, u32>', 'system_memory')nannan