TT Zephyr Platforms 19.5.0-rc1
Tenstorrent Firmware
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gddr.c File Reference
#include "gddr.h"
#include "harvesting.h"
#include "init.h"
#include "noc.h"
#include "noc_init.h"
#include "noc2axi.h"
#include "reg.h"
#include <tenstorrent/post_code.h>
#include <tenstorrent/spi_flash_buf.h>
#include <tenstorrent/sys_init_defines.h>
#include <tenstorrent/tt_boot_fs.h>
#include <zephyr/drivers/misc/bh_fwtable.h>
#include <zephyr/init.h>
#include <zephyr/logging/log.h>
#include <zephyr/kernel.h>
#include <zephyr/device.h>
#include <zephyr/devicetree.h>
#include <zephyr/drivers/clock_control/clock_control_tt_bh.h>
#include <zephyr/drivers/clock_control.h>
#include <zephyr/drivers/dma.h>
#include <zephyr/drivers/dma/dma_tt_bh_noc.h>
#include <zephyr/drivers/dma/dma_arc_hs.h>

Macros

#define MRISC_FW_NOC2AXI_PORT   0
#define MRISC_SETUP_TLB   13
#define MRISC_L1_ADDR   (1ULL << 37)
#define MRISC_REG_ADDR   (1ULL << 40)
#define MRISC_FW_CFG_OFFSET   0x3C00
#define ARC_NOC0_X   8
#define ARC_NOC0_Y   0
#define MRISC_L1_SIZE   (128 * 1024)
#define MRISC_FW_TAG   "memfw"
#define MRISC_FW_CFG_TAG   "memfwcfg"

Functions

 LOG_MODULE_REGISTER (gddr, CONFIG_TT_APP_LOG_LEVEL)
static uint32_t GetGddrSpeedFromCfg (uint8_t *fw_cfg_image)
static volatile void * SetupMriscL1Tlb (uint8_t gddr_inst)
static uint32_t MriscL1Read32 (uint8_t gddr_inst, uint32_t addr)
static void MriscL1Write32 (uint8_t gddr_inst, uint32_t addr, uint32_t val)
static uint32_t MriscRegRead32 (uint8_t gddr_inst, uint32_t addr)
static void MriscRegWrite32 (uint8_t gddr_inst, uint32_t addr, uint32_t val)
int read_gddr_telemetry_table (uint8_t gddr_inst, gddr_telemetry_table_t *gddr_telemetry)
static void ReleaseMriscReset (uint8_t gddr_inst)
static void SetAxiEnable (uint8_t gddr_inst, uint8_t noc2axi_port, bool axi_enable)
static int LoadMriscFw (uint8_t gddr_inst, uint8_t *buf, size_t buf_size, size_t spi_address, size_t image_size)
static int LoadMriscFwCfg (uint8_t gddr_inst, uint8_t *buf, size_t buf_size, size_t spi_address, size_t image_size)
static uint32_t GetDramMask (void)
static int check_mrisc_busy (uint8_t gddr_inst)
static int wait_mrisc_not_busy (uint8_t gddr_inst, k_timepoint_t timeout, const char *op_desc)
static int StartHwMemtest (uint8_t gddr_inst, uint32_t addr_bits, uint32_t start_addr, uint32_t mask)
static int CheckHwMemtestResult (uint8_t gddr_inst, k_timepoint_t timeout)
static void wipe_l1 (void)
static int InitMrisc (void)
 SYS_INIT_APP (InitMrisc)
static int CheckGddrTraining (uint8_t gddr_inst, k_timepoint_t timeout)
static int CheckGddrHwTest (void)
static int gddr_training (void)
static int32_t mrisc_message (uint32_t op_code, uint32_t instance_mask, uint32_t timeout_ms, const char *op_desc)
int32_t set_mrisc_power_setting (bool on)
 Sets the MRISC power setting for all active MRISCs.
 SYS_INIT_APP (gddr_training)

Variables

static const struct device *const pll_dev_3 = DEVICE_DT_GET_OR_NULL(DT_NODELABEL(pll3))
static const struct device * flash = DEVICE_DT_GET_OR_NULL(DT_NODELABEL(spi_flash))
static const struct device *const arc_dma_dev = DEVICE_DT_GET_OR_NULL(DT_NODELABEL(dma0))
static const struct device * dma_noc = DEVICE_DT_GET(DT_NODELABEL(dma1))
static const struct device *const fwtable_dev = DEVICE_DT_GET(DT_NODELABEL(fwtable))

Macro Definition Documentation

◆ ARC_NOC0_X

#define ARC_NOC0_X   8

◆ ARC_NOC0_Y

#define ARC_NOC0_Y   0

◆ MRISC_FW_CFG_OFFSET

#define MRISC_FW_CFG_OFFSET   0x3C00

◆ MRISC_FW_CFG_TAG

#define MRISC_FW_CFG_TAG   "memfwcfg"

◆ MRISC_FW_NOC2AXI_PORT

#define MRISC_FW_NOC2AXI_PORT   0

◆ MRISC_FW_TAG

#define MRISC_FW_TAG   "memfw"

◆ MRISC_L1_ADDR

#define MRISC_L1_ADDR   (1ULL << 37)

◆ MRISC_L1_SIZE

#define MRISC_L1_SIZE   (128 * 1024)

◆ MRISC_REG_ADDR

#define MRISC_REG_ADDR   (1ULL << 40)

◆ MRISC_SETUP_TLB

#define MRISC_SETUP_TLB   13

Function Documentation

◆ check_mrisc_busy()

int check_mrisc_busy ( uint8_t gddr_inst)
static

◆ CheckGddrHwTest()

int CheckGddrHwTest ( void )
static

◆ CheckGddrTraining()

int CheckGddrTraining ( uint8_t gddr_inst,
k_timepoint_t timeout )
static

◆ CheckHwMemtestResult()

int CheckHwMemtestResult ( uint8_t gddr_inst,
k_timepoint_t timeout )
static

◆ gddr_training()

int gddr_training ( void )
static

◆ GetDramMask()

uint32_t GetDramMask ( void )
static

◆ GetGddrSpeedFromCfg()

uint32_t GetGddrSpeedFromCfg ( uint8_t * fw_cfg_image)
static

◆ InitMrisc()

int InitMrisc ( void )
static

◆ LoadMriscFw()

int LoadMriscFw ( uint8_t gddr_inst,
uint8_t * buf,
size_t buf_size,
size_t spi_address,
size_t image_size )
static

◆ LoadMriscFwCfg()

int LoadMriscFwCfg ( uint8_t gddr_inst,
uint8_t * buf,
size_t buf_size,
size_t spi_address,
size_t image_size )
static

◆ LOG_MODULE_REGISTER()

LOG_MODULE_REGISTER ( gddr ,
CONFIG_TT_APP_LOG_LEVEL  )

◆ mrisc_message()

int32_t mrisc_message ( uint32_t op_code,
uint32_t instance_mask,
uint32_t timeout_ms,
const char * op_desc )
static

◆ MriscL1Read32()

uint32_t MriscL1Read32 ( uint8_t gddr_inst,
uint32_t addr )
static

◆ MriscL1Write32()

void MriscL1Write32 ( uint8_t gddr_inst,
uint32_t addr,
uint32_t val )
static

◆ MriscRegRead32()

uint32_t MriscRegRead32 ( uint8_t gddr_inst,
uint32_t addr )
static

◆ MriscRegWrite32()

void MriscRegWrite32 ( uint8_t gddr_inst,
uint32_t addr,
uint32_t val )
static

◆ read_gddr_telemetry_table()

int read_gddr_telemetry_table ( uint8_t gddr_inst,
gddr_telemetry_table_t * gddr_telemetry )

◆ ReleaseMriscReset()

void ReleaseMriscReset ( uint8_t gddr_inst)
static

◆ set_mrisc_power_setting()

int32_t set_mrisc_power_setting ( bool on)

Sets the MRISC power setting for all active MRISCs.

Parameters
[in]ontrue to send MRISCs the MRISC_MSG_TYPE_PHY_WAKEUP command
false to send MRISCs the MRISC_MSG_TYPE_PHY_POWERDOWN command
Returns
0 on success. Negative error code on failure.

◆ SetAxiEnable()

void SetAxiEnable ( uint8_t gddr_inst,
uint8_t noc2axi_port,
bool axi_enable )
static

◆ SetupMriscL1Tlb()

volatile void * SetupMriscL1Tlb ( uint8_t gddr_inst)
static

◆ StartHwMemtest()

int StartHwMemtest ( uint8_t gddr_inst,
uint32_t addr_bits,
uint32_t start_addr,
uint32_t mask )
static

◆ SYS_INIT_APP() [1/2]

SYS_INIT_APP ( gddr_training )

◆ SYS_INIT_APP() [2/2]

SYS_INIT_APP ( InitMrisc )

◆ wait_mrisc_not_busy()

int wait_mrisc_not_busy ( uint8_t gddr_inst,
k_timepoint_t timeout,
const char * op_desc )
static

◆ wipe_l1()

void wipe_l1 ( void )
static

Variable Documentation

◆ arc_dma_dev

const struct device* const arc_dma_dev = DEVICE_DT_GET_OR_NULL(DT_NODELABEL(dma0))
static

◆ dma_noc

const struct device* dma_noc = DEVICE_DT_GET(DT_NODELABEL(dma1))
static

◆ flash

const struct device* flash = DEVICE_DT_GET_OR_NULL(DT_NODELABEL(spi_flash))
static

◆ fwtable_dev

const struct device* const fwtable_dev = DEVICE_DT_GET(DT_NODELABEL(fwtable))
static

◆ pll_dev_3

const struct device* const pll_dev_3 = DEVICE_DT_GET_OR_NULL(DT_NODELABEL(pll3))
static