Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:
- p -
- P0V8_VCORE_ADDR : regulator.h
- P0V8_VCOREM_ADDR : regulator.h
- p150_config : regulator_config.c
- p150_regulators_config : regulator_config.c, regulator_config.h
- p1x0_vcore_38_data : regulator_config.c
- p1x0_vcore_38_mask : regulator_config.c
- p1x0_vcore_39_data : regulator_config.c
- p1x0_vcore_39_mask : regulator_config.c
- p1x0_vcore_b0_data : regulator_config.c
- p1x0_vcore_b0_mask : regulator_config.c
- p1x0_vcore_ca_data : regulator_config.c
- p1x0_vcore_ca_mask : regulator_config.c
- p1x0_vcore_cb_data : regulator_config.c
- p1x0_vcore_cb_mask : regulator_config.c
- p1x0_vcore_d3_data : regulator_config.c
- p1x0_vcore_d3_mask : regulator_config.c
- p1x0_vcore_data : regulator_config.c
- p1x0_vcore_e7_data : regulator_config.c
- p1x0_vcore_e7_mask : regulator_config.c
- p1x0_vcorem_38_data : regulator_config.c
- p1x0_vcorem_38_mask : regulator_config.c
- p1x0_vcorem_39_data : regulator_config.c
- p1x0_vcorem_39_mask : regulator_config.c
- p1x0_vcorem_b0_data : regulator_config.c
- p1x0_vcorem_b0_mask : regulator_config.c
- p1x0_vcorem_data : regulator_config.c
- p1x0_vcorem_e7_data : regulator_config.c
- p1x0_vcorem_e7_mask : regulator_config.c
- p300_left_config : regulator_config.c
- p300_left_regulators_config : regulator_config.c, regulator_config.h
- p300_right_config : regulator_config.c
- p300_right_regulators_config : regulator_config.c, regulator_config.h
- p300_vcore_38_data : regulator_config.c
- p300_vcore_38_mask : regulator_config.c
- p300_vcore_39_data : regulator_config.c
- p300_vcore_39_mask : regulator_config.c
- p300_vcore_b0_data : regulator_config.c
- p300_vcore_b0_mask : regulator_config.c
- p300_vcore_cb_data : regulator_config.c
- p300_vcore_cb_mask : regulator_config.c
- p300_vcore_data : regulator_config.c
- p300_vcore_e7_data : regulator_config.c
- p300_vcore_e7_mask : regulator_config.c
- p300_vcorem_38_data : regulator_config.c
- p300_vcorem_38_mask : regulator_config.c
- p300_vcorem_39_data : regulator_config.c
- p300_vcorem_39_mask : regulator_config.c
- p300_vcorem_b0_data : regulator_config.c
- p300_vcorem_b0_mask : regulator_config.c
- p300_vcorem_data : regulator_config.c
- p300_vcorem_e7_data : regulator_config.c
- p300_vcorem_e7_mask : regulator_config.c
- PACKET_TAG : noc_dma.c
- page_info : spi_eeprom.c
- PcbType : bh_fwtable.h
- PcbTypeOrion : bh_fwtable.h
- PcbTypeP100 : bh_fwtable.h
- PcbTypeP150 : bh_fwtable.h
- PcbTypeP300 : bh_fwtable.h
- PcbTypeUBB : bh_fwtable.h
- PcbTypeUnknown : bh_fwtable.h
- PCIE_DBI_REG_TLB : pcie.h
- PCIE_DBI_USP_A_BH_PCIE_DWC_PCIE_USP_PF0_HDMA_CAP_HDMA_DAR_HIGH_OFF_RDCH_0_REG_ADDR : pcie_dma.c
- PCIE_DBI_USP_A_BH_PCIE_DWC_PCIE_USP_PF0_HDMA_CAP_HDMA_DAR_HIGH_OFF_WRCH_0_REG_ADDR : pcie_dma.c
- PCIE_DBI_USP_A_BH_PCIE_DWC_PCIE_USP_PF0_HDMA_CAP_HDMA_DAR_LOW_OFF_RDCH_0_REG_ADDR : pcie_dma.c
- PCIE_DBI_USP_A_BH_PCIE_DWC_PCIE_USP_PF0_HDMA_CAP_HDMA_DAR_LOW_OFF_WRCH_0_REG_ADDR : pcie_dma.c
- PCIE_DBI_USP_A_BH_PCIE_DWC_PCIE_USP_PF0_HDMA_CAP_HDMA_DOORBELL_OFF_RDCH_0_REG_ADDR : pcie_dma.c
- PCIE_DBI_USP_A_BH_PCIE_DWC_PCIE_USP_PF0_HDMA_CAP_HDMA_DOORBELL_OFF_WRCH_0_REG_ADDR : pcie_dma.c
- PCIE_DBI_USP_A_BH_PCIE_DWC_PCIE_USP_PF0_HDMA_CAP_HDMA_EN_OFF_RDCH_0_REG_ADDR : pcie_dma.c
- PCIE_DBI_USP_A_BH_PCIE_DWC_PCIE_USP_PF0_HDMA_CAP_HDMA_EN_OFF_WRCH_0_REG_ADDR : pcie_dma.c
- PCIE_DBI_USP_A_BH_PCIE_DWC_PCIE_USP_PF0_HDMA_CAP_HDMA_INT_SETUP_OFF_RDCH_0_REG_ADDR : pcie_dma.c
- PCIE_DBI_USP_A_BH_PCIE_DWC_PCIE_USP_PF0_HDMA_CAP_HDMA_INT_SETUP_OFF_WRCH_0_REG_ADDR : pcie_dma.c
- PCIE_DBI_USP_A_BH_PCIE_DWC_PCIE_USP_PF0_HDMA_CAP_HDMA_MSI_ABORT_HIGH_OFF_RDCH_0_REG_ADDR : pcie_dma.c
- PCIE_DBI_USP_A_BH_PCIE_DWC_PCIE_USP_PF0_HDMA_CAP_HDMA_MSI_ABORT_HIGH_OFF_WRCH_0_REG_ADDR : pcie_dma.c
- PCIE_DBI_USP_A_BH_PCIE_DWC_PCIE_USP_PF0_HDMA_CAP_HDMA_MSI_ABORT_LOW_OFF_RDCH_0_REG_ADDR : pcie_dma.c
- PCIE_DBI_USP_A_BH_PCIE_DWC_PCIE_USP_PF0_HDMA_CAP_HDMA_MSI_ABORT_LOW_OFF_WRCH_0_REG_ADDR : pcie_dma.c
- PCIE_DBI_USP_A_BH_PCIE_DWC_PCIE_USP_PF0_HDMA_CAP_HDMA_MSI_MSGD_OFF_RDCH_0_REG_ADDR : pcie_dma.c
- PCIE_DBI_USP_A_BH_PCIE_DWC_PCIE_USP_PF0_HDMA_CAP_HDMA_MSI_MSGD_OFF_WRCH_0_REG_ADDR : pcie_dma.c
- PCIE_DBI_USP_A_BH_PCIE_DWC_PCIE_USP_PF0_HDMA_CAP_HDMA_MSI_STOP_HIGH_OFF_RDCH_0_REG_ADDR : pcie_dma.c
- PCIE_DBI_USP_A_BH_PCIE_DWC_PCIE_USP_PF0_HDMA_CAP_HDMA_MSI_STOP_HIGH_OFF_WRCH_0_REG_ADDR : pcie_dma.c
- PCIE_DBI_USP_A_BH_PCIE_DWC_PCIE_USP_PF0_HDMA_CAP_HDMA_MSI_STOP_LOW_OFF_RDCH_0_REG_ADDR : pcie_dma.c
- PCIE_DBI_USP_A_BH_PCIE_DWC_PCIE_USP_PF0_HDMA_CAP_HDMA_MSI_STOP_LOW_OFF_WRCH_0_REG_ADDR : pcie_dma.c
- PCIE_DBI_USP_A_BH_PCIE_DWC_PCIE_USP_PF0_HDMA_CAP_HDMA_SAR_HIGH_OFF_RDCH_0_REG_ADDR : pcie_dma.c
- PCIE_DBI_USP_A_BH_PCIE_DWC_PCIE_USP_PF0_HDMA_CAP_HDMA_SAR_HIGH_OFF_WRCH_0_REG_ADDR : pcie_dma.c
- PCIE_DBI_USP_A_BH_PCIE_DWC_PCIE_USP_PF0_HDMA_CAP_HDMA_SAR_LOW_OFF_RDCH_0_REG_ADDR : pcie_dma.c
- PCIE_DBI_USP_A_BH_PCIE_DWC_PCIE_USP_PF0_HDMA_CAP_HDMA_SAR_LOW_OFF_WRCH_0_REG_ADDR : pcie_dma.c
- PCIE_DBI_USP_A_BH_PCIE_DWC_PCIE_USP_PF0_HDMA_CAP_HDMA_STATUS_OFF_RDCH_0_REG_ADDR : pcie_dma.c
- PCIE_DBI_USP_A_BH_PCIE_DWC_PCIE_USP_PF0_HDMA_CAP_HDMA_STATUS_OFF_WRCH_0_REG_ADDR : pcie_dma.c
- PCIE_DBI_USP_A_BH_PCIE_DWC_PCIE_USP_PF0_HDMA_CAP_HDMA_XFERSIZE_OFF_RDCH_0_REG_ADDR : pcie_dma.c
- PCIE_DBI_USP_A_BH_PCIE_DWC_PCIE_USP_PF0_HDMA_CAP_HDMA_XFERSIZE_OFF_WRCH_0_REG_ADDR : pcie_dma.c
- pcie_dma_transfer_handler() : pcie_dma.c
- pcie_init() : pcie.c
- PCIE_INIT_CPL_TIME_REG_ADDR : status_reg.h
- pcie_init_PRIO : sys_init_defines.h
- PCIE_INST0_LOGICAL_X : pcie.h
- PCIE_INST1_LOGICAL_X : pcie.h
- PCIE_LOGICAL_Y : pcie.h
- PCIE_NOC_TLB_DATA_REG_OFFSET : pcie.c
- PCIE_NOC_TLB_DATA_REG_OFFSET2 : pcie.c
- PCIE_PHY_SERDES0_BASE : serdes_ss_regs.h
- PCIE_PHY_SERDES1_BASE : serdes_ss_regs.h
- PCIE_PHY_SERDES2_BASE : serdes_ss_regs.h
- PCIE_PHY_SERDES_SRAM00_REG_ADDR : serdes_ss_regs.h
- PCIE_PHY_SERDES_SRAM01_REG_ADDR : serdes_ss_regs.h
- PCIE_PHY_SERDES_SRAM02_REG_ADDR : serdes_ss_regs.h
- PCIE_PHY_SERDES_SRAM_START_REG_ADDR : serdes_ss_regs.h
- PCIE_SERDES0_ALPHACORE_TLB : pcie.c
- PCIE_SERDES0_CTRL_TLB : pcie.c
- PCIE_SERDES1_ALPHACORE_TLB : pcie.c
- PCIE_SERDES1_CTRL_TLB : pcie.c
- PCIE_SERDES_SOC_REG_OFFSET : pcie.c
- PCIE_SII_A_APP_PCIE_CTL_REG_OFFSET : pcie.c
- PCIE_SII_A_LTSSM_STATE_REG_OFFSET : pcie.c
- PCIE_SII_A_NOC_TLB_DATA_0__REG_OFFSET : pcie.c
- PCIE_SII_A_NOC_TLB_DATA_62__REG_OFFSET : pcie.c
- PCIE_SII_A_REG_MAP_BASE_ADDR : pcie.c
- PCIE_SII_APP_PCIE_CTL_REG_DEFAULT : pcie.c
- PCIE_SII_LTSSM_STATE_REG_DEFAULT : pcie.c
- PCIE_SII_NOC_TLB_DATA_REG_DEFAULT : pcie.c
- PCIE_SII_REG_TLB : pcie.c
- PCIE_TLB_CONFIG_ADDR : pcie.c
- PCIE_TLB_CONFIG_TLB : pcie.c
- PCIeDeviceType : pcie.h
- PcieDmaReadTransfer() : pcie_dma.c
- PcieDmaWriteTransfer() : pcie_dma.c
- PCIeInit() : pcie.c, pcie.h
- PCIeInitComm() : pcie.c
- PCIeInitOk : pcie.h
- PCIeInitStatus : pcie.h
- PCIeLinkTrainTimeout : pcie.h
- PCIeSerdesFWLoadTimeout : pcie.h
- PCS_OFFSET : serdes_eth.h
- perst_seen : jtag_bootrom.c
- perst_start_time : jtag_bootrom.c
- PERST_TO_DMFW_INIT_DONE_REG_ADDR : status_reg.h
- pgood_change_detected() : bh_chip.c
- pgood_gpio_setup() : bh_chip.h, bh_chip.c
- PhysXToNoc() : noc.c, noc.h
- PhysYToNoc() : noc.c, noc.h
- PINCTRL_TT_BH_AF0 : tt_blackhole_smc-pinctrl.h
- PINCTRL_TT_BH_AF1 : tt_blackhole_smc-pinctrl.h
- PINCTRL_TT_BH_DRVS : tt_blackhole_smc-pinctrl.h
- PINCTRL_TT_BH_DRVS_BITS : tt_blackhole_smc-pinctrl.h
- PINCTRL_TT_BH_DRVS_DFLT : tt_blackhole_smc-pinctrl.h
- PINCTRL_TT_BH_DRVS_MAX : tt_blackhole_smc-pinctrl.h
- PINCTRL_TT_BH_DRVS_SHIFT : tt_blackhole_smc-pinctrl.h
- PINCTRL_TT_BH_PDEN : tt_blackhole_smc-pinctrl.h
- PINCTRL_TT_BH_PUEN : tt_blackhole_smc-pinctrl.h
- PINCTRL_TT_BH_RXEN : tt_blackhole_smc-pinctrl.h
- PINCTRL_TT_BH_STEN : tt_blackhole_smc-pinctrl.h
- PINCTRL_TT_BH_TRIEN : tt_blackhole_smc-pinctrl.h
- ping_dm_handler() : cm2dm_msg.c
- PING_DMFW_DURATION_REG_ADDR : status_reg.h
- PLL0 : pll.c
- PLL1 : pll.c
- PLL2 : pll.c
- PLL3 : pll.c
- PLL4 : pll.c
- PLL_0_CNTL_CLK_COUNTER_EN_REG_ADDR : pll.c
- PLL_0_CNTL_PLL_CNTL_0_REG_ADDR : pll.c
- PLL_0_CNTL_PLL_CNTL_1_REG_ADDR : pll.c
- PLL_0_CNTL_PLL_CNTL_2_REG_ADDR : pll.c
- PLL_0_CNTL_PLL_CNTL_3_REG_ADDR : pll.c
- PLL_0_CNTL_PLL_CNTL_4_REG_ADDR : pll.c
- PLL_0_CNTL_PLL_CNTL_5_REG_ADDR : pll.c
- PLL_0_CNTL_PLL_CNTL_6_REG_ADDR : pll.c
- PLL_0_CNTL_USE_POSTDIV_REG_ADDR : pll.c
- PLL_CNTL_PLL_CNTL_0_REG_DEFAULT : pll.c
- PLL_CNTL_PLL_CNTL_1_REG_DEFAULT : pll.c
- PLL_CNTL_PLL_CNTL_2_REG_DEFAULT : pll.c
- PLL_CNTL_PLL_CNTL_3_REG_DEFAULT : pll.c
- PLL_CNTL_PLL_CNTL_4_REG_DEFAULT : pll.c
- PLL_CNTL_PLL_CNTL_5_REG_DEFAULT : pll.c
- PLL_CNTL_REG_OFFSET : pll.c
- PLL_CNTL_USE_POSTDIV_REG_DEFAULT : pll.c
- PLL_CNTL_WRAPPER_CLOCK_WAVE_CNTL_REG_ADDR : clock_wave.c
- PLL_CNTL_WRAPPER_CLOCK_WAVE_CNTL_REG_DEFAULT : clock_wave.c
- PLL_CNTL_WRAPPER_PLL_LOCK_REG_ADDR : pll.c
- PLL_CNTL_WRAPPER_PLL_LOCK_REG_DEFAULT : pll.c
- PLL_CNTL_WRAPPER_REFCLK_PERIOD_REG_ADDR : pll.c
- PLL_COUNT : pll.c
- pll_dev_0 : aiclk_ppm.c, telemetry.c
- pll_dev_1 : avs.c, telemetry.c
- pll_dev_3 : gddr.c
- pll_dev_4 : telemetry.c
- PLL_DEVICE_INIT : reset.c
- pll_devs : reset.c
- PLLAllBypass() : pll.c, pll.h
- PLLInit() : pll.c, pll.h
- PLLInit_PRIO : sys_init_defines.h
- PLLNum : pll.c
- PLLOk : pll.c
- PLLStatus : pll.c
- PLLTimeout : pll.c
- PLLUpdate() : pll.c
- PMBUS_CMD_BYTE_SIZE : regulator.c
- PMBUS_FLIP_BYTES : regulator.c
- PMBUS_MST_ID : regulator.c
- PMM_BLOCK_PMM_CTRL_REG_ADDR : pmm.c
- PMM_BLOCK_PMM_CTRL_REG_DEFAULT : pmm.c
- PMM_BLOCK_PMM_MESSAGE_REG_ADDR : pmm.c
- PMM_BLOCK_PMM_MESSAGE_REG_DEFAULT : pmm.c
- PollForLinkUp() : pcie.c
- PollI2CSlave() : dw_apb_i2c.c, dw_apb_i2c.h
- PollSmbusTarget() : smbus_target.c, smbus_target.h
- POST_CODE_ARC_INIT_STEP0 : post_code.h
- POST_CODE_ARC_INIT_STEP1 : post_code.h
- POST_CODE_ARC_INIT_STEP2 : post_code.h
- POST_CODE_ARC_INIT_STEP3 : post_code.h
- POST_CODE_ARC_INIT_STEP4 : post_code.h
- POST_CODE_ARC_INIT_STEP5 : post_code.h
- POST_CODE_ARC_INIT_STEP6 : post_code.h
- POST_CODE_ARC_INIT_STEP7 : post_code.h
- POST_CODE_ARC_INIT_STEP8 : post_code.h
- POST_CODE_ARC_INIT_STEP9 : post_code.h
- POST_CODE_ARC_INIT_STEPA : post_code.h
- POST_CODE_ARC_INIT_STEPB : post_code.h
- POST_CODE_ARC_INIT_STEPC : post_code.h
- POST_CODE_ARC_INIT_STEPD : post_code.h
- POST_CODE_ARC_INIT_STEPE : post_code.h
- POST_CODE_ARC_INIT_STEPF : post_code.h
- POST_CODE_ARC_MSG_HANDLE_DONE : post_code.h
- POST_CODE_ARC_MSG_HANDLE_START : post_code.h
- POST_CODE_ARG_MSG_QUEUE : post_code.h
- POST_CODE_ARG_MSG_QUEUE_START : post_code.h
- POST_CODE_PREFIX : post_code.h
- POST_CODE_REG_ADDR : msgqueue.c
- POST_CODE_SRC_CMFW : post_code.h
- POST_CODE_TELEMETRY_END : post_code.h
- POST_CODE_TELEMETRY_START : post_code.h
- POST_CODE_ZEPHYR_INIT_DONE : post_code.h
- PostCm2DmMsg() : cm2dm_msg.c, cm2dm_msg.h
- power : cm2dm_msg.c
- power_bit_flag_aiclk : power.c
- power_bit_flag_max : power.c
- power_bit_flag_mrisc : power.c
- power_bit_flags_e : power.c
- power_setting_msg_handler() : power.c
- power_settings_e : power.c
- power_settings_max : power.c
- PRE_TRANSLATION_SIZE : noc_init.c
- prepare_msg_queue() : msgqueue.c
- process_l2_message_queue() : msgqueue.c
- process_message_queue() : msgqueue.c
- process_message_queues() : msgqueue.h, msgqueue.c
- process_queued_message() : msgqueue.c
- program_noc_dma_tlb() : noc_dma.c
- ProgramBroadcastExclusion() : noc_init.c
- ProgramNocTranslation() : noc_init.c
- pvt_tt_bh_attribute : pvt_tt_bh.h
- pvt_tt_bh_channel : pvt_tt_bh.h
- pvt_tt_bh_delay_chain_set() : pvt_tt_bh.h
- pvt_tt_bh_float_to_sensor_value() : pvt_tt_bh.h
- pvt_tt_bh_freq_to_raw() : pvt_tt_bh.h
- pvt_tt_bh_get_decoder() : pvt_tt_bh.h
- pvt_tt_bh_raw_to_freq() : pvt_tt_bh.h
- pvt_tt_bh_raw_to_temp() : pvt_tt_bh.h
- pvt_tt_bh_raw_to_volt() : pvt_tt_bh.h
- pvt_tt_bh_submit() : pvt_tt_bh.h
- pvt_tt_bh_temp_to_raw() : pvt_tt_bh.h
- pvt_tt_bh_volt_to_raw() : pvt_tt_bh.h
- PVTInit_PRIO : sys_init_defines.h