Command Line Interface Reference

This page documents all command-line flags for RiESCUE tools. Each tool inherits flags from shared components (FeatMgr, Toolchain, Logger), so many flags are available across multiple tools.

RiescueD

RiescueD CLI. Includes flags from FeatMgr, Logger, and Toolchain.

-h, –help

show this help message and exit

–testfile, -t

Testname with path to be compiled with RiESCUE-D

–testname

Legacy switch to be deprecated, use –testfile instead.

–run_dir, -rd

Run directory where the test will be run

–seed

Seed for the test

–cpuconfig

Path to cpu feature configuration. Defaults to dtest_framework/lib/config.json

–elaborate_only

Only elaborate the test but dont attempt to call external compiler or simulator

–run_iss

Run ISS with the test. Default ISS is Whisper, but can be run with any other ISS using –iss <iss>

–conf

Path to conf.py file for additional config and hooks.

–tohost_nonzero_terminate, -tnt

Spike option to be forwarded. Ends simulation immediately when tohost becomes nonzero.

–counter_event_path

path to counter event file, used to randomize events in counter files

–max_logger_file_gb

Max size of testlog file in GB

–test_priv_mode

Specify privilege mode for the test to be forced. e.g. –test_priv_mode user. Legal values are: user, super, machine

–test_paging_mode

Specify paging mode for the test to be forced. e.g. –test_paging_mode sv57

–test_paging_g_mode

Specify g-stage paging mode for the test to be forced. e.g. –test_paging_g_mode sv57

–test_env

Specify environment for the test to be forced. e.g. –test_env bare_metal

–test_env_any

Allow test environment to be randomly selected between bare_metal and virtualized if any is specified

–test_secure_mode

Specify secure mode for the test to be forced. e.g. –test_secure_mode random If random or any is selected then the probability of secure mode is 20%%

–supported_priv_modes

Specify privilege modes supported by the platform. e.g. –supported_priv_modes MSU. Default to MSU if not specified

–tohost

Hardcoded address for tohost and HTIF IO section; Leaving blank uses value in memap, if none in memmap puts as variables at end of os_code

–eot_pass_value

Sets the end of test pass value; defaults to 1

–eot_fail_value

Sets the end of test fail value; defaults to 1

–print_rvcp_failed

Print RVCP FAILED message when discrete test fails

–print_rvcp_passed

Print RVCP PASSED message when discrete test passes

–rvmodel_macros

Path to rvmodel_macros.h

–mp

Overrides MP enablement in cpuconfig file or overridden in test file. Legal values are: ‘on’, ‘off’

–mp_mode

Overrides MP mode provided in cpuconfig file or overridden in test file. Legal values are: ‘simultaneous’, ‘parallel’

–parallel_scheduling_mode

Overrides parallel scheduling mode provided in cpuconfig file or overridden in test file. Legal values are: ‘round_robin’, ‘exhaustive’

–num_cpus

Overrides number of CPUs provided in cpuconfig file or overridden in test file. Legal values are positive integers

–single_assembly_file, -saf

Indicates that all assembly is written to a single file. Ignoring this option means writing to a handful of .inc files

–force_alignment

Forces all data and code to be byte-aligned; Removes –misaligned from spike run_iss’s args

–c_used

Use C sections when generating code

–small_bss

Sets bss section to 1200 4kb page instead of default

–big_bss

Sets bss section to 3080 4kb pages instead of default

–big_endian, -big_e

Mode for enabling big-endian for cross-compilers and ISS

–more_os_pages

Ask riescued to generate more code and os_stack pages for long tests

–add_gcc_cstdlib_sections

Add a gcc cstdlib section to the test for each library function as GCC likes to do.

–addrgen_limit_indices

Limit addrgen to not generate more than 4 addresses with the same index

–code_offset

Specify code offset where the test code should start. Must be 16-byte aligned. Default: Randomized 0-140h

–randomize_code_location

Randomize the code location in the test. Default: follows .runtime section

–identity_map_code

Identity map all contiguously allocated code sections. Forces VA == PA for these sections.

–repeat_times, -rt

Number of times each discrete test should be run

–selfcheck

Enable selfchecking at the end of each discrete test by compiling in golden data from a run of the test in Whisper

–compiler-include-dir

Directory to add to compiler include search path. Passed through to the compiler with -I.

–log_test_execution

Enable runtime logging of test execution

–private_maps

Setup isolated page map address spaces

–cfile

Use runtime c-files that must be specified with this arg. Can be specified multiple times

–inc_path

Add this include path for c compiler. Can be specified multiple times

–enable_machine_paging

Enable Machine privilege + paging mode for the test. Guest paging mode disabled

–fe_tb, -fe_tb

Special considerations for FE testbench. They really can’t know taken vs not-taken branches. So, jump to passed|failed is same for them. So, making passed=failed label

–wysiwyg

‘What You See Is What You Get mode; no OS code is added, only the test code is executed as it is. Intended for environments not monitoring tohost writes

–linux_mode

Generate riescued OS code and prepare test to run it in the Linux environment. Runs endlessly

–bringup_pagetables

Implies –wysiwyg and –addrgen_limit_indices, but enables switch to super and paging in the loader code

–reserve_partial_phys_memory

By default, Riescue-D will only reserve full physical address size specified by ;page_mapping(pagesize) or ;random_addr(size). If you want Riescued to only reserve 4kb size for all the addresses, use this option

–all_4kb_pages

Ask riescued to generate all 4KB pages

–disallow_mmio

Disallow MMIO in the test

–addrgen_limit_way_predictor_multihit, -ag_limit_wp_multihit

Limit addrgen to not generate address with multi-hit in the way predictor

–deleg_excp_to, -deleg_excp_to

Specify privilege where all traps are handled. Can not be specified with any of –medeleg –mideleg –hedeleg –hideleg. “machine” specifies all traps should be handled in machine mode. “super” delegates all exceptions except ecalls to (hypervisor) supervisor mode.

–switch_to_machine_page, -switch_to_machine_page

Specify the page where the handler will return control after using ecall function 0xf0010001

–switch_to_super_page, -switch_to_super_page

Specify the page where the handler will return control after using ecall function 0xf0010002

–switch_to_user_page, -switch_to_user_page

Specify the page where the handler will return control after using ecall function 0xf0010003

–excp_hooks, -excp_hooks

Insert exception handler hooks. RiescueD will call excp_handler_pre: and excp_handler_post: functions right before entering the exception hndler and after before returning from exception handler respectively

–interrupts_enabled, -ie

(deprecated) Interrupts are enabled by default. Disable with –interrupts_disabled

–interrupts_disabled

Disable interrupts. By default interrupts are enabled in the handler.

–skip_instruction_for_unexpected

Ambigious name - this should be something like ‘ignore unexpected exceptions’.

–setup_pmp

Ask riescued to setup PMP registers

–needs_pma

Indicates if the test wants to enable PMA functionality of Riescue-D

–num_pmas

Number of PMACFG registers implemented. Default is 16. Changing this number requires an update in the whisper_config.json

–csr_init

Initialize a CSR with a value. Format: ‘csr_name=value’ or ‘csr_number=value’. Can be specified multiple times. Example: –csr_init mstatus=0x8000 –csr_init 0x300=0x1

–csr_init_mask

Initialize a CSR using read-modify-write with a mask. Format: ‘csr_name=mask=value’ or ‘csr_number=mask=value’. Can be specified multiple times. Example: –csr_init_mask mstatus=0x8000=0x8000

–no_random_csr_reads, -no_random_csr_reads

Disable random CSR read randomization that happens in the OS scheduler code

–max_random_csr_reads, -max_random_csr_read

Maximum number of CSRs read to inject for the randomization. Default: 16. Minimum: 3.

–random_machine_csr_list, -random_machine_csr_list

List csr name that the CSR read randomization logic must include when OS is in machine mode. Specify list this: –random_machine_csr_list mstatus,mcause FIXME: use choices

–random_supervisor_csr_list, -random_supervisor_csr_list

List csr name that the CSR read randomization logic must include when OS is in supervisor/machine mode. Specify list this: –random_supervisor_csr_list sstatus,scause

–random_user_csr_list, -random_user_csr_list

List csr name that the CSR read randomization logic must include when OS is in user/supervisor/machine mode. Specify list this: –random_supervisor_csr_list fcsr,time

–medeleg

Override medeleg when –test_env supervisor/user

–mideleg

Override mideleg when –test_env supervisor/user

–hedeleg

Override hedeleg when ‘–test_env supervisor/user’ and ‘–test_env virtualized’ in VS mode OS

–hideleg

Override hideleg when ‘–test_env supervisor/user’ and ‘–test_env virtualized’ in VS mode OS

–menvcfg

Override menvcfg value to write in loader

–henvcfg

Override henvcfg value to write in loader

–senvcfg

Override senvcfg value to write in loader. Default 0x0.

–mstateen

Override mstateen0 value to write in loader. Default is -1 (all bits set).

–hstateen

Override hstateen0 value to write in loader. Default is -1 (all bits set).

–sstateen

Override sstateen0 value to write in loader. Default is -1 (all bits set).

–secure_access_probability, -sap

Probability of secure access in the test. Default is 30%%

–secure_pt_probability

Probability of secure pagetable in the test

–a_d_bit_randomization

Probability of randomizing A and D bits in page table entries (0-100)

–pbmt_ncio_randomization

Probability of randomizing PBMT NC vs IO bits in page table entries (0-100)

–fs_randomization

Probability of randomizing mstatus/sstatus/vsstatus FS field (0-100). Only when F/D extension is supported.

–fs_randomization_values

Comma-separated list of FS values to randomize (0-3). 0=Off, 1=Initial, 2=Clean, 3=Dirty. Default: 2. E.g. 1,2 for Initial and Clean.

–vs_randomization

Probability of randomizing mstatus/sstatus/vsstatus VS field (0-100). Only when V extension is supported.

–vs_randomization_values

Comma-separated list of VS values to randomize (0-3). 0=Off, 1=Initial, 2=Clean, 3=Dirty. Default: 2.

–logger_level

Logger level

–logger_file

Logger file path

–logger_no_tee

Do not tee log output. Default command line behavior is to tee to stderr

–logger_no_timestamp

Do not include timestamp in log messages

–logger_max_file_size_gb

Max size of log file in GB. Throws error if exceeded

–logger_verbose

Enable verbose logging (filename, function name)

–iss

Instruction set simulator to use

–compiler_path

Path to compiler executable. If not provided, will use RV_GCC environment variable

–compiler_opts

Additional args to pass to the compiler

–compiler_march

march to pass to compiler. If not provided and config.json is available, will be generated from enabled features

–compiler_mabi

ABI to use for compiler. Leave unset to use compiler default

–test_equates, -teq

Variables to have compiler define with -Dkey=value. e.g –test_equates EQUATE1=0x1 Can use multiple times, e.g. -teq A=1 -teq B=2.

–disassembler_path

Path to disassembler executable. If not provided, will use RV_OBJDUMP environment variable

–disassembler_opts

Additional args to pass to the disassembler

–spike_path

Path to spike executable

–spike_args

Additional spike args to pass to the simulator

–spike_isa

ISA string to pass to ISS –isa

–third_party_spike

Use public version of spike. Default is internal spike

–spike_max_instr

Max instructions to simulate on spike

–whisper_path

Path to Whisper executable. If not provided, will use WHISPER_PATH environment variable

–whisper_args

Additional spike args to pass to the simulator

–whisper_config_json

Relative path to the whisper config json file

–whisper_max_instr

Max instructions to simulate on whisper

–whisper_memory_size

Size of whisper memory

–whisper_dumpmem

Dump memory command to pass to the simulator. Use @ to reference symbols in elf file

–whisper_startpc

Start pc to pass to the simulator

RiescueC

RiescueC CLI. Includes flags from Bringup mode, Test Plan mode, FeatMgr, Logger, and Toolchain.

-h, –help

show this help message and exit

–mode

Compliance mode

–run_dir, -rd

Run directory where the test will be run

–seed

Seed for the test

–json, -js

JSON File specifying the compliance args

–cpuconfig

Path to cpu feature configuration to pass to riescued

–output_file, -o

Output Filename. The output is generated as <output_filename>{.s/.dis/.log/.S}

–default_config, -dcfg

JSON File specifying default configuration

–user_config, -ucfg

JSON File specifying user-defined configuration

–fp_config, -fcfg

JSON File specifying default floating point instruction configuration

–dump_instrs

Switch to dump the instruction fields as JSON

–disable_pass

Disables the second pass for the compliance run

–first_pass_iss

Provide Target ISS for the first pass

–second_pass_iss

Provide Target ISS for the second pass

–rpt_cnt

Each instruction will have rpt_cnt instances in the test

–max_instrs_per_file

Max instrs in the test file during the first pass. Doesn’t include second pass or runtime instructions

–compare_iss

Run second pass testcase on both ISS targets (i.e whisper and spike) and compares the logs

–repeat_runtime, -repeat_runtime

–repeat_times passthrough. Run each discrete test these many times. Only use this with –disable_pass

–output_format, -op_fmt

Format in which output is generated

–load_fp_regs, -lfpr

Switch to load fp regs with load instructions rather than fmv instructions.

–combine_compliance_tests, -cct

When set compliance tests will be combined into a single discrete test per file.

–exclude_instrs, -exclude_instrs

Specify instructions to exclude. e.g.–exclude_instrs “add,sub”

–include_extensions

Specify extensions to include. e.g.–include_extensions “i_ext,m_ext”

–instrs, -instrs

Specify instructions to be run. e.g. –instrs “add,sub”

–groups, -groups

Specify groups to be run. e.g. –groups “rv64i_load_store,rv32f_single_precision_reg_reg”

–rv_zfbfmin_experimental, -rze

Experimental mode for to enable rv_zfbfmin, adds options to riescue-d call

–rv_zvbb_experimental, -rvz

Experimental mode for to enable rv_zvbb, adds options to riescue-d call

–rv_zvfbfmin_experimental, -rvf

Experimental mode for to enable rv_zvfbfmin, adds options to riescue-d call

–rv_zvfbfwma_experimental, -rvw

Experimental mode for to enable rv_zvfbfwma, adds options to riescue-d call

–rv_zvbc_experimental, -rvb

Experimental mode for to enable rv_zvbc, adds options to riescue-d call

–rv_zvkg_experimental, -rvk

Experimental mode for to enable rv_zvkg, adds options to riescue-d call

–rv_zvknhb_experimental, -rvn

Experimental mode for to enable rv_zvknhb, adds options to riescue-d call

–vector_bringup, -vb

Mode for generating special constraints for vector bringup

–experimental_compiler

Path to experimental compiler to pass to RiescueD for *_experimental features. Defaults to EXPERIMENTAL_COMPILER environment variable.

–experimental_objdump

Path to experimental objdump to pass to RiescueD for *_experimental features. Defaults to EXPERIMENTAL_OBJDUMP environment variable.

–fpgen_on

Turn on FPgen, randomly generate floating point numbers using fpgen database. Setting environment variable FPGEN_ENABLED also sets this to true

–fast_fpgen, -ffp

Fpgen returns entries in order (doesn’t count the number of qualified entries)

–privilege_mode

Deprecated argument. Use –test_priv_mode instead.

–isa

ISA to use

–test_plan

Test plan to use

–conf

Path to conf.py file for additional config and hooks.

–tohost_nonzero_terminate, -tnt

Spike option to be forwarded. Ends simulation immediately when tohost becomes nonzero.

–counter_event_path

path to counter event file, used to randomize events in counter files

–max_logger_file_gb

Max size of testlog file in GB

–test_priv_mode

Specify privilege mode for the test to be forced. e.g. –test_priv_mode user. Legal values are: user, super, machine

–test_paging_mode

Specify paging mode for the test to be forced. e.g. –test_paging_mode sv57

–test_paging_g_mode

Specify g-stage paging mode for the test to be forced. e.g. –test_paging_g_mode sv57

–test_env

Specify environment for the test to be forced. e.g. –test_env bare_metal

–test_env_any

Allow test environment to be randomly selected between bare_metal and virtualized if any is specified

–test_secure_mode

Specify secure mode for the test to be forced. e.g. –test_secure_mode random If random or any is selected then the probability of secure mode is 20%%

–supported_priv_modes

Specify privilege modes supported by the platform. e.g. –supported_priv_modes MSU. Default to MSU if not specified

–tohost

Hardcoded address for tohost and HTIF IO section; Leaving blank uses value in memap, if none in memmap puts as variables at end of os_code

–eot_pass_value

Sets the end of test pass value; defaults to 1

–eot_fail_value

Sets the end of test fail value; defaults to 1

–print_rvcp_failed

Print RVCP FAILED message when discrete test fails

–print_rvcp_passed

Print RVCP PASSED message when discrete test passes

–rvmodel_macros

Path to rvmodel_macros.h

–mp

Overrides MP enablement in cpuconfig file or overridden in test file. Legal values are: ‘on’, ‘off’

–mp_mode

Overrides MP mode provided in cpuconfig file or overridden in test file. Legal values are: ‘simultaneous’, ‘parallel’

–parallel_scheduling_mode

Overrides parallel scheduling mode provided in cpuconfig file or overridden in test file. Legal values are: ‘round_robin’, ‘exhaustive’

–num_cpus

Overrides number of CPUs provided in cpuconfig file or overridden in test file. Legal values are positive integers

–single_assembly_file, -saf

Indicates that all assembly is written to a single file. Ignoring this option means writing to a handful of .inc files

–force_alignment

Forces all data and code to be byte-aligned; Removes –misaligned from spike run_iss’s args

–c_used

Use C sections when generating code

–small_bss

Sets bss section to 1200 4kb page instead of default

–big_bss

Sets bss section to 3080 4kb pages instead of default

–big_endian, -big_e

Mode for enabling big-endian for cross-compilers and ISS

–more_os_pages

Ask riescued to generate more code and os_stack pages for long tests

–add_gcc_cstdlib_sections

Add a gcc cstdlib section to the test for each library function as GCC likes to do.

–addrgen_limit_indices

Limit addrgen to not generate more than 4 addresses with the same index

–code_offset

Specify code offset where the test code should start. Must be 16-byte aligned. Default: Randomized 0-140h

–randomize_code_location

Randomize the code location in the test. Default: follows .runtime section

–identity_map_code

Identity map all contiguously allocated code sections. Forces VA == PA for these sections.

–repeat_times, -rt

Number of times each discrete test should be run

–selfcheck

Enable selfchecking at the end of each discrete test by compiling in golden data from a run of the test in Whisper

–compiler-include-dir

Directory to add to compiler include search path. Passed through to the compiler with -I.

–log_test_execution

Enable runtime logging of test execution

–private_maps

Setup isolated page map address spaces

–cfile

Use runtime c-files that must be specified with this arg. Can be specified multiple times

–inc_path

Add this include path for c compiler. Can be specified multiple times

–enable_machine_paging

Enable Machine privilege + paging mode for the test. Guest paging mode disabled

–fe_tb, -fe_tb

Special considerations for FE testbench. They really can’t know taken vs not-taken branches. So, jump to passed|failed is same for them. So, making passed=failed label

–wysiwyg

‘What You See Is What You Get mode; no OS code is added, only the test code is executed as it is. Intended for environments not monitoring tohost writes

–linux_mode

Generate riescued OS code and prepare test to run it in the Linux environment. Runs endlessly

–bringup_pagetables

Implies –wysiwyg and –addrgen_limit_indices, but enables switch to super and paging in the loader code

–reserve_partial_phys_memory

By default, Riescue-D will only reserve full physical address size specified by ;page_mapping(pagesize) or ;random_addr(size). If you want Riescued to only reserve 4kb size for all the addresses, use this option

–all_4kb_pages

Ask riescued to generate all 4KB pages

–disallow_mmio

Disallow MMIO in the test

–addrgen_limit_way_predictor_multihit, -ag_limit_wp_multihit

Limit addrgen to not generate address with multi-hit in the way predictor

–deleg_excp_to, -deleg_excp_to

Specify privilege where all traps are handled. Can not be specified with any of –medeleg –mideleg –hedeleg –hideleg. “machine” specifies all traps should be handled in machine mode. “super” delegates all exceptions except ecalls to (hypervisor) supervisor mode.

–switch_to_machine_page, -switch_to_machine_page

Specify the page where the handler will return control after using ecall function 0xf0010001

–switch_to_super_page, -switch_to_super_page

Specify the page where the handler will return control after using ecall function 0xf0010002

–switch_to_user_page, -switch_to_user_page

Specify the page where the handler will return control after using ecall function 0xf0010003

–excp_hooks, -excp_hooks

Insert exception handler hooks. RiescueD will call excp_handler_pre: and excp_handler_post: functions right before entering the exception hndler and after before returning from exception handler respectively

–interrupts_enabled, -ie

(deprecated) Interrupts are enabled by default. Disable with –interrupts_disabled

–interrupts_disabled

Disable interrupts. By default interrupts are enabled in the handler.

–skip_instruction_for_unexpected

Ambigious name - this should be something like ‘ignore unexpected exceptions’.

–setup_pmp

Ask riescued to setup PMP registers

–needs_pma

Indicates if the test wants to enable PMA functionality of Riescue-D

–num_pmas

Number of PMACFG registers implemented. Default is 16. Changing this number requires an update in the whisper_config.json

–csr_init

Initialize a CSR with a value. Format: ‘csr_name=value’ or ‘csr_number=value’. Can be specified multiple times. Example: –csr_init mstatus=0x8000 –csr_init 0x300=0x1

–csr_init_mask

Initialize a CSR using read-modify-write with a mask. Format: ‘csr_name=mask=value’ or ‘csr_number=mask=value’. Can be specified multiple times. Example: –csr_init_mask mstatus=0x8000=0x8000

–no_random_csr_reads, -no_random_csr_reads

Disable random CSR read randomization that happens in the OS scheduler code

–max_random_csr_reads, -max_random_csr_read

Maximum number of CSRs read to inject for the randomization. Default: 16. Minimum: 3.

–random_machine_csr_list, -random_machine_csr_list

List csr name that the CSR read randomization logic must include when OS is in machine mode. Specify list this: –random_machine_csr_list mstatus,mcause FIXME: use choices

–random_supervisor_csr_list, -random_supervisor_csr_list

List csr name that the CSR read randomization logic must include when OS is in supervisor/machine mode. Specify list this: –random_supervisor_csr_list sstatus,scause

–random_user_csr_list, -random_user_csr_list

List csr name that the CSR read randomization logic must include when OS is in user/supervisor/machine mode. Specify list this: –random_supervisor_csr_list fcsr,time

–medeleg

Override medeleg when –test_env supervisor/user

–mideleg

Override mideleg when –test_env supervisor/user

–hedeleg

Override hedeleg when ‘–test_env supervisor/user’ and ‘–test_env virtualized’ in VS mode OS

–hideleg

Override hideleg when ‘–test_env supervisor/user’ and ‘–test_env virtualized’ in VS mode OS

–menvcfg

Override menvcfg value to write in loader

–henvcfg

Override henvcfg value to write in loader

–senvcfg

Override senvcfg value to write in loader. Default 0x0.

–mstateen

Override mstateen0 value to write in loader. Default is -1 (all bits set).

–hstateen

Override hstateen0 value to write in loader. Default is -1 (all bits set).

–sstateen

Override sstateen0 value to write in loader. Default is -1 (all bits set).

–secure_access_probability, -sap

Probability of secure access in the test. Default is 30%%

–secure_pt_probability

Probability of secure pagetable in the test

–a_d_bit_randomization

Probability of randomizing A and D bits in page table entries (0-100)

–pbmt_ncio_randomization

Probability of randomizing PBMT NC vs IO bits in page table entries (0-100)

–fs_randomization

Probability of randomizing mstatus/sstatus/vsstatus FS field (0-100). Only when F/D extension is supported.

–fs_randomization_values

Comma-separated list of FS values to randomize (0-3). 0=Off, 1=Initial, 2=Clean, 3=Dirty. Default: 2. E.g. 1,2 for Initial and Clean.

–vs_randomization

Probability of randomizing mstatus/sstatus/vsstatus VS field (0-100). Only when V extension is supported.

–vs_randomization_values

Comma-separated list of VS values to randomize (0-3). 0=Off, 1=Initial, 2=Clean, 3=Dirty. Default: 2.

–logger_level

Logger level

–logger_file

Logger file path

–logger_no_tee

Do not tee log output. Default command line behavior is to tee to stderr

–logger_no_timestamp

Do not include timestamp in log messages

–logger_max_file_size_gb

Max size of log file in GB. Throws error if exceeded

–logger_verbose

Enable verbose logging (filename, function name)

–iss

Instruction set simulator to use

–compiler_path

Path to compiler executable. If not provided, will use RV_GCC environment variable

–compiler_opts

Additional args to pass to the compiler

–compiler_march

march to pass to compiler. If not provided and config.json is available, will be generated from enabled features

–compiler_mabi

ABI to use for compiler. Leave unset to use compiler default

–test_equates, -teq

Variables to have compiler define with -Dkey=value. e.g –test_equates EQUATE1=0x1 Can use multiple times, e.g. -teq A=1 -teq B=2.

–disassembler_path

Path to disassembler executable. If not provided, will use RV_OBJDUMP environment variable

–disassembler_opts

Additional args to pass to the disassembler

–spike_path

Path to spike executable

–spike_args

Additional spike args to pass to the simulator

–spike_isa

ISA string to pass to ISS –isa

–third_party_spike

Use public version of spike. Default is internal spike

–spike_max_instr

Max instructions to simulate on spike

–whisper_path

Path to Whisper executable. If not provided, will use WHISPER_PATH environment variable

–whisper_args

Additional spike args to pass to the simulator

–whisper_config_json

Relative path to the whisper config json file

–whisper_max_instr

Max instructions to simulate on whisper

–whisper_memory_size

Size of whisper memory

–whisper_dumpmem

Dump memory command to pass to the simulator. Use @ to reference symbols in elf file

–whisper_startpc

Start pc to pass to the simulator

CTK

CTK CLI. Includes flags from Bringup mode, Test Plan mode, FeatMgr, Logger, and individual tool paths.

-h, –help

show this help message and exit

–run_dir, -rd

Run directory where the test will be run

–seed

Seed for the test

–flat

Flat directory structure

–test_count

Number of tests to generate

–json, -js

JSON File specifying the compliance args

–cpuconfig

Path to cpu feature configuration to pass to riescued

–output_file, -o

Output Filename. The output is generated as <output_filename>{.s/.dis/.log/.S}

–default_config, -dcfg

JSON File specifying default configuration

–user_config, -ucfg

JSON File specifying user-defined configuration

–fp_config, -fcfg

JSON File specifying default floating point instruction configuration

–dump_instrs

Switch to dump the instruction fields as JSON

–disable_pass

Disables the second pass for the compliance run

–first_pass_iss

Provide Target ISS for the first pass

–second_pass_iss

Provide Target ISS for the second pass

–rpt_cnt

Each instruction will have rpt_cnt instances in the test

–max_instrs_per_file

Max instrs in the test file during the first pass. Doesn’t include second pass or runtime instructions

–compare_iss

Run second pass testcase on both ISS targets (i.e whisper and spike) and compares the logs

–repeat_runtime, -repeat_runtime

–repeat_times passthrough. Run each discrete test these many times. Only use this with –disable_pass

–output_format, -op_fmt

Format in which output is generated

–load_fp_regs, -lfpr

Switch to load fp regs with load instructions rather than fmv instructions.

–combine_compliance_tests, -cct

When set compliance tests will be combined into a single discrete test per file.

–exclude_instrs, -exclude_instrs

Specify instructions to exclude. e.g.–exclude_instrs “add,sub”

–include_extensions

Specify extensions to include. e.g.–include_extensions “i_ext,m_ext”

–instrs, -instrs

Specify instructions to be run. e.g. –instrs “add,sub”

–groups, -groups

Specify groups to be run. e.g. –groups “rv64i_load_store,rv32f_single_precision_reg_reg”

–rv_zfbfmin_experimental, -rze

Experimental mode for to enable rv_zfbfmin, adds options to riescue-d call

–rv_zvbb_experimental, -rvz

Experimental mode for to enable rv_zvbb, adds options to riescue-d call

–rv_zvfbfmin_experimental, -rvf

Experimental mode for to enable rv_zvfbfmin, adds options to riescue-d call

–rv_zvfbfwma_experimental, -rvw

Experimental mode for to enable rv_zvfbfwma, adds options to riescue-d call

–rv_zvbc_experimental, -rvb

Experimental mode for to enable rv_zvbc, adds options to riescue-d call

–rv_zvkg_experimental, -rvk

Experimental mode for to enable rv_zvkg, adds options to riescue-d call

–rv_zvknhb_experimental, -rvn

Experimental mode for to enable rv_zvknhb, adds options to riescue-d call

–vector_bringup, -vb

Mode for generating special constraints for vector bringup

–experimental_compiler

Path to experimental compiler to pass to RiescueD for *_experimental features. Defaults to EXPERIMENTAL_COMPILER environment variable.

–experimental_objdump

Path to experimental objdump to pass to RiescueD for *_experimental features. Defaults to EXPERIMENTAL_OBJDUMP environment variable.

–fpgen_on

Turn on FPgen, randomly generate floating point numbers using fpgen database. Setting environment variable FPGEN_ENABLED also sets this to true

–fast_fpgen, -ffp

Fpgen returns entries in order (doesn’t count the number of qualified entries)

–privilege_mode

Deprecated argument. Use –test_priv_mode instead.

–isa

ISA to use

–test_plan

Test plan to use

–conf

Path to conf.py file for additional config and hooks.

–tohost_nonzero_terminate, -tnt

Spike option to be forwarded. Ends simulation immediately when tohost becomes nonzero.

–counter_event_path

path to counter event file, used to randomize events in counter files

–max_logger_file_gb

Max size of testlog file in GB

–test_priv_mode

Specify privilege mode for the test to be forced. e.g. –test_priv_mode user. Legal values are: user, super, machine

–test_paging_mode

Specify paging mode for the test to be forced. e.g. –test_paging_mode sv57

–test_paging_g_mode

Specify g-stage paging mode for the test to be forced. e.g. –test_paging_g_mode sv57

–test_env

Specify environment for the test to be forced. e.g. –test_env bare_metal

–test_env_any

Allow test environment to be randomly selected between bare_metal and virtualized if any is specified

–test_secure_mode

Specify secure mode for the test to be forced. e.g. –test_secure_mode random If random or any is selected then the probability of secure mode is 20%%

–supported_priv_modes

Specify privilege modes supported by the platform. e.g. –supported_priv_modes MSU. Default to MSU if not specified

–tohost

Hardcoded address for tohost and HTIF IO section; Leaving blank uses value in memap, if none in memmap puts as variables at end of os_code

–eot_pass_value

Sets the end of test pass value; defaults to 1

–eot_fail_value

Sets the end of test fail value; defaults to 1

–print_rvcp_failed

Print RVCP FAILED message when discrete test fails

–print_rvcp_passed

Print RVCP PASSED message when discrete test passes

–rvmodel_macros

Path to rvmodel_macros.h

–mp

Overrides MP enablement in cpuconfig file or overridden in test file. Legal values are: ‘on’, ‘off’

–mp_mode

Overrides MP mode provided in cpuconfig file or overridden in test file. Legal values are: ‘simultaneous’, ‘parallel’

–parallel_scheduling_mode

Overrides parallel scheduling mode provided in cpuconfig file or overridden in test file. Legal values are: ‘round_robin’, ‘exhaustive’

–num_cpus

Overrides number of CPUs provided in cpuconfig file or overridden in test file. Legal values are positive integers

–single_assembly_file, -saf

Indicates that all assembly is written to a single file. Ignoring this option means writing to a handful of .inc files

–force_alignment

Forces all data and code to be byte-aligned; Removes –misaligned from spike run_iss’s args

–c_used

Use C sections when generating code

–small_bss

Sets bss section to 1200 4kb page instead of default

–big_bss

Sets bss section to 3080 4kb pages instead of default

–big_endian, -big_e

Mode for enabling big-endian for cross-compilers and ISS

–more_os_pages

Ask riescued to generate more code and os_stack pages for long tests

–add_gcc_cstdlib_sections

Add a gcc cstdlib section to the test for each library function as GCC likes to do.

–addrgen_limit_indices

Limit addrgen to not generate more than 4 addresses with the same index

–code_offset

Specify code offset where the test code should start. Must be 16-byte aligned. Default: Randomized 0-140h

–randomize_code_location

Randomize the code location in the test. Default: follows .runtime section

–identity_map_code

Identity map all contiguously allocated code sections. Forces VA == PA for these sections.

–repeat_times, -rt

Number of times each discrete test should be run

–selfcheck

Enable selfchecking at the end of each discrete test by compiling in golden data from a run of the test in Whisper

–compiler-include-dir

Directory to add to compiler include search path. Passed through to the compiler with -I.

–log_test_execution

Enable runtime logging of test execution

–private_maps

Setup isolated page map address spaces

–cfile

Use runtime c-files that must be specified with this arg. Can be specified multiple times

–inc_path

Add this include path for c compiler. Can be specified multiple times

–enable_machine_paging

Enable Machine privilege + paging mode for the test. Guest paging mode disabled

–fe_tb, -fe_tb

Special considerations for FE testbench. They really can’t know taken vs not-taken branches. So, jump to passed|failed is same for them. So, making passed=failed label

–wysiwyg

‘What You See Is What You Get mode; no OS code is added, only the test code is executed as it is. Intended for environments not monitoring tohost writes

–linux_mode

Generate riescued OS code and prepare test to run it in the Linux environment. Runs endlessly

–bringup_pagetables

Implies –wysiwyg and –addrgen_limit_indices, but enables switch to super and paging in the loader code

–reserve_partial_phys_memory

By default, Riescue-D will only reserve full physical address size specified by ;page_mapping(pagesize) or ;random_addr(size). If you want Riescued to only reserve 4kb size for all the addresses, use this option

–all_4kb_pages

Ask riescued to generate all 4KB pages

–disallow_mmio

Disallow MMIO in the test

–addrgen_limit_way_predictor_multihit, -ag_limit_wp_multihit

Limit addrgen to not generate address with multi-hit in the way predictor

–deleg_excp_to, -deleg_excp_to

Specify privilege where all traps are handled. Can not be specified with any of –medeleg –mideleg –hedeleg –hideleg. “machine” specifies all traps should be handled in machine mode. “super” delegates all exceptions except ecalls to (hypervisor) supervisor mode.

–switch_to_machine_page, -switch_to_machine_page

Specify the page where the handler will return control after using ecall function 0xf0010001

–switch_to_super_page, -switch_to_super_page

Specify the page where the handler will return control after using ecall function 0xf0010002

–switch_to_user_page, -switch_to_user_page

Specify the page where the handler will return control after using ecall function 0xf0010003

–excp_hooks, -excp_hooks

Insert exception handler hooks. RiescueD will call excp_handler_pre: and excp_handler_post: functions right before entering the exception hndler and after before returning from exception handler respectively

–interrupts_enabled, -ie

(deprecated) Interrupts are enabled by default. Disable with –interrupts_disabled

–interrupts_disabled

Disable interrupts. By default interrupts are enabled in the handler.

–skip_instruction_for_unexpected

Ambigious name - this should be something like ‘ignore unexpected exceptions’.

–setup_pmp

Ask riescued to setup PMP registers

–needs_pma

Indicates if the test wants to enable PMA functionality of Riescue-D

–num_pmas

Number of PMACFG registers implemented. Default is 16. Changing this number requires an update in the whisper_config.json

–csr_init

Initialize a CSR with a value. Format: ‘csr_name=value’ or ‘csr_number=value’. Can be specified multiple times. Example: –csr_init mstatus=0x8000 –csr_init 0x300=0x1

–csr_init_mask

Initialize a CSR using read-modify-write with a mask. Format: ‘csr_name=mask=value’ or ‘csr_number=mask=value’. Can be specified multiple times. Example: –csr_init_mask mstatus=0x8000=0x8000

–no_random_csr_reads, -no_random_csr_reads

Disable random CSR read randomization that happens in the OS scheduler code

–max_random_csr_reads, -max_random_csr_read

Maximum number of CSRs read to inject for the randomization. Default: 16. Minimum: 3.

–random_machine_csr_list, -random_machine_csr_list

List csr name that the CSR read randomization logic must include when OS is in machine mode. Specify list this: –random_machine_csr_list mstatus,mcause FIXME: use choices

–random_supervisor_csr_list, -random_supervisor_csr_list

List csr name that the CSR read randomization logic must include when OS is in supervisor/machine mode. Specify list this: –random_supervisor_csr_list sstatus,scause

–random_user_csr_list, -random_user_csr_list

List csr name that the CSR read randomization logic must include when OS is in user/supervisor/machine mode. Specify list this: –random_supervisor_csr_list fcsr,time

–medeleg

Override medeleg when –test_env supervisor/user

–mideleg

Override mideleg when –test_env supervisor/user

–hedeleg

Override hedeleg when ‘–test_env supervisor/user’ and ‘–test_env virtualized’ in VS mode OS

–hideleg

Override hideleg when ‘–test_env supervisor/user’ and ‘–test_env virtualized’ in VS mode OS

–menvcfg

Override menvcfg value to write in loader

–henvcfg

Override henvcfg value to write in loader

–senvcfg

Override senvcfg value to write in loader. Default 0x0.

–mstateen

Override mstateen0 value to write in loader. Default is -1 (all bits set).

–hstateen

Override hstateen0 value to write in loader. Default is -1 (all bits set).

–sstateen

Override sstateen0 value to write in loader. Default is -1 (all bits set).

–secure_access_probability, -sap

Probability of secure access in the test. Default is 30%%

–secure_pt_probability

Probability of secure pagetable in the test

–a_d_bit_randomization

Probability of randomizing A and D bits in page table entries (0-100)

–pbmt_ncio_randomization

Probability of randomizing PBMT NC vs IO bits in page table entries (0-100)

–fs_randomization

Probability of randomizing mstatus/sstatus/vsstatus FS field (0-100). Only when F/D extension is supported.

–fs_randomization_values

Comma-separated list of FS values to randomize (0-3). 0=Off, 1=Initial, 2=Clean, 3=Dirty. Default: 2. E.g. 1,2 for Initial and Clean.

–vs_randomization

Probability of randomizing mstatus/sstatus/vsstatus VS field (0-100). Only when V extension is supported.

–vs_randomization_values

Comma-separated list of VS values to randomize (0-3). 0=Off, 1=Initial, 2=Clean, 3=Dirty. Default: 2.

–logger_level

Logger level

–logger_file

Logger file path

–logger_no_tee

Do not tee log output. Default command line behavior is to tee to stderr

–logger_no_timestamp

Do not include timestamp in log messages

–logger_max_file_size_gb

Max size of log file in GB. Throws error if exceeded

–logger_verbose

Enable verbose logging (filename, function name)

–whisper_path

Path to Whisper executable. If not provided, will use WHISPER_PATH environment variable

–whisper_args

Additional spike args to pass to the simulator

–whisper_config_json

Relative path to the whisper config json file

–whisper_max_instr

Max instructions to simulate on whisper

–whisper_memory_size

Size of whisper memory

–whisper_dumpmem

Dump memory command to pass to the simulator. Use @ to reference symbols in elf file

–whisper_startpc

Start pc to pass to the simulator

–spike_path

Path to spike executable

–spike_args

Additional spike args to pass to the simulator

–spike_isa

ISA string to pass to ISS –isa

–third_party_spike

Use public version of spike. Default is internal spike

–spike_max_instr

Max instructions to simulate on spike

–compiler_path

Path to compiler executable. If not provided, will use RV_GCC environment variable

–compiler_opts

Additional args to pass to the compiler

–compiler_march

march to pass to compiler. If not provided and config.json is available, will be generated from enabled features

–compiler_mabi

ABI to use for compiler. Leave unset to use compiler default

–test_equates, -teq

Variables to have compiler define with -Dkey=value. e.g –test_equates EQUATE1=0x1 Can use multiple times, e.g. -teq A=1 -teq B=2.

–disassembler_path

Path to disassembler executable. If not provided, will use RV_OBJDUMP environment variable

–disassembler_opts

Additional args to pass to the disassembler