IP Reference

The JTAG family provides scan and debug access. The cross-trigger family routes events and coordinates debug actions between blocks and chiplets.

1. Component Pages

Table 1. Component Pages
JTAG	JTAG Interface Unit ( architecture, interface)	IEEE 1149.1 primary and secondary TAP controller.
	JTAG PTAP ( architecture, interface)	Primary TAP implementation and instruction decoder.
	JTAG STAP ( architecture, interface)	Secondary TAP for hierarchical multi-chiplet connectivity.
Cross-trigger	Cross-Trigger Network ( architecture, interface, register map)	CTN hub integrating CTMs and CTPs; owns the unified register map.
	Cross-Trigger Port ( architecture, interface)	External pad-ring interface for OCCT cross-chiplet triggering.
	Cross-Trigger Matrix ( architecture, interface)	Configurable N×M routing matrix for internal cross triggers.