List of Tables

Select a table to open its topic. Table numbers are local to each HTML topic; the PDF numbers tables consecutively across the book. Generated register lists, bit layouts, and field tables are included.

AoU Interrupts and Errors

AoU Appendix B. Referenced Documents

OCAH Architecture & Design

Configuration and Reference

Mailbox Unit

eFuse

Entropy Source

I2C Controller

I3C Controller

Key Manager (KM)

Register Field Access Notation

prim_ao222

prim_clock_nand2

prim_flop_3sync_r

prim_flop_3sync_s

prim_flop_3sync

prim_flop_4sync_r

prim_flop_4sync_s

prim_flop_4sync

prim_latch_n

prim_metastab_hardened_dffr

prim_nand4

prim_stdmux2

prim_axi_id_converter

prim_axi_id_prepend_wrap

prim_axi_lite_err_slv

prim_axi_lite_to_apb_single

prim_axi_user_override

prim_axil_access_gate

prim_axil_prot_filter

prim_carry_select_adder

prim_clk_counter_fifo_sync

prim_clk_gater_hysteresis

prim_clkmux4

prim_diff_decode_multi

prim_diff_encode_multi

prim_fifo_sync_parity

prim_jtag_sib_mux_post

prim_jtag_sib_mux_pre

prim_prog_clk_div_posedge

prim_refclk_count_w_cdc

prim_rev_cell

prim_rst_mux2_hf_n

prim_sync_data_autohs

prim_sync3_pulse

tlul_cmd_intg_chk

tlul_data_integ_dec

tlul_data_integ_enc

avsbus_crc3

axi_lite_mailbox_unit

cross_trigger_matrix

cross_trigger_network

cross_trigger_port_core

cross_trigger_port

ctp_edge_detector

ctp_handshake_ctrl

ctp_pulse_stretcher

ctp_synchronizer

drbg_axil64_lane_adapter

drbg_axis_edn_adapter

drbg_csrng_seed_adapter

drbg_edn_axis_adapter

efuse_interface_controller

efuse_program_interface

efuse_read_interface

efuse_shadow_reg_access_control

efuse_token_digest_comparator

efuse_token_digest_sha256

efuse_token_processing

efuse_triple_redundant_comparator

entropy_debug_monitor

entropy_generator_complex

entropy_ring_nand2_wrapper

entropy_ring_oscillator

entropy_ripple_divider

entropy_rosc_tune_fsm

entropy_sampler_clocks

entropy_sha256_whitener

entropy_source_rec_thresh_lut

entropy_source

gpio_model

i2c_bus_monitor

idma_frontend_wrapper

idma_request_manager_wrapper

jtag_3dcr_reg

jtag_byp_reg

jtag_debug_ctrl_reg

jtag_inst_reg

jtag_inv_byp_reg

jtag_jtag2axi_caps_reg

jtag_tmp_status_reg

km_axi_lite_xbar

km_crc_engine

km_drbg_sampler

picorv32_pcpi_crc

system_timer_octs_core

system_timer_octs

telemetry_receiver_wrap

aes_wrapper

hmac_wrapper

kmac_wrapper

sep_crypto_abr_wrapper

sep_crypto_axi_interconnect

sep_crypto_otbn_wrapper

sep_efuse_pkg

sep_isolate_rst_seq

sep_lifecycle_ctrl_pkg

sep_local_axi_xbar_wrapper

sep_local_axi_xbar

sep_pkg

sep_reset_ctrl

sep_rom_interface_shim

sep_sram_interface_shim

sep_system_csr

sep_system_peripherals_xbar_pkg

sep_system_peripherals_xbar_wrapper

sep_system_peripherals_xbar

sep_system_peripherals

sep_tcm_wrapper

sep_wdt_wrap

EICG_wrapper

ext_boot_seq_done_qual

OCAH4CORECluster_ALU

OCAH4CORECluster_AMOALU

OCAH4CORECluster_Arbiter2_Valid_PTWReq

OCAH4CORECluster_Arbiter3_LLWB

OCAH4CORECluster_AsyncQueueSink_DebugInternalBundle

OCAH4CORECluster_AsyncQueueSink_TLBundleA_a9d32s1k1z2u

OCAH4CORECluster_AsyncQueueSink_TLBundleD_a9d32s1k1z2u

OCAH4CORECluster_AsyncQueueSource_DebugInternalBundle

OCAH4CORECluster_AsyncQueueSource_TLBundleA_a9d32s1k1z2u

OCAH4CORECluster_AsyncQueueSource_TLBundleD_a9d32s1k1z2u

OCAH4CORECluster_AsyncResetRegVec_w1_i0

OCAH4CORECluster_AsyncResetRegVec_w16_i4096

OCAH4CORECluster_AsyncResetRegVec_w2_i0

OCAH4CORECluster_AsyncResetRegVec_w328_i0

OCAH4CORECluster_AsyncResetRegVec_w4_i0

OCAH4CORECluster_AsyncResetSynchronizerPrimitiveShiftReg_d3_i0

OCAH4CORECluster_AsyncResetSynchronizerShiftReg_w1_d3_i0_1

OCAH4CORECluster_AsyncResetSynchronizerShiftReg_w1_d3_i0

OCAH4CORECluster_AsyncValidSync

OCAH4CORECluster_Atomics

OCAH4CORECluster_AXI4Buffer

OCAH4CORECluster_AXI4Deinterleaver

OCAH4CORECluster_AXI4Fragmenter

OCAH4CORECluster_AXI4IdIndexer_1

OCAH4CORECluster_AXI4IdIndexer

OCAH4CORECluster_AXI4ToTL

OCAH4CORECluster_AXI4UserYanker_1

OCAH4CORECluster_AXI4UserYanker

OCAH4CORECluster_BankBinder

OCAH4CORECluster_BreakpointUnit

OCAH4CORECluster_BroadcastFilter

OCAH4CORECluster_BTB

OCAH4CORECluster_BundleBridgeNexus_UInt2_4

OCAH4CORECluster_BusErrorUnit

OCAH4CORECluster_CaptureChain_JTAGIdcodeBundle

OCAH4CORECluster_CaptureUpdateChain_DMIAccessCapture_To_DMIAccessUpdate

OCAH4CORECluster_CaptureUpdateChain_DTMInfo_To_DTMInfo

OCAH4CORECluster_CaptureUpdateChain_UInt5_To_UInt5

OCAH4CORECluster_ChipyardPRCICtrlClockSinkDomain

OCAH4CORECluster_CLINT

OCAH4CORECluster_CLINTClockSinkDomain

OCAH4CORECluster_ClockCrossingReg_w21

OCAH4CORECluster_ClockCrossingReg_w43

OCAH4CORECluster_ClockCrossingReg_w55

OCAH4CORECluster_ClockGroupAggregator_allClocks

OCAH4CORECluster_ClockGroupCombiner

OCAH4CORECluster_ClockGroupResetSynchronizer

OCAH4CORECluster_ClockSinkDomain_1

OCAH4CORECluster_ClockSinkDomain_5

OCAH4CORECluster_CoherenceManagerWrapper

OCAH4CORECluster_CompareRecFN

OCAH4CORECluster_CSRFile

OCAH4CORECluster_DCache

OCAH4CORECluster_DCacheDataArray

OCAH4CORECluster_DebugTransportModuleJTAG

OCAH4CORECluster_DigitalTop

OCAH4CORECluster_DivSqrtRawFN_small_e11_s53

OCAH4CORECluster_DivSqrtRawFN_small_e8_s24

OCAH4CORECluster_DivSqrtRecFM_small_e11_s53

OCAH4CORECluster_DivSqrtRecFM_small_e8_s24

OCAH4CORECluster_DivSqrtRecFMToRaw_small_e11_s53

OCAH4CORECluster_DivSqrtRecFMToRaw_small_e8_s24

OCAH4CORECluster_DMIToTL

OCAH4CORECluster_ErrorDeviceWrapper

OCAH4CORECluster_FixedClockBroadcast_2

OCAH4CORECluster_FixedClockBroadcast_34

OCAH4CORECluster_FixedClockBroadcast_4

OCAH4CORECluster_FixedClockBroadcast_5

OCAH4CORECluster_FixedClockBroadcast_6

OCAH4CORECluster_FPToFP

OCAH4CORECluster_FPToInt

OCAH4CORECluster_FPU

OCAH4CORECluster_FPUDecoder

OCAH4CORECluster_FPUFMAPipe_l8_f32

OCAH4CORECluster_FPUFMAPipe_l8_f64

OCAH4CORECluster_FrontBus

OCAH4CORECluster_Frontend

OCAH4CORECluster_HellaCacheArbiter

OCAH4CORECluster_IBuf

OCAH4CORECluster_ICache

OCAH4CORECluster_InferredResetSynchronizerPrimitiveShiftReg_d3_i0

OCAH4CORECluster_INToRecFN_i64_e11_s53

OCAH4CORECluster_INToRecFN_i64_e8_s24

OCAH4CORECluster_IntSyncAsyncCrossingSink_n1x1

OCAH4CORECluster_IntSyncCrossingSource_n1x1

OCAH4CORECluster_IntSyncCrossingSource_n1x2

OCAH4CORECluster_IntSyncCrossingSource_n4x1_Registered

OCAH4CORECluster_IntSyncSyncCrossingSink_n1x1

OCAH4CORECluster_IntSyncSyncCrossingSink_n1x2

OCAH4CORECluster_IntToFP

OCAH4CORECluster_IntXbar_i4_o1

OCAH4CORECluster_IntXbar_i5_o1

OCAH4CORECluster_ITLB

OCAH4CORECluster_JtagBypassChain

OCAH4CORECluster_JtagStateMachine

OCAH4CORECluster_JtagTapController

OCAH4CORECluster_LevelGateway

OCAH4CORECluster_MaxPeriodFibonacciLFSR

OCAH4CORECluster_mem_0

OCAH4CORECluster_MemoryBus

OCAH4CORECluster_mems

OCAH4CORECluster_MulAddRecFNPipe_l2_e11_s53

OCAH4CORECluster_MulAddRecFNPipe_l2_e8_s24

OCAH4CORECluster_MulAddRecFNToRaw_postMul_e11_s53

OCAH4CORECluster_MulAddRecFNToRaw_postMul_e8_s24

OCAH4CORECluster_MulAddRecFNToRaw_preMul_e11_s53

OCAH4CORECluster_MulAddRecFNToRaw_preMul_e8_s24

OCAH4CORECluster_MulDiv

OCAH4CORECluster_NonSyncResetSynchronizerPrimitiveShiftReg_d3

OCAH4CORECluster_OptimizationBarrier_PTE

OCAH4CORECluster_OptimizationBarrier_TLBEntryData

OCAH4CORECluster_OptimizationBarrier_UInt

OCAH4CORECluster_PeripheryBus_cbus

OCAH4CORECluster_PeripheryBus_pbus

OCAH4CORECluster_PLICClockSinkDomain

OCAH4CORECluster_PLICFanIn

OCAH4CORECluster_PlusArgTimeout

OCAH4CORECluster_PMAChecker

OCAH4CORECluster_PMPChecker_s2

OCAH4CORECluster_PMPChecker_s3

OCAH4CORECluster_ProbePicker

OCAH4CORECluster_PTW

OCAH4CORECluster_Queue1_AXI4BundleAR

OCAH4CORECluster_Queue1_AXI4BundleARW

OCAH4CORECluster_Queue1_AXI4BundleAW

OCAH4CORECluster_Queue1_AXI4BundleB

OCAH4CORECluster_Queue1_AXI4BundleR

OCAH4CORECluster_Queue1_AXI4BundleW

OCAH4CORECluster_Queue1_RegMapperInput_i23_m8

OCAH4CORECluster_Queue1_TLBundleA_a32d64s9k1z4u

OCAH4CORECluster_Queue1_TLBundleA_a56d64s5k2z4c

OCAH4CORECluster_Queue16_TLBundleA_a32d64s11k1z3u

OCAH4CORECluster_Queue16_TLBundleD_a32d64s11k1z3u

OCAH4CORECluster_Queue2_AXI4BundleAR

OCAH4CORECluster_Queue2_AXI4BundleAW

OCAH4CORECluster_Queue2_AXI4BundleB

OCAH4CORECluster_Queue2_AXI4BundleR

OCAH4CORECluster_Queue2_AXI4BundleW

OCAH4CORECluster_Queue2_BundleMap

OCAH4CORECluster_Queue2_TLBundleA_a32d64s11k1z3u

OCAH4CORECluster_Queue2_TLBundleA_a32d64s9k1z3u

OCAH4CORECluster_Queue2_TLBundleA_a32d64s9k1z4u

OCAH4CORECluster_Queue2_TLBundleA_a56d64s4k2z4u

OCAH4CORECluster_Queue2_TLBundleA_a56d64s6k2z4c

OCAH4CORECluster_Queue2_TLBundleB_a56d64s6k2z4c

OCAH4CORECluster_Queue2_TLBundleC_a56d64s6k2z4c

OCAH4CORECluster_Queue2_TLBundleD_a32d64s11k1z3u

OCAH4CORECluster_Queue2_TLBundleD_a32d64s9k1z3u

OCAH4CORECluster_Queue2_TLBundleD_a32d64s9k1z4u

OCAH4CORECluster_Queue2_TLBundleD_a56d64s4k2z4u

OCAH4CORECluster_Queue2_TLBundleD_a56d64s6k2z4c

OCAH4CORECluster_Queue2_TLBundleD_a56d8s1k2z4u

OCAH4CORECluster_Queue2_TLBundleE_a56d64s6k2z4c

OCAH4CORECluster_Queue25_BundleMap

OCAH4CORECluster_Queue26_BundleMap

OCAH4CORECluster_Queue3_BundleMap

OCAH4CORECluster_Queue4_BundleMap

OCAH4CORECluster_Queue8_AXI4BundleR

OCAH4CORECluster_Queue8_TLBroadcastData

OCAH4CORECluster_Queue9_BundleMap

OCAH4CORECluster_ram_16x125

OCAH4CORECluster_ram_16x85

OCAH4CORECluster_ram_25x15

OCAH4CORECluster_ram_26x15

OCAH4CORECluster_ram_2x10

OCAH4CORECluster_ram_2x119

OCAH4CORECluster_ram_2x124

OCAH4CORECluster_ram_2x125

OCAH4CORECluster_ram_2x136

OCAH4CORECluster_ram_2x145

OCAH4CORECluster_ram_2x15

OCAH4CORECluster_ram_2x150

OCAH4CORECluster_ram_2x5

OCAH4CORECluster_ram_2x68

OCAH4CORECluster_ram_2x70

OCAH4CORECluster_ram_2x73

OCAH4CORECluster_ram_2x77

OCAH4CORECluster_ram_2x83

OCAH4CORECluster_ram_2x84

OCAH4CORECluster_ram_2x85

OCAH4CORECluster_ram_2x86

OCAH4CORECluster_ram_3x15

OCAH4CORECluster_ram_4x8

OCAH4CORECluster_ram_8x72

OCAH4CORECluster_ram_8x85

OCAH4CORECluster_ram_9x15

OCAH4CORECluster_ram_sink_2x2

OCAH4CORECluster_RecFNToIN_e11_s53_i32

OCAH4CORECluster_RecFNToIN_e11_s53_i64

OCAH4CORECluster_RecFNToRecFN

OCAH4CORECluster_regfile_32x65

OCAH4CORECluster_Repeater_TLBundleA_a32d64s11k1z3u

OCAH4CORECluster_Repeater_TLBundleA_a32d64s9k1z3u

OCAH4CORECluster_Repeater_TLBundleD_a56d64s1k2z4u

OCAH4CORECluster_ResetCatchAndSync_d3

OCAH4CORECluster_ResetSynchronizerShiftReg_w1_d3_i0

OCAH4CORECluster_rf_31x64

OCAH4CORECluster_Rocket

OCAH4CORECluster_rockettile_dcache_data_arrays_0_ext

OCAH4CORECluster_rockettile_dcache_data_arrays_0

OCAH4CORECluster_rockettile_dcache_tag_array

OCAH4CORECluster_rockettile_icache_data_arrays_0

OCAH4CORECluster_rockettile_icache_data_arrays_1

OCAH4CORECluster_rockettile_icache_tag_array

OCAH4CORECluster_RocketTile

OCAH4CORECluster_ROMClockSinkDomain

OCAH4CORECluster_RoundAnyRawFNToRecFN_ie11_is53_oe8_os24

OCAH4CORECluster_RoundAnyRawFNToRecFN_ie11_is55_oe11_os53

OCAH4CORECluster_RoundAnyRawFNToRecFN_ie7_is64_oe11_os53

OCAH4CORECluster_RoundAnyRawFNToRecFN_ie7_is64_oe8_os24

OCAH4CORECluster_RoundAnyRawFNToRecFN_ie8_is26_oe8_os24

OCAH4CORECluster_RoundRawFNToRecFN_e11_s53

OCAH4CORECluster_RoundRawFNToRecFN_e8_s24

OCAH4CORECluster_RVCExpander

OCAH4CORECluster_SBToTL

OCAH4CORECluster_ShiftQueue

OCAH4CORECluster_SynchronizerShiftReg_w1_d3

OCAH4CORECluster_SynchronizerShiftReg_w328_d3

OCAH4CORECluster_SystemBus

OCAH4CORECluster_table_512x1

OCAH4CORECluster_TilePRCIDomain

OCAH4CORECluster_TLAsyncCrossingSink_a9d32s1k1z2u

OCAH4CORECluster_TLAsyncCrossingSource_a9d32s1k1z2u

OCAH4CORECluster_TLAtomicAutomata_cbus

OCAH4CORECluster_TLAtomicAutomata_pbus

OCAH4CORECluster_TLBroadcast

OCAH4CORECluster_TLBroadcastTracker_1

OCAH4CORECluster_TLBroadcastTracker_2

OCAH4CORECluster_TLBroadcastTracker_3

OCAH4CORECluster_TLBroadcastTracker

OCAH4CORECluster_TLBuffer_a32d64s11k1z3u_1

OCAH4CORECluster_TLBuffer_a32d64s11k1z3u_33

OCAH4CORECluster_TLBuffer_a32d64s9k1z3u

OCAH4CORECluster_TLBuffer_a32d64s9k1z4u

OCAH4CORECluster_TLBuffer_a56d64s4k2z4u

OCAH4CORECluster_TLBuffer_a56d64s6k2z4c

OCAH4CORECluster_TLBusBypass

OCAH4CORECluster_TLBusBypassBar

OCAH4CORECluster_TLDebugModuleInner

OCAH4CORECluster_TLDebugModuleInnerAsync

OCAH4CORECluster_TLDebugModuleOuter

OCAH4CORECluster_TLError_1

OCAH4CORECluster_TLError

OCAH4CORECluster_TLFIFOFixer_1

OCAH4CORECluster_TLFIFOFixer_2

OCAH4CORECluster_TLFIFOFixer_3

OCAH4CORECluster_TLFIFOFixer

OCAH4CORECluster_TLFragmenter_14

OCAH4CORECluster_TLFragmenter_5

OCAH4CORECluster_TLFragmenter_7

OCAH4CORECluster_TLFragmenter_CLINT

OCAH4CORECluster_TLFragmenter_PLIC

OCAH4CORECluster_TLFragmenter

OCAH4CORECluster_TLInterconnectCoupler_cbus_to_clint

OCAH4CORECluster_TLInterconnectCoupler_cbus_to_debug

OCAH4CORECluster_TLInterconnectCoupler_cbus_to_plic

OCAH4CORECluster_TLInterconnectCoupler_fbus_from_debug_sb

OCAH4CORECluster_TLInterconnectCoupler_fbus_from_port_named_slave_port_axi4

OCAH4CORECluster_TLInterconnectCoupler_mbus_to_rom

OCAH4CORECluster_TLInterconnectCoupler_pbus_to_device_named_wdt_0

OCAH4CORECluster_TLInterconnectCoupler_pbus_to_device_named_wdt_1

OCAH4CORECluster_TLInterconnectCoupler_pbus_to_device_named_wdt_2

OCAH4CORECluster_TLInterconnectCoupler_pbus_to_device_named_wdt_3

OCAH4CORECluster_TLInterconnectCoupler_sbus_to_port_named_mmio_port_axi4

OCAH4CORECluster_TLPLIC

OCAH4CORECluster_TLRAM

OCAH4CORECluster_TLToAXI4

OCAH4CORECluster_TLWDT

OCAH4CORECluster_TLWidthWidget1

OCAH4CORECluster_TLXbar_cbus_out_i1_o9_a32d64s9k1z4u

OCAH4CORECluster_TLXbar_fbus_i2_o1_a56d64s5k2z4u

OCAH4CORECluster_TLXbar_i1_o2_a9d32s1k1z2u

OCAH4CORECluster_TLXbar_MasterXbar_RocketTile_i2_o1_a56d64s6k2z4c

OCAH4CORECluster_TLXbar_mbus_i1_o33_a32d64s11k1z3u

OCAH4CORECluster_TLXbar_pbus_out_i1_o4_a32d64s9k1z3u

OCAH4CORECluster_TLXbar_sbus_i5_o3_a56d64s9k2z4c

OCAH4CORECluster_TTTLDebugModule

OCAH4CORECluster_TTTLDebugModuleOuterAsync

OCAH4CORECluster_WatchdogTimer

smc_4core_cpu

smc_alias_remap_wrap

smc_base_config_wrap

smc_cool_reset_wrap

smc_data_accelerator_wrap

smc_dfx_ctrl_status_wrap

smc_efuse_wrapper

smc_internal_axi_lite_xbar

smc_local_fabric

smc_local_xbar_pkg

smc_local_xbar

smc_padring_pkg

smc_periph_axi_lite_xbar

smc_pkg

smc_reset_ctrl

smc_reset_sync

smc_reset_unit

smc_subsystem_resets

smc_version_id_wrap

smu_axi_xbar

CPU

OTP Fuse Controller

TRNG and DRBG

CPU

Design-for-Debug (DFD) and Core Logic Analyzer (CLA)

Direct Memory Access (DMA) Engine

Memory Map and Register Reference

Peripherals