sep_efuse_wrapper

Wrap efuse_interface_controller with SEP datapath conversion, JTAG policy, and secure test mode.

Downsizes the functional 64-bit AXI4 slave to 32-bit, converts it to AXI4-Lite, and muxes it with the Key Manager AXI-Lite path into the eFuse controller register port. The controller's shim CSR port leaves through an axi_cut. In a restricted state (PROD / RMA_SiP, or an LC-state differential-decode integrity error), JTAG accesses outside the MMR / token register space receive DECERR with read data 0xBADCAB1E; the MMR space stays accessible for RMA_SiP token programming. secure_tm_req_i is latched into secure_tm_o on the second clock edge after rst_ni release when security is disabled, and otherwise on the rising edge of fuse sense done.

Parameters

Table 1. Parameters
NameTypeDefaultDescription
SEP_SEC_DISABLE_TOKENbit [255:0]256'b0Netlist-embedded secure-disable token digest; replace at synthesis.

Ports

Table 2. Ports
NameDirectionTypeDescription
clk_iinputlogicSystem clock.
rst_niinputlogicActive-low reset.
test_en_iinputlogicDFT test-enable (scan-enable).
scan_rst_niinputlogicDFT scan reset, active-low; bypasses the reset synchronizer.
secure_tm_req_iinputlogicSecure test mode request strap, latched into secure_tm_o.
ext_boot_seq_done_iinputlogicIntegration boot-sequence completion (memory repair and SMC straps); gates release of sep_intermediate_reset_no.
security_disable_ooutputlogicSecurity-disable status from eFuse token processing, active-high.
lc_state_ooutputlogic [2*sep_pkg::LcStateBitWidth-1:0]Differentially encoded lifecycle state from the eFuse shadow registers.
shadow_regs_ooutputsep_efuse_pkg::efuse_map_teFuse shadow register contents; secret fields read as zero in secure test mode.
fuse_sense_done_ooutputlogicHigh once the shadow registers have been loaded from the fuses.
secure_tm_ooutputlogicLatched secure test mode, active-high; captured on the second clock edge after rst_ni release when security is disabled, otherwise on the rising edge of fuse sense done.
axil_sep_otp_jtag_req_iinputsep_efuse_pkg::efuse_axil_req_tOTP debug AXI-Lite manager interface, filtered by the lifecycle JTAG policy.
axil_sep_otp_jtag_resp_ooutputsep_efuse_pkg::efuse_axil_resp_tResponse to the OTP debug manager; DECERR for accesses the JTAG policy blocks.
km_efuse_axil_req_iinputsep_efuse_pkg::efuse_axil_req_tKey Manager AXI-Lite manager interface, muxed with the functional path.
km_efuse_axil_resp_ooutputsep_efuse_pkg::efuse_axil_resp_tResponse from the eFuse controller to the Key Manager.
sep_efuse_axi_req_iinputsep_pkg::sep_crypto_axi_req_tFunctional 64-bit AXI4 slave; in sep_crypto, the merged crypto eFuse and eFuse shim CSR legs.
sep_efuse_axi_resp_ooutputsep_pkg::sep_crypto_axi_resp_tResponse on the functional AXI4 slave.
efuse_bank_ctrl_req_ooutputsep_efuse_pkg::efuse_axil_req_teFuse controller AXI-Lite requests to the eFuse shim CSRs.
efuse_bank_ctrl_resp_iinputsep_efuse_pkg::efuse_axil_resp_tResponse from the eFuse shim CSRs.
efuse_shim_command_req_ooutputsep_efuse_pkg::fuse_command_req_teFuse read and program commands on the custom shim command interface.
efuse_shim_command_resp_iinputsep_efuse_pkg::fuse_command_resp_tShim response to the eFuse commands.
sep_intermediate_reset_nooutputlogicActive-low SEP reset, synchronized to clk_i and released once fuse sense and the external boot sequence are done; to sep_reset_ctrl before the JTAG override.
sep_efuse_debug_ooutputlogic [9:0]eFuse controller debug flags: [0] shadow write locked, [1] shadow read locked, [2] program locked, [3] read locked, [4] write set-only, [5] LC-state access, [6] read timeout, [7] program timeout, [8] request error, [9] secure TM blocked.
sep_efuse_token_match_sip_debug_ooutputlogic [5:0]RMA SiP token match status code; 6'b010101 indicates a match.
sep_efuse_token_match_chiplet_debug_ooutputlogic [5:0]RMA chiplet token match status code; 6'b010101 indicates a match.
locked_field_access_interrupt_ooutputlogicInterrupt raised when an access targets a locked eFuse field.
token_match_fault_ooutputlogicToken Comparator Redundancy Fault Interrupt.