Threat Model

The SEP threat model considers remote software attacks, physical attacks and supply-chain attacks. These categories describe the threats considered; the explicit limits of protection are listed below.

Software attacks apply across deployments and are the primary attack vector for data center implementations. Physical attacks are localized and require close proximity; they are relevant to automotive and robotics applications. Supply-chain attacks involve changes to the design, production or provisioning of chips.

1. Software Attacks

  • Malicious firmware modification during boot, overlay or application loading, or updates.

  • Modification or exfiltration of private data, such as ML model weights and cryptographic keys.

  • Forged attestation that mimics legitimate device behavior.

2. Physical Attacks

The model assumes that an attacker has full visibility of SRAM and OTP data state.

Physical threats considered include:

  • Fault injection to bypass security checks, including clock and voltage glitching, laser and electromagnetic (EM) energy injection, and thermal gradients. The model also groups logically induced faults, such as Row Hammer DRAM attacks, in this category.

  • Differential cryptanalysis for key recovery, and side-channel attacks to extract keys or other secret data.

  • Hardware probing to observe or control data within a chiplet or in communication between chiplets.

3. Supply-Chain Attacks

  • Insider modification of the design to disable or weaken security features or insert backdoors, and theft of hardware secrets such as security tokens.

  • Modification of IC design masks to change behavior or insert trojans. For example, modified BL0 boot ROM contents could disable secure boot.

  • Corruption of fuse provisioning to enable or disable features without authorization or leak device-unique secrets.

4. Limits of Protection

SEP does not explicitly protect against the following threats, even though some appear in the categories above:

  • Hardware probing of communications between chiplets inside the package.

  • Hardware probing of chiplets inside the package and certain physical attacks, such as bias fault injection.

  • Thermal gradients used to influence the entropy source or induce timing faults.

  • Supply-chain attacks.