i3c_wrapper

Wrap one I3C core with AXI-Lite CSRs and exported DAT/DCT/RLT memories.

Adapted from i3c-core/src/i3c_wrapper.sv and maintained in-tree for the full-AXI4 core with open-drain SCL. Each AXI-Lite access reaches the core as a single-beat AXI4 burst with ID and user zero. SCL is open-drain: scl_o is tied low and scl_oe_o pulls the line; SDA drives through sda_oe_o in push-pull mode or when low. DUMMY_PARAM exists only for trailing-comma handling in the parameter list. The DAT, DCT, and RLT memory ports require the CONTROLLER_SUPPORT macro, since the core declares them only when it is defined.

Parameters

Table 1. Parameters
Name	Type	Default	Description
`AXI_LITE_DATA_WIDTH`	`int unsigned`	`32`	Data width of the AXI-Lite CSR port; also sets the beat size given to the core.
`AXI_LITE_ADDR_WIDTH`	`int unsigned`	`32`	AXI-Lite address width.
`DAT_AW`	`int unsigned`	`i3c_pkg::DatAw`	DAT memory address width.
`DCT_AW`	`int unsigned`	`i3c_pkg::DctAw`	DCT memory address width.
`CSR_ADDR_WIDTH`	`int unsigned`	`I3CCSR_pkg::I3CCSR_MIN_ADDR_WIDTH`	CSR address width.
`CSR_DATA_WIDTH`	`int unsigned`	`I3CCSR_pkg::I3CCSR_DATA_WIDTH`	Data width of the I3C core's internal CSR interface.
`DUMMY_PARAM`	`int unsigned`	`0`	Trailing-comma placeholder.

Ports

Table 2. Ports
Name	Direction	Type	Description
`clk_i`	input		System clock.
`rst_ni`	input		Async reset, active-low.
`awvalid_i`	input	`logic`	Write-address valid.
`awready_o`	output	`logic`	Write-address ready.
`awaddr_i`	input	`logic [AXI_LITE_ADDR_WIDTH-1:0]`	Write byte address into the I3C core's CSR space.
`awprot_i`	input	`logic [2:0]`	Write-address protection; not used.
`wvalid_i`	input	`logic`	Write-data valid.
`wready_o`	output	`logic`	Write-data ready.
`wdata_i`	input	`logic [AXI_LITE_DATA_WIDTH-1:0]`	Write data.
`wstrb_i`	input	`logic [AXI_LITE_DATA_WIDTH/8-1:0]`	Write strobe.
`bvalid_o`	output	`logic`	Write-response valid.
`bready_i`	input	`logic`	Write-response ready.
`bresp_o`	output	`logic [1:0]`	Write response.
`arvalid_i`	input	`logic`	Read-address valid.
`arready_o`	output	`logic`	Read-address ready.
`araddr_i`	input	`logic [AXI_LITE_ADDR_WIDTH-1:0]`	Read address.
`arprot_i`	input	`logic [2:0]`	Read-address protection; not used.
`rvalid_o`	output	`logic`	Read-data valid.
`rready_i`	input	`logic`	Read-data ready.
`rdata_o`	output	`logic [AXI_LITE_DATA_WIDTH-1:0]`	Read data.
`rresp_o`	output	`logic [1:0]`	Read response.
`scl_i`	input	`logic`	SCL pad input, passed straight to the core.
`sda_i`	input	`logic`	SDA pad input, passed straight to the core.
`scl_o`	output	`logic`	SCL pad output, tied low; scl_oe_o controls the line.
`sda_o`	output	`logic`	SDA bus level from the core; the pad drives it while sda_oe_o is high.
`scl_oe_o`	output	`logic`	SCL output enable, high while the core pulls SCL low.
`sda_oe_o`	output	`logic`	SDA output enable, high in push-pull mode or while sda_o is low.
`sel_od_pp_o`	output	`logic`	Driver mode from the core: 0 open-drain, 1 push-pull.
`recovery_payload_available_o`	output	`logic`	High when the recovery handler has a payload available for the recovery agent.
`recovery_image_activated_o`	output	`logic`	High while RECOVERY_CTRL.ACTIVATE_REC_IMG holds the activate-image value 0x0F.
`peripheral_reset_o`	output	`logic`	Set on a target reset pattern selecting peripheral reset; cleared by peripheral_reset_done_i.
`peripheral_reset_done_i`	input	`logic`	Acknowledges peripheral_reset_o and clears it.
`escalated_reset_o`	output	`logic`	Set on an escalated target reset pattern; stays high until rst_ni.
`irq_o`	output		OR of the core's controller, target transaction and recovery interrupts.
`dat_mem_src_i`	input	`i3c_pkg::dat_mem_src_t`	DAT memory read data; requires CONTROLLER_SUPPORT.
`dat_mem_sink_o`	output	`i3c_pkg::dat_mem_sink_t`	DAT memory request; requires CONTROLLER_SUPPORT.
`dct_mem_src_i`	input	`i3c_pkg::dct_mem_src_t`	DCT memory read data; requires CONTROLLER_SUPPORT.
`dct_mem_sink_o`	output	`i3c_pkg::dct_mem_sink_t`	DCT memory request; requires CONTROLLER_SUPPORT.
`rlt_mem_src_i`	input	`i3c_pkg::rlt_mem_src_t`	Reverse-lookup table memory read data; requires CONTROLLER_SUPPORT.
`rlt_mem_sink_o`	output	`i3c_pkg::rlt_mem_sink_t`	Reverse-lookup table memory request; requires CONTROLLER_SUPPORT.