prim_rev_cell

Fan constant straps and a pass-through data bus.

Drive every bit of lo_o from src_low_i and every bit of hi_o from src_high_i, and copy in_i to out_o. Use this to build netlist-visible constant and revision straps.

Ports

Table 1. Ports
Name	Direction	Type	Description
`lo_o`	output	`logic [7:0]`	All bits tied to src_low_i.
`hi_o`	output	`logic [7:0]`	All bits tied to src_high_i.
`in_i`	input	`logic [7:0]`	Pass-through data into out_o.
`out_o`	output	`logic [7:0]`	Copy of in_i.
`src_low_i`	input	`logic`	Constant sourced onto lo_o.
`src_high_i`	input	`logic`	Constant sourced onto hi_o.