OCAH4CORECluster_InferredResetSynchronizerPrimitiveShiftReg_d3_i0

Replace the Chipyard inferred-reset shift-register black box.

Substitutes an OCAH synchronizer for the generated inferred reset primitive. Three flops synchronize io_d into the local clock domain; reset clears them asynchronously and also forces io_q low combinationally.

Ports

Table 1. Ports
Name	Direction	Description
`clock`	input	Destination clock for the three synchronizer flops.
`reset`	input	Active-high reset; asynchronously clears the synchronizer flops and forces io_q low.
`io_d`	input	Data bit to synchronize into the clock domain.
`io_q`	output	Synchronized data bit, held low while reset is high.