OCAH4CORECluster_ResetCatchAndSync_d3

Generated by CIRCT.

Ports

Table 1. Ports
Name	Direction	Description
`clock`	input	@[generators/rocket-chip/src/main/scala/util/ResetCatchAndSync.scala:13:7]
`reset`	input	@[generators/rocket-chip/src/main/scala/util/ResetCatchAndSync.scala:13:7]
`io_sync_reset`	output	@[generators/rocket-chip/src/main/scala/util/ResetCatchAndSync.scala:17:14]