uart_16550_pkg

reg_addr_t

Alias for logic [RegAddrWidth-1:0]

reg_data_t

Alias for logic [RegDataWidth-1:0]

reg_strb_t

Alias for logic [RegStrbWidth-1:0]

axil_aw_chan_t

Packed struct

Table 1. axil_aw_chan_t

Field	Type	Description
addr	reg_addr_t
prot	axi_pkg::prot_t

axil_w_chan_t

Packed struct

Table 2. axil_w_chan_t

Field	Type	Description
data	reg_data_t
strb	reg_strb_t

axil_b_chan_t

Packed struct

Table 3. axil_b_chan_t

Field	Type	Description
resp	axi_pkg::resp_t

axil_ar_chan_t

Packed struct

Table 4. axil_ar_chan_t

Field	Type	Description
addr	reg_addr_t
prot	axi_pkg::prot_t

axil_r_chan_t

Packed struct

Table 5. axil_r_chan_t

Field	Type	Description
data	reg_data_t
resp	axi_pkg::resp_t

axil_req_t

Packed struct

Table 6. axil_req_t

Field	Type	Description
aw	axil_aw_chan_t
aw_valid	logic
w	axil_w_chan_t
w_valid	logic
b_ready	logic
ar	axil_ar_chan_t
ar_valid	logic
r_ready	logic

axil_resp_t

Packed struct

Table 7. axil_resp_t

Field	Type	Description
aw_ready	logic
w_ready	logic
b	axil_b_chan_t
b_valid	logic
ar_ready	logic
r	axil_r_chan_t
r_valid	logic

uart_16550_reg_map_e

Enum (logic [$clog2( NumRegMaps )-1:0])

Table 8. uart_16550_reg_map_e

Value	Number	Description
MAIN_REG_MAP	2'd0
MAIN_WO_REG_MAP	2'd1
DL_REG_MAP	2'd2

uart_16550_reg_in_t

Packed struct

Table 9. uart_16550_reg_in_t

Field	Type	Description
main	uart_16550_main_reg_pkg::uart_16550_main__in_t
main_wo	uart_16550_main_wo_reg_pkg::uart_16550_main_wo__in_t

uart_16550_reg_out_t

Packed struct

Table 10. uart_16550_reg_out_t

Field	Type	Description
main	uart_16550_main_reg_pkg::uart_16550_main__out_t
main_wo	uart_16550_main_wo_reg_pkg::uart_16550_main_wo__out_t
dl	uart_16550_dl_reg_pkg::uart_16550_dl__out_t

tx_rx_e

//////////////////////

Enum (bit)

Table 11. tx_rx_e

Value	Number	Description
RX	1'b0
TX	1'b1

dma_mode_e

1, 4, 8, 14, 32, 64, 128, 256, 512, 1024, 2048, 4096.

Enum (logic)

Table 12. dma_mode_e

Value	Number	Description
DMA_MODE_0	1'b0
DMA_MODE_1	1'b1

interrupt_id_e

////////////////////////

Enum (logic [2:0])

Table 13. interrupt_id_e

Value	Number	Description
FIFO_ERROR	3'b111	Highest priority.
RECEIVER_LINE_STATUS	3'b011
RECEPTION_TIMEOUT	3'b110
RECEIVED_DATA_READY	3'b010
TRANSMITTER_HOLDING_REGISTER_EMPTY	3'b001
MODEM_STATUS	3'b000	Lowest priority.

interrupt_reqs_t

Packed struct

Table 14. interrupt_reqs_t

Field	Type	Description
fifo_error	logic
receiver_line_status	logic
reception_timeout	logic
received_data_ready	logic
transmitter_holding_register_empty	logic
modem_status	logic

get_word_length

Function returning logic [3:0]

Table 15. get_word_length

Name	Direction	Type	Description
word_length_select	input	logic [1:0]

get_frame_length

Function returning logic [3:0]

Table 16. get_frame_length

Name	Direction	Type	Description
tx_or_rx	input	tx_rx_e
word_length	input	logic [3:0]
extra_stop_bit	input	logic
parity_en	input	logic

get_tx_frame_from_data

Function returning logic [11:0]

Table 17. get_tx_frame_from_data

Name	Direction	Type	Description
tx_data	input	logic [7:0]
tx_parity	input	logic
word_length	input	logic [3:0]
parity_en	input	logic

get_rx_data_from_frame

Function returning logic [7:0]

Table 18. get_rx_data_from_frame

Name	Direction	Type	Description
rx_frame	input	logic [11:0]
word_length	input	logic [3:0]
extra_stop_bit	input	logic
parity_en	input	logic

is_pow_of_2

//////////////////////

Function returning bit

Table 19. is_pow_of_2

Name	Direction	Type	Description
num	input	int unsigned

count_ones

Function returning logic [5:0]

Table 20. count_ones

Name	Direction	Type	Description
signal	input	logic [31:0]