km_crc_engine
Compute CRCs one byte per cycle as the shared engine behind the Key Manager PicoRV32 PCPI CRC instructions.
On start_i it latches mode_i, state_i, and data_i, then folds one reflected byte per cycle until the mode's byte count completes. busy_o stays high for the duration; done_o pulses with result_o when the last byte finishes. mode_i selects CRC-32C word, CRC-32C byte, or CRC-8/ROHC.
Ports
| Name | Direction | Type | Description |
|---|---|---|---|
clk_i | input | logic | System clock. |
rst_ni | input | logic | Active-low asynchronous reset. |
start_i | input | logic | Pulse that begins a CRC operation; ignored while busy_o is high. |
mode_i | input | logic [1:0] | CRC mode: 2'b00 CRC-32C word, 2'b01 CRC-32C byte, 2'b10 CRC-8/ROHC; 2'b11 is illegal. |
state_i | input | logic [31:0] | Incoming CRC state / seed, used without inversion; CRC-8 uses bits [7:0]. |
data_i | input | logic [31:0] | Data word, folded least-significant byte first; byte modes use bits [7:0]. |
busy_o | output | logic | High while a CRC operation is in progress. |
done_o | output | logic | One-cycle pulse when result_o is valid. |
result_o | output | logic [31:0] | Final CRC value (CRC-8 zero-extended), held until the next completion. |