OCAH4CORECluster_ram_2x85

Generated by CIRCT.

Ports

Table 1. Ports
NameDirectionTypeDescription
R0_addrinput
R0_eninput
R0_clkinput
R0_dataoutput[84:0]
W0_addrinput
W0_eninput
W0_clkinput
W0_datainput[84:0]