OCAH4CORECluster_MulAddRecFNPipe_l2_e8_s24

Generated by CIRCT.

Ports

Table 1. Ports
NameDirectionTypeDescription
clockinput@[generators/rocket-chip/src/main/scala/tile/FPU.scala:633:7]
resetinput@[generators/rocket-chip/src/main/scala/tile/FPU.scala:633:7]
io_validininput@[generators/rocket-chip/src/main/scala/tile/FPU.scala:638:16]
io_opinput[1:0]@[generators/rocket-chip/src/main/scala/tile/FPU.scala:638:16]
io_ainput[32:0]@[generators/rocket-chip/src/main/scala/tile/FPU.scala:638:16]
io_binput[32:0]@[generators/rocket-chip/src/main/scala/tile/FPU.scala:638:16]
io_cinput[32:0]@[generators/rocket-chip/src/main/scala/tile/FPU.scala:638:16]
io_roundingModeinput[2:0]@[generators/rocket-chip/src/main/scala/tile/FPU.scala:638:16]
io_outoutput[32:0]@[generators/rocket-chip/src/main/scala/tile/FPU.scala:638:16]
io_exceptionFlagsoutput[4:0]@[generators/rocket-chip/src/main/scala/tile/FPU.scala:638:16]
io_validoutoutput@[generators/rocket-chip/src/main/scala/tile/FPU.scala:638:16]