cross_trigger_port_pkg

Define AXI-Lite typedefs and constants for the cross-trigger port.

ctp_axil_req_t and ctp_axil_resp_t type the CSR interface shared with the generated register block.

ctp_mode_e

Operating modes

Enum (logic)

Table 1. ctp_mode_e
ValueNumberDescription
MODE_WIRE_OR1'b0
MODE_POINT_TO_POINT1'b1

ctp_axil_addr_t

AXI-Lite Type Definitions

Alias for logic [AxiLiteAddrWidth-1:0]

ctp_axil_data_t

Alias for logic [AxiLiteDataWidth-1:0]

ctp_axil_strb_t

Alias for logic [AxiLiteStrbWidth-1:0]

ctp_axil_aw_chan_t

Packed struct

Table 2. ctp_axil_aw_chan_t
FieldTypeDescription
addrctp_axil_addr_t
protaxi_pkg::prot_t

ctp_axil_w_chan_t

Packed struct

Table 3. ctp_axil_w_chan_t
FieldTypeDescription
datactp_axil_data_t
strbctp_axil_strb_t

ctp_axil_b_chan_t

Packed struct

Table 4. ctp_axil_b_chan_t
FieldTypeDescription
respaxi_pkg::resp_t

ctp_axil_ar_chan_t

Packed struct

Table 5. ctp_axil_ar_chan_t
FieldTypeDescription
addrctp_axil_addr_t
protaxi_pkg::prot_t

ctp_axil_r_chan_t

Packed struct

Table 6. ctp_axil_r_chan_t
FieldTypeDescription
datactp_axil_data_t
respaxi_pkg::resp_t

ctp_axil_req_t

Packed struct

Table 7. ctp_axil_req_t
FieldTypeDescription
awctp_axil_aw_chan_t
aw_validlogic
wctp_axil_w_chan_t
w_validlogic
b_readylogic
arctp_axil_ar_chan_t
ar_validlogic
r_readylogic

ctp_axil_resp_t

Packed struct

Table 8. ctp_axil_resp_t
FieldTypeDescription
aw_readylogic
w_readylogic
bctp_axil_b_chan_t
b_validlogic
ar_readylogic
rctp_axil_r_chan_t
r_validlogic