smc_base

Integrate the SMC fabric, internal registers and data accelerators; the CPU cluster is outside.

Hosts smc_fabric, smc_internal_regs, smc_data_accelerator_wrap and three AXI hang detectors. Builds the CPU interrupt vector and the 1024-bit debug bus, and exchanges the front-port and MMIO AXI ports with smc_cpu_wrapper at the SMC top. Exports peripheral AXI-Lite, interrupts, and clock-gate enables to the SMC top. NO_ADDR_REMAP removes the M-mode and Xvisor output remap from the output fabric.

Parameters

Table 1. Parameters
Name	Type	Default	Description
`NO_ADDR_REMAP`	`bit`	`1'b1`	Removes the M-mode and Xvisor output remap from the output fabric, leaving only its AXI ID conversion; the input-fabric alias remap is unaffected.
`NumCpuCores`	`int unsigned`	`smc_4core_cpu_pkg::NumCpuCores`	Number of cores in the SMC CPU cluster, from smc_4core_cpu_pkg; sizes the per-core PC and watchdog ports.
`NumCpuInterrupts`	`int unsigned`	`smc_4core_cpu_pkg::NumCpuInterrupts`	Number of interrupt lines into the CPU cluster: external, peripheral, mailbox and internal.
`NumExtInterrupts`	`int unsigned`	`smc_4core_cpu_pkg::NumExtInterrupts`	Number of external interrupt lines on ext_interrupts_i; they occupy the lowest cpu_interrupts_o bits.

Ports

Table 2. Ports
Name	Direction	Type	Description
`clk_smc_i`	input	`logic`	SMC core clock for the fabric, internal registers, data accelerators and interrupt synchronizers.
`clk_ref_i`	input	`logic`	Reference clock for the CLA time-tick generator in the internal register block.
`rst_primary_smc_clk_ni`	input	`logic`	Active-low primary reset in the SMC clock domain for the fabric, internal registers, data accelerators and AXI hang detectors.
`sys_axi_in_req_i`	input	`smc_pkg::smc_sys_in_56_64_6_12_axi_req_t`	Inbound system AXI request; passes the inbound filters to SMC local targets and is watched by a hang detector.
`sys_axi_in_resp_o`	output	`smc_pkg::smc_sys_in_56_64_6_12_axi_resp_t`	Inbound system AXI response; DECERR outside the SMC address window.
`jtag_axi_in_req_i`	input	`smc_pkg::smc_jtag_56_64_2_12_axi_req_t`	JTAG debug AXI request; alias-remapped and routed to SMC local targets or output_axi_req_o.
`jtag_axi_in_resp_o`	output	`smc_pkg::smc_jtag_56_64_2_12_axi_resp_t`	JTAG debug AXI response.
`sep_axi_in_req_i`	input	`smc_pkg::smc_sep_in_56_64_6_12_axi_req_t`	Inbound SEP AXI request, routed to SMC local targets and watched by a hang detector.
`sep_axi_in_resp_o`	output	`smc_pkg::smc_sep_in_56_64_6_12_axi_resp_t`	Inbound SEP AXI response; DECERR outside the SMC address window.
`axil_log_engine_req_i`	input	`smc_pkg::smc_axil_56_64_req_t`	Log engine AXI-Lite request, converted to AXI and routed like jtag_axi_in_req_i.
`axil_log_engine_resp_o`	output	`smc_pkg::smc_axil_56_64_resp_t`	Log engine AXI-Lite response.
`output_axi_req_o`	output	`smc_pkg::smc_sys_out_56_64_8_12_axi_req_t`	Outbound AXI request from the output fabric, after the output remap and outbound filters.
`output_axi_resp_i`	input	`smc_pkg::smc_sys_out_56_64_8_12_axi_resp_t`	Outbound AXI response into the output fabric.
`axil_peripherals_req_o`	output	`smc_pkg::smc_axil_32_32_req_t`	Consolidated AXI-Lite interface for all peripherals request.
`axil_peripherals_resp_i`	input	`smc_pkg::smc_axil_32_32_resp_t`	Consolidated AXI-Lite interface for all peripherals response.
`wdt_first_timeout_o`	output	`logic`	First-stage watchdog timeout: OR of the per-core CPU watchdog timeouts.
`ext_mailbox_interrupts_o`	output	`logic [smc_pkg::NumMailboxes-1:0]`	Outbound interrupts of the internal mailboxes, one per mailbox.
`ext_interrupts_i`	input	`logic [NumExtInterrupts-1:0]`	External interrupts, synchronized to clk_smc_i onto the lowest cpu_interrupts_o bits.
`peripheral_interrupts_i`	input	`logic [31:0]`	Interrupts from the SMC peripherals, placed on cpu_interrupts_o after the external interrupts.
`cpu_axi_front_port_req_o`	output	`smc_pkg::smc_local_32_64_8_12_axi_req_t`	Local-fabric AXI request to smc_cpu_wrapper for the cluster L2 frontend and cpu_ctrl windows.
`cpu_axi_front_port_resp_i`	input	`smc_pkg::smc_local_32_64_8_12_axi_resp_t`	AXI response from smc_cpu_wrapper to the local fabric.
`cpu_interrupts_o`	output	`logic [NumCpuInterrupts-1:0]`	Interrupt vector to the CPU cluster: synchronized external, 32 peripheral, 32 inbound mailbox, then CLA clock stop, CLA, DMA and zeroer; upper bits are zero.
`cpu_axi_mmio_port_req_i`	input	`smc_pkg::smc_cpu_mmio_axi_req_t`	CPU cluster MMIO AXI request from smc_cpu_wrapper; alias-remapped and routed to SMC local targets or output_axi_req_o.
`cpu_axi_mmio_port_resp_o`	output	`smc_pkg::smc_cpu_mmio_axi_resp_t`	CPU cluster MMIO AXI response to smc_cpu_wrapper.
`cpu_wb_reg_pc_i`	input	`logic [NumCpuCores-1:0][57:0]`	Per-core writeback program counter from smc_cpu_wrapper; the low 32 bits go onto the debug bus.
`cpu_wdt_timeout_cluster_i`	input	`logic [NumCpuCores-1:0]`	Per-core first-stage watchdog timeout from smc_cpu_wrapper, ORed onto wdt_first_timeout_o.
`cpu_cluster_ded_i`	input	`logic`	Uncorrectable memory error from the CPU cluster, placed on the debug bus.
`wdt_second_timeout_i`	input	`logic`	Second-stage watchdog timeout from the CPU control block, placed on the debug bus.
`smc_global_base_o`	output	`smc_pkg::smc_axi_addr_t`	SMC global base address from the GLOBAL_BASE register, also used by the fabric address decode.
`smc_region_size_o`	output	`logic [31:0]`	SMC region size from the REGION_SIZE register, also used by the fabric address decode.
`cg_ctrl_i3c_cg_en_o`	output	`logic`	CLOCK_GATE_CONTROL.i3c_cg_en, reset 0, on clk_smc_i; in smc, 1 stops the I3C peripheral clock (it drives the clock-gate cell enable inverted).
`cg_ctrl_avs_cg_en_o`	output	`logic`	CLOCK_GATE_CONTROL.avs_cg_en, reset 0, on clk_smc_i; in smc, 1 stops the AVS bus controller peripheral and reference clocks.
`cg_ctrl_i2c_cg_en_o`	output	`logic`	CLOCK_GATE_CONTROL.i2c_cg_en, reset 0, on clk_smc_i; in smc, 1 stops the I2C peripheral clock.
`cg_ctrl_uart_cg_en_o`	output	`logic`	CLOCK_GATE_CONTROL.uart_cg_en, reset 0, on clk_smc_i; in smc, 1 stops the UART peripheral clock.
`cg_ctrl_tel_cg_en_o`	output	`logic`	CLOCK_GATE_CONTROL.telemetry_cg_en, reset 0, on clk_smc_i; in smc, 1 stops the telemetry unit's gated SMC and telemetry clocks.
`ext_debug_bus_i`	input	`logic [511:0]`	Adopter debug signals, synchronized to clk_smc_i into the upper half of the debug bus; keep each signal 16-bit aligned.
`avsbus_cur_state_debug_i`	input	`logic [16:0]`	AVS bus controller state from the SMC peripherals; the low 16 bits go onto the debug bus.
`system_timer_octs_credits_debug_i`	input	`logic [8:0]`	OCTS credit count from the system timer, placed on the debug bus.
`system_timer_octs_credits_left_debug_i`	input	`logic`	OCTS credits-left status from the system timer, placed on the debug bus.
`telemetry_debug_i`	input	`logic [smc_config_pkg::NumTelemetryReceivers-1:0][3:0]`	Debug status from each telemetry receiver in the SMC peripherals, placed on the debug bus.
`i2c_debug_i`	input	`logic [smc_config_pkg::NumI2c-1:0][3:0]`	Debug status from each I2C controller in the SMC peripherals, placed on the debug bus.
`efuse_debug_i`	input	`logic [9:0]`	eFuse controller debug status from the SMC peripherals, placed on the debug bus.
`cla_ext_action_custom_o`	output	`logic [cla_pkg::CLA_NUMBER_OF_CUSTOM_ACTIONS-1:0]`	Custom CLA external-action outputs from the DFD block, one bit per custom action.
`xtrigger_ss_o`	output	`smc_pkg::xtrigger_t`	Cross-trigger lanes from the SMC core logic analyzer to the subsystem cross-trigger matrix, masked by the clock-halt trigger mask.
`xtrigger_ss_i`	input	`smc_pkg::xtrigger_t`	Cross-trigger lanes from the subsystem cross-trigger matrix into the SMC core logic analyzer.
`tdr_dbg_ctrl_clock_stop_en_i`	input	`logic`	Enables reporting a CLA halt-clock action as a clock stop.
`tdr_dbg_ctrl_clocks_stopped_by_cla_o`	output	`logic`	High while a CLA halt-clock action, enabled by bit 0 of the clock-halt trigger mask and tdr_dbg_ctrl_clock_stop_en_i, requests a clock stop; also CPU internal interrupt 0.
`trace_mem_req_o`	output	`trace_mem_pkg::SinkMemPktIn_s [tn_pkg::TRC_RAM_INSTANCES-1:0]`	Requests from the DFD trace sink to the external trace RAMs, one per RAM instance.
`trace_mem_resp_i`	input	`trace_mem_pkg::SinkMemPktOut_s [tn_pkg::TRC_RAM_INSTANCES-1:0]`	Read data from the external trace RAMs to the DFD trace sink.
`test_en_i`	input	`logic`	DFT test-mode enable, active-high, for the fabric, internal registers and data accelerators.
`scan_rst_ni`	input	`logic`	DFT scan reset, active-low; used only by the DFD block in the internal register block while test_en_i is high.
`mem_repair_done_i`	input	`logic`	Memory repair has finished; reported in the DFX STATUS_SMU register.
`mem_repair_success_i`	input	`logic`	Memory repair succeeded; reported in the DFX STATUS_SMU register.
`mem_repair_abort_i`	input	`logic`	Memory repair was aborted; reported in the DFX STATUS_SMU register.
`mbist_done_i`	input	`logic`	Memory BIST has finished; reported in the DFX STATUS_SMU register.
`mbist_pass_i`	input	`logic`	Memory BIST passed; reported in the DFX STATUS_SMU register.
`mbist_abort_i`	input	`logic`	Memory BIST was aborted; reported in the DFX STATUS_SMU register.
`axi_hang_irq_o`	output	`logic`	OR of the system AXI, SEP AXI and data-accelerator AXI hang detector interrupts, configured through the HANG_DET registers of the base-config block; in smc it becomes peripheral interrupt 30.