OCAH4CORECluster_ram_8x85

Generated by CIRCT.

Ports

Table 1. Ports
Name	Direction	Type	Description
`R0_addr`	input	`[2:0]`
`R0_en`	input
`R0_clk`	input
`R0_data`	output	`[84:0]`
`W0_addr`	input	`[2:0]`
`W0_en`	input
`W0_clk`	input
`W0_data`	input	`[84:0]`