sep_crypto_otbn_wrapper

Wrap the OpenTitan OTBN core with an AXI-Lite CSR bridge and a Key Manager key CSR block.

axi_lite_to_tlul bridges the 32-bit AXI-Lite CSR interface onto the OTBN TL-UL port. The AXI4-Lite key interface terminates in the generated otbn_wrapper_key_reg block, whose two 384-bit key shares and valid bit drive the OTBN keymgr_key_i sideload port. AXCACHE forcing and the AXI 64 to AXI 32 to AXI-Lite 32 conversion chain live in sep_crypto_axi_interconnect. OTBN is built with the flip-flop register file and the MAI stubbed. Its OTP scrambling-key request is answered locally with a fixed key and nonce, acknowledged one cycle after the request; lifecycle escalation and RMA requests are tied off. Exposes RND and URND EDN clients, the done interrupt, two alerts (index 0 fatal, index 1 recoverable), and external IMEM/DMEM SRAM structs from prim_ram_1p_scr_ext. bus_err_o sticks on a TL-UL error response until bus_err_clr_i.

Ports

Table 1. Ports
Name	Direction	Type	Description
`clk_i`	input	`logic`	System clock.
`rst_ni`	input	`logic`	Active-low reset.
`otbn_axil_req_i`	input	`sep_pkg::sep_32_32_axil_req_t`	OTBN CSR request, bridged to the OTBN TL-UL port; the isolated interconnect leg in sep_crypto.
`otbn_axil_resp_o`	output	`sep_pkg::sep_32_32_axil_resp_t`	OTBN CSR response from the TL-UL bridge.
`otbn_key_axil_req_i`	input	`sep_pkg::sep_32_32_axil_req_t`	Key Manager private-bus request to the OTBN key CSR block, which drives the OTBN key sideload interface.
`otbn_key_axil_resp_o`	output	`sep_pkg::sep_32_32_axil_resp_t`	Response from the OTBN key CSR block to the Key Manager.
`edn_rnd_req_o`	output	`edn_pkg::edn_req_t`	OTBN RND entropy request; in sep_crypto, a native EDN client of the crypto EDN adapter.
`edn_rnd_rsp_i`	input	`edn_pkg::edn_rsp_t`	Entropy response for the OTBN RND request.
`edn_urnd_req_o`	output	`edn_pkg::edn_req_t`	OTBN URND reseed request; in sep_crypto, a native EDN client of the crypto EDN adapter.
`edn_urnd_rsp_i`	input	`edn_pkg::edn_rsp_t`	Entropy response for the OTBN URND reseed request.
`intr_done_o`	output	`logic`	OTBN done interrupt.
`alert_rx_i`	input	`prim_alert_pkg::alert_rx_t [1:0]`	Alert receiver handshakes; index 0 fatal (fatal), index 1 recoverable (recov).
`alert_tx_o`	output	`prim_alert_pkg::alert_tx_t [1:0]`	Differential alert senders; index 0 fatal (fatal), index 1 recoverable (recov).
`imem_sram_req_o`	output	`sep_crypto_pkg::sep_crypto_pka_imem_sram_req_t`	OTBN instruction-memory request to the external IMEM SRAM, from the scrambled RAM (prim_ram_1p_scr_ext) inside OTBN.
`imem_sram_rsp_i`	input	`sep_crypto_pkg::sep_crypto_pka_imem_sram_rsp_t`	Read data from the external IMEM SRAM.
`dmem_sram_req_o`	output	`sep_crypto_pkg::sep_crypto_pka_dmem_sram_req_t`	OTBN data-memory request to the external DMEM SRAM, from the scrambled RAM inside OTBN.
`dmem_sram_rsp_i`	input	`sep_crypto_pkg::sep_crypto_pka_dmem_sram_rsp_t`	Read data from the external DMEM SRAM.
`bus_err_o`	output	`logic`	Set by a TL-UL error response on the CSR bridge; sticky until bus_err_clr_i.
`bus_err_clr_i`	input	`logic`	Clears bus_err_o; a fault in the same cycle still sets it. Pulsed by PERIPH_BUS_ERR_CLEAR.otbn in sep.