OCAH4CORECluster_ITLB

Generated by CIRCT.

Ports

Table 1. Ports
Name	Direction	Type	Description
`clock`	input		@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:318:7]
`reset`	input		@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:318:7]
`io_req_ready`	output		@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]
`io_req_valid`	input		@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]
`io_req_bits_vaddr`	input	`[57:0]`	@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]
`io_req_bits_prv`	input	`[1:0]`	@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]
`io_resp_miss`	output		@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]
`io_resp_paddr`	output	`[55:0]`	@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]
`io_resp_pf_inst`	output		@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]
`io_resp_ae_inst`	output		@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]
`io_resp_cacheable`	output		@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]
`io_sfence_valid`	input		@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]
`io_sfence_bits_rs1`	input		@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]
`io_sfence_bits_rs2`	input		@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]
`io_sfence_bits_addr`	input	`[56:0]`	@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]
`io_ptw_req_ready`	input		@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]
`io_ptw_req_valid`	output		@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]
`io_ptw_req_bits_valid`	output		@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]
`io_ptw_req_bits_bits_addr`	output	`[44:0]`	@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]
`io_ptw_req_bits_bits_need_gpa`	output		@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]
`io_ptw_resp_valid`	input		@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]
`io_ptw_resp_bits_ae_ptw`	input		@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]
`io_ptw_resp_bits_ae_final`	input		@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]
`io_ptw_resp_bits_pf`	input		@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]
`io_ptw_resp_bits_gf`	input		@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]
`io_ptw_resp_bits_hr`	input		@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]
`io_ptw_resp_bits_hw`	input		@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]
`io_ptw_resp_bits_hx`	input		@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]
`io_ptw_resp_bits_pte_ppn`	input	`[43:0]`	@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]
`io_ptw_resp_bits_pte_d`	input		@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]
`io_ptw_resp_bits_pte_a`	input		@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]
`io_ptw_resp_bits_pte_g`	input		@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]
`io_ptw_resp_bits_pte_u`	input		@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]
`io_ptw_resp_bits_pte_x`	input		@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]
`io_ptw_resp_bits_pte_w`	input		@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]
`io_ptw_resp_bits_pte_r`	input		@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]
`io_ptw_resp_bits_pte_v`	input		@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]
`io_ptw_resp_bits_level`	input	`[2:0]`	@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]
`io_ptw_resp_bits_homogeneous`	input		@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]
`io_ptw_ptbr_mode`	input	`[3:0]`	@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]
`io_ptw_status_debug`	input		@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]
`io_ptw_pmp_0_cfg_l`	input		@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]
`io_ptw_pmp_0_cfg_a`	input	`[1:0]`	@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]
`io_ptw_pmp_0_cfg_x`	input		@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]
`io_ptw_pmp_0_cfg_w`	input		@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]
`io_ptw_pmp_0_cfg_r`	input		@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]
`io_ptw_pmp_0_addr`	input	`[53:0]`	@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]
`io_ptw_pmp_0_mask`	input	`[55:0]`	@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]
`io_ptw_pmp_1_cfg_l`	input		@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]
`io_ptw_pmp_1_cfg_a`	input	`[1:0]`	@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]
`io_ptw_pmp_1_cfg_x`	input		@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]
`io_ptw_pmp_1_cfg_w`	input		@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]
`io_ptw_pmp_1_cfg_r`	input		@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]
`io_ptw_pmp_1_addr`	input	`[53:0]`	@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]
`io_ptw_pmp_1_mask`	input	`[55:0]`	@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]
`io_ptw_pmp_2_cfg_l`	input		@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]
`io_ptw_pmp_2_cfg_a`	input	`[1:0]`	@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]
`io_ptw_pmp_2_cfg_x`	input		@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]
`io_ptw_pmp_2_cfg_w`	input		@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]
`io_ptw_pmp_2_cfg_r`	input		@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]
`io_ptw_pmp_2_addr`	input	`[53:0]`	@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]
`io_ptw_pmp_2_mask`	input	`[55:0]`	@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]
`io_ptw_pmp_3_cfg_l`	input		@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]
`io_ptw_pmp_3_cfg_a`	input	`[1:0]`	@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]
`io_ptw_pmp_3_cfg_x`	input		@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]
`io_ptw_pmp_3_cfg_w`	input		@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]
`io_ptw_pmp_3_cfg_r`	input		@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]
`io_ptw_pmp_3_addr`	input	`[53:0]`	@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]
`io_ptw_pmp_3_mask`	input	`[55:0]`	@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]
`io_ptw_pmp_4_cfg_l`	input		@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]
`io_ptw_pmp_4_cfg_a`	input	`[1:0]`	@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]
`io_ptw_pmp_4_cfg_x`	input		@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]
`io_ptw_pmp_4_cfg_w`	input		@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]
`io_ptw_pmp_4_cfg_r`	input		@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]
`io_ptw_pmp_4_addr`	input	`[53:0]`	@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]
`io_ptw_pmp_4_mask`	input	`[55:0]`	@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]
`io_ptw_pmp_5_cfg_l`	input		@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]
`io_ptw_pmp_5_cfg_a`	input	`[1:0]`	@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]
`io_ptw_pmp_5_cfg_x`	input		@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]
`io_ptw_pmp_5_cfg_w`	input		@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]
`io_ptw_pmp_5_cfg_r`	input		@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]
`io_ptw_pmp_5_addr`	input	`[53:0]`	@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]
`io_ptw_pmp_5_mask`	input	`[55:0]`	@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]
`io_ptw_pmp_6_cfg_l`	input		@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]
`io_ptw_pmp_6_cfg_a`	input	`[1:0]`	@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]
`io_ptw_pmp_6_cfg_x`	input		@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]
`io_ptw_pmp_6_cfg_w`	input		@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]
`io_ptw_pmp_6_cfg_r`	input		@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]
`io_ptw_pmp_6_addr`	input	`[53:0]`	@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]
`io_ptw_pmp_6_mask`	input	`[55:0]`	@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]
`io_ptw_pmp_7_cfg_l`	input		@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]
`io_ptw_pmp_7_cfg_a`	input	`[1:0]`	@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]
`io_ptw_pmp_7_cfg_x`	input		@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]
`io_ptw_pmp_7_cfg_w`	input		@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]
`io_ptw_pmp_7_cfg_r`	input		@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]
`io_ptw_pmp_7_addr`	input	`[53:0]`	@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]
`io_ptw_pmp_7_mask`	input	`[55:0]`	@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]
`io_kill`	input		@[generators/rocket-chip/src/main/scala/rocket/TLB.scala:320:14]