sep_io

Demux SEP IO register AXI onto SPI and an error slave.

The 64-bit AXI4 slave is downsized to 32 bits and converted to AXI-Lite. The local crossbar sends only the SPI controller register extent here, and that extent goes to a single-chip-select sep_ot_spi_wrap. The error slave answers the beats of a burst that run past the extent: DECERR with read data 0xBADCAB1E on a read, and SLVERR on a write, since the AXI-Lite converter answers every write error with SLVERR. NUM_COMPONENTS sizes the IO fabric. NumSlaves is NUM_COMPONENTS + 1 for the error slave. sep_io_spi_req_o / sep_io_spi_rsp_i carry the SPI pad request/response struct, which also holds the SPI interrupt and DMA trigger.

Parameters

Table 1. Parameters
Name	Type	Default	Description
`NUM_COMPONENTS`	`int unsigned`	`1`	Number of IO fabric components; the decode serves only the SPI controller, so only 1 is supported.
`NumSlaves`	`int unsigned`	`NUM_COMPONENTS + 1`	IO fabric slaves including the error slave.

Ports

Table 2. Ports
Name	Direction	Type	Description
`clk_i`	input	`logic`	System clock.
`rst_ni`	input	`logic`	Active-low reset.
`test_en_i`	input	`logic`	DFT test-enable (scan-enable).
`sep_io_axi_req_i`	input	`sep_pkg::sep_32_64_6_12_axi_req_t`	Full AXI4 slave from local crossbar (register access).
`sep_io_axi_resp_o`	output	`sep_pkg::sep_32_64_6_12_axi_resp_t`	Response to the local crossbar.
`sep_io_spi_req_o`	output	`sep_io_pkg::sep_io_spi_req_t`	SPI pad outputs (clock, chip select, 4 data lanes and their output enables), plus the SPI interrupt and DMA trigger.
`sep_io_spi_rsp_i`	input	`sep_io_pkg::sep_io_spi_rsp_t`	SPI data-lane inputs from the pads.