OCAH4CORECluster_AsyncResetRegVec_w328_i0
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Ports
| Name | Direction | Type | Description |
|---|---|---|---|
clock | input | | @[generators/rocket-chip/src/main/scala/util/AsyncResetReg.scala:56:7] |
reset | input | | @[generators/rocket-chip/src/main/scala/util/AsyncResetReg.scala:56:7] |
io_d | input | [327:0] | @[generators/rocket-chip/src/main/scala/util/AsyncResetReg.scala:59:14] |
io_q | output | [327:0] | @[generators/rocket-chip/src/main/scala/util/AsyncResetReg.scala:59:14] |