OCAH4CORECluster_ram_9x15

Generated by CIRCT.

Ports

Table 1. Ports
NameDirectionTypeDescription
R0_addrinput[3:0]
R0_eninput
R0_clkinput
R0_dataoutput[14:0]
W0_addrinput[3:0]
W0_eninput
W0_clkinput
W0_datainput[14:0]