km_axi_lite_xbar

Route Key Manager CPU AXI4-Lite transactions by address to the ten KM peripheral ports.

Address rules use the Key Manager interface constants defined in km_intf_pkg. Routes to KPV, KMCSR, DRBG sampler, mailbox, OTBN, AES, KMAC, HMAC, Adams Bridge, and the OTP/eFuse pass-through at index 8. Uses the PULP axi_lite_xbar in zero-latency mode. OTP addresses leave this block unchanged; key_manager filters them to the eFuse register maps and remaps them before driving efuse_req_o. An address outside every rule is answered with DECERR by the xbar. The channel type parameters must match the req/resp types.

Ports

Table 1. Ports
Name	Direction	Type	Description
`clk_i`	input	`logic`	System clock.
`rst_ni`	input	`logic`	Active-low asynchronous reset; the warm reset in key_manager.
`test_i`	input	`logic`	DFT test mode for the PULP xbar.
`slv_req_i`	input	`axil_req_t`	Slave port request from the KM CPU.
`slv_resp_o`	output	`axil_resp_t`	Slave port response to the KM CPU.
`kpv_req_o`	output	`axil_req_t`	Internal peripheral master port request to KPV.
`kpv_resp_i`	input	`axil_resp_t`	Master port response from KPV.
`kmcsr_req_o`	output	`axil_req_t`	Internal peripheral master port request to KMCSR.
`kmcsr_resp_i`	input	`axil_resp_t`	Master port response from KMCSR.
`drbg_req_o`	output	`axil_req_t`	Internal peripheral master port request to the DRBG sampler.
`drbg_resp_i`	input	`axil_resp_t`	Master port response from the DRBG sampler.
`mbox_req_o`	output	`axil_req_t`	Internal peripheral master port request to the mailbox.
`mbox_resp_i`	input	`axil_resp_t`	Master port response from the mailbox.
`otbn_req_o`	output	`axil_req_t`	External crypto engine master port request to OTBN.
`otbn_resp_i`	input	`axil_resp_t`	Master port response from OTBN.
`aes_req_o`	output	`axil_req_t`	External crypto engine master port request to AES.
`aes_resp_i`	input	`axil_resp_t`	Master port response from AES.
`kmac_req_o`	output	`axil_req_t`	External crypto engine master port request to KMAC.
`kmac_resp_i`	input	`axil_resp_t`	Master port response from KMAC.
`hmac_req_o`	output	`axil_req_t`	External crypto engine master port request to HMAC.
`hmac_resp_i`	input	`axil_resp_t`	Master port response from HMAC.
`abr_req_o`	output	`axil_req_t`	External crypto engine master port request to Adams Bridge.
`abr_resp_i`	input	`axil_resp_t`	Master port response from Adams Bridge.
`otp_req_o`	output	`axil_req_t`	OTP/eFuse pass-through port request (index 8, OtpBaseAddr-OtpEndAddr). Addresses are forwarded unchanged; key_manager.sv refuses offsets outside the eFuse register maps and applies the OTP_EFUSE_REMAP_BASE remap before driving efuse_req_o.
`otp_resp_i`	input	`axil_resp_t`	OTP/eFuse pass-through port response.