drbg_edn_axis_adapter

Convert native EDN endpoint req/ack traffic into per-endpoint AXI-Stream outputs.

Each endpoint is serviced independently with a local same-clock FIFO. The adapter keeps edn_req asserted whenever the endpoint FIFO has space, captures {edn_fips, edn_bus} on edn_ack, and presents the buffered words on 32-bit AXI-Stream outputs with tstrb = 4'hF and a per-beat tuser sideband carrying the FIPS provenance of the genbits.

Parameters

Table 1. Parameters
Name	Type	Default	Description
`EDN_ENDPOINT_COUNT`	`int unsigned`	`DrbgDefaultEdnEndpointCount`	Number of exposed EDN endpoints.
`ENDPOINT_FIFO_DEPTH`	`int unsigned`	`DrbgDefaultEndpointFifoDepth`	FIFO depth for each endpoint AXI-Stream output.

Ports

Table 2. Ports
Name	Direction	Type	Description
`clk_i`	input	`logic`	System clock.
`rst_ni`	input	`logic`	Async reset, active-low.
`edn_req_o`	output	`edn_pkg::edn_req_t [EDN_ENDPOINT_COUNT-1:0]`	Native EDN requests toward EDN; edn_req is high outside reset while the endpoint FIFO is not full.
`edn_rsp_i`	input	`edn_pkg::edn_rsp_t [EDN_ENDPOINT_COUNT-1:0]`	Native EDN responses from EDN; each edn_ack writes {edn_fips, edn_bus} into the endpoint FIFO.
`edn_axis_o`	output	`drbg_axis_req_t [EDN_ENDPOINT_COUNT-1:0]`	Per-endpoint AXI-Stream out; tstrb is all ones and tuser carries the word's edn_fips bit.
`edn_axis_i`	input	`drbg_axis_rsp_t [EDN_ENDPOINT_COUNT-1:0]`	Per-endpoint AXI-Stream ready.
`endpoint_fifo_full_o`	output	`logic [EDN_ENDPOINT_COUNT-1:0]`	Per-endpoint FIFO full.
`endpoint_fifo_depth_o`	output	`logic [EDN_ENDPOINT_COUNT-1:0][$clog2(ENDPOINT_FIFO_DEPTH + 1)-1:0]`