prim_and3

AND three single-bit inputs onto out_o.

Drive out_o with the bitwise AND of in0_i, in1_i, and in2_i. This is the generic technology cell used where an AND3 is required.

Ports

Table 1. Ports
Name	Direction	Description
`in0_i`	input	First AND input.
`in1_i`	input	Second AND input.
`in2_i`	input	Third AND input.
`out_o`	output	AND of in0_i, in1_i, and in2_i.