OCAH4CORECluster_IntSyncAsyncCrossingSink_n1x1

Generated by CIRCT.

Ports

Table 1. Ports
NameDirectionTypeDescription
clockinput@[generators/rocket-chip/src/main/scala/interrupts/Crossing.scala:74:9]
auto_in_sync_0input@[generators/diplomacy/diplomacy/src/diplomacy/lazymodule/LazyModuleImp.scala:107:25]
auto_out_0output@[generators/diplomacy/diplomacy/src/diplomacy/lazymodule/LazyModuleImp.scala:107:25]