OCAH4CORECluster_regfile_32x65

Generated by CIRCT.

Ports

Table 1. Ports
Name	Direction	Type	Description
`R0_addr`	input	`[4:0]`
`R0_en`	input
`R0_clk`	input
`R0_data`	output	`[64:0]`
`R1_addr`	input	`[4:0]`
`R1_en`	input
`R1_clk`	input
`R1_data`	output	`[64:0]`
`R2_addr`	input	`[4:0]`
`R2_en`	input
`R2_clk`	input
`R2_data`	output	`[64:0]`
`W0_addr`	input	`[4:0]`
`W0_en`	input
`W0_clk`	input
`W0_data`	input	`[64:0]`
`W1_addr`	input	`[4:0]`
`W1_en`	input
`W1_clk`	input
`W1_data`	input	`[64:0]`