uart_wrap_pkg

Define address-map constants and AXI-Lite typedefs for the multi-UART wrap.

Defines the 32-bit csr_axil types, MaxNumUarts and the per-UART address spacing.

reg_addr_t

Alias for logic [RegAddrWidth-1:0]

reg_data_t

Alias for logic [RegDataWidth-1:0]

reg_strb_t

Alias for logic [RegStrbWidth-1:0]

csr_axil_aw_chan_t

Packed struct

Table 1. csr_axil_aw_chan_t
FieldTypeDescription
addrreg_addr_t
protaxi_pkg::prot_t

csr_axil_w_chan_t

Packed struct

Table 2. csr_axil_w_chan_t
FieldTypeDescription
datareg_data_t
strbreg_strb_t

csr_axil_b_chan_t

Packed struct

Table 3. csr_axil_b_chan_t
FieldTypeDescription
respaxi_pkg::resp_t

csr_axil_ar_chan_t

Packed struct

Table 4. csr_axil_ar_chan_t
FieldTypeDescription
addrreg_addr_t
protaxi_pkg::prot_t

csr_axil_r_chan_t

Packed struct

Table 5. csr_axil_r_chan_t
FieldTypeDescription
datareg_data_t
respaxi_pkg::resp_t

csr_axil_req_t

Packed struct

Table 6. csr_axil_req_t
FieldTypeDescription
awcsr_axil_aw_chan_t
aw_validlogic
wcsr_axil_w_chan_t
w_validlogic
b_readylogic
arcsr_axil_ar_chan_t
ar_validlogic
r_readylogic

csr_axil_resp_t

Packed struct

Table 7. csr_axil_resp_t
FieldTypeDescription
aw_readylogic
w_readylogic
bcsr_axil_b_chan_t
b_validlogic
ar_readylogic
rcsr_axil_r_chan_t
r_validlogic