uart_wrap_pkg
Define address-map constants and AXI-Lite typedefs for the multi-UART wrap.
Defines the 32-bit csr_axil types, MaxNumUarts and the per-UART address spacing.
reg_addr_t
Alias for logic [RegAddrWidth-1:0]
reg_data_t
Alias for logic [RegDataWidth-1:0]
reg_strb_t
Alias for logic [RegStrbWidth-1:0]
csr_axil_aw_chan_t
Packed struct
| Field | Type | Description |
|---|---|---|
addr | reg_addr_t | |
prot | axi_pkg::prot_t |
csr_axil_w_chan_t
Packed struct
| Field | Type | Description |
|---|---|---|
data | reg_data_t | |
strb | reg_strb_t |
csr_axil_b_chan_t
Packed struct
| Field | Type | Description |
|---|---|---|
resp | axi_pkg::resp_t |
csr_axil_ar_chan_t
Packed struct
| Field | Type | Description |
|---|---|---|
addr | reg_addr_t | |
prot | axi_pkg::prot_t |
csr_axil_r_chan_t
Packed struct
| Field | Type | Description |
|---|---|---|
data | reg_data_t | |
resp | axi_pkg::resp_t |
csr_axil_req_t
Packed struct
| Field | Type | Description |
|---|---|---|
aw | csr_axil_aw_chan_t | |
aw_valid | logic | |
w | csr_axil_w_chan_t | |
w_valid | logic | |
b_ready | logic | |
ar | csr_axil_ar_chan_t | |
ar_valid | logic | |
r_ready | logic |
csr_axil_resp_t
Packed struct
| Field | Type | Description |
|---|---|---|
aw_ready | logic | |
w_ready | logic | |
b | csr_axil_b_chan_t | |
b_valid | logic | |
ar_ready | logic | |
r | csr_axil_r_chan_t | |
r_valid | logic |