OCAH4CORECluster_IntSyncCrossingSource_n1x1

Generated by CIRCT.

Ports

Table 1. Ports
NameDirectionTypeDescription
clockinput@[generators/rocket-chip/src/main/scala/interrupts/Crossing.scala:41:9]
resetinput@[generators/rocket-chip/src/main/scala/interrupts/Crossing.scala:41:9]
auto_in_0input@[generators/diplomacy/diplomacy/src/diplomacy/lazymodule/LazyModuleImp.scala:107:25]
auto_out_sync_0output@[generators/diplomacy/diplomacy/src/diplomacy/lazymodule/LazyModuleImp.scala:107:25]