prim_clkmux4
Select one of four clocks with clksel_i.
Drive clk_o with clk_i[clksel_i] combinatorially. Keep clksel_i glitch-free; the mux itself does not hazard-qualify the select.
Ports
| Name | Direction | Type | Description |
|---|---|---|---|
clk_i | input | logic [3:0] | Four clock inputs. |
clksel_i | input | logic [1:0] | Selects which clk_i bit drives clk_o. |
clk_o | output | logic | Selected clock. |